EESchema-LIBRARY Version 2.3  29/04/2008-12:21:02
# Converted with eagle2kicad.ulp Version 0.9
# Device count = 3
#
# Dev Name: 4046D
# Package Name: SO16
# Dev Tech: ''
# Dev Prefix: IC
# Gate count = 2
#
DEF 4046D IC 0 40 Y Y 2 L N
# Gate Name: A
# Symbol Name: 4046
F0 "IC" -400 625 50 H V L B
F1 "4046D" -400 -800 50 H V L B
F2 "74hc(t)4046-SO16" 0 150 50 H I C C
DRAW
P 2 1 0 0 -400 -700 400 -700
P 2 1 0 0 400 -700 400 600
P 2 1 0 0 400 600 -400 600
P 2 1 0 0 -400 600 -400 -700
X CIN 3 -600 500 200 R 40 40 1 1 I 
X CX@1 6 -600 0 200 R 40 40 1 1 I 
X CX@2 7 -600 -300 200 R 40 40 1 1 I 
X DEMO 10 600 -500 200 L 40 40 1 1 O 
X INH 5 -600 -400 200 R 40 40 1 1 I 
X PC1 2 600 400 200 L 40 40 1 1 O 
X PC2 13 600 200 200 L 40 40 1 1 O 
X PC3 15 600 0 200 L 40 40 1 1 O 
X PP 1 600 500 200 L 40 40 1 1 O 
X R1 11 -600 -500 200 R 40 40 1 1 I 
X R2 12 -600 -600 200 R 40 40 1 1 I 
X SIGIN 14 -600 200 200 R 40 40 1 1 I 
X VCOIN 9 600 -300 200 L 40 40 1 1 I 
X VCOOUT 4 -600 400 200 R 40 40 1 1 O 
# Gate Name: P
# Symbol Name: PWRN
T 1 50 175 50 0 2 0 VDD
T 1 50 -155 50 0 2 0 VSS
X VDD 16 0 300 200 D 40 40 2 1 W 
X VSS 8 0 -300 200 U 40 40 2 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: 4046N
# Package Name: DIL16
# Dev Tech: ''
# Dev Prefix: IC
# Gate count = 2
#
DEF 4046N IC 0 40 Y Y 2 L N
# Gate Name: A
# Symbol Name: 4046
F0 "IC" -400 625 50 H V L B
F1 "4046N" -400 -800 50 H V L B
F2 "74hc(t)4046-DIL16" 0 150 50 H I C C
DRAW
P 2 1 0 0 -400 -700 400 -700
P 2 1 0 0 400 -700 400 600
P 2 1 0 0 400 600 -400 600
P 2 1 0 0 -400 600 -400 -700
X CIN 3 -600 500 200 R 40 40 1 1 I 
X CX@1 6 -600 0 200 R 40 40 1 1 I 
X CX@2 7 -600 -300 200 R 40 40 1 1 I 
X DEMO 10 600 -500 200 L 40 40 1 1 O 
X INH 5 -600 -400 200 R 40 40 1 1 I 
X PC1 2 600 400 200 L 40 40 1 1 O 
X PC2 13 600 200 200 L 40 40 1 1 O 
X PC3 15 600 0 200 L 40 40 1 1 O 
X PP 1 600 500 200 L 40 40 1 1 O 
X R1 11 -600 -500 200 R 40 40 1 1 I 
X R2 12 -600 -600 200 R 40 40 1 1 I 
X SIGIN 14 -600 200 200 R 40 40 1 1 I 
X VCOIN 9 600 -300 200 L 40 40 1 1 I 
X VCOOUT 4 -600 400 200 R 40 40 1 1 O 
# Gate Name: P
# Symbol Name: PWRN
T 1 50 175 50 0 2 0 VDD
T 1 50 -155 50 0 2 0 VSS
X VDD 16 0 300 200 D 40 40 2 1 W 
X VSS 8 0 -300 200 U 40 40 2 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: 4046PW
# Package Name: TSSOP16
# Dev Tech: ''
# Dev Prefix: IC
# Gate count = 2
#
DEF 4046PW IC 0 40 Y Y 2 L N
# Gate Name: A
# Symbol Name: 4046
F0 "IC" -400 625 50 H V L B
F1 "4046PW" -400 -800 50 H V L B
F2 "74hc(t)4046-TSSOP16" 0 150 50 H I C C
DRAW
P 2 1 0 0 -400 -700 400 -700
P 2 1 0 0 400 -700 400 600
P 2 1 0 0 400 600 -400 600
P 2 1 0 0 -400 600 -400 -700
X CIN 3 -600 500 200 R 40 40 1 1 I 
X CX@1 6 -600 0 200 R 40 40 1 1 I 
X CX@2 7 -600 -300 200 R 40 40 1 1 I 
X DEMO 10 600 -500 200 L 40 40 1 1 O 
X INH 5 -600 -400 200 R 40 40 1 1 I 
X PC1 2 600 400 200 L 40 40 1 1 O 
X PC2 13 600 200 200 L 40 40 1 1 O 
X PC3 15 600 0 200 L 40 40 1 1 O 
X PP 1 600 500 200 L 40 40 1 1 O 
X R1 11 -600 -500 200 R 40 40 1 1 I 
X R2 12 -600 -600 200 R 40 40 1 1 I 
X SIGIN 14 -600 200 200 R 40 40 1 1 I 
X VCOIN 9 600 -300 200 L 40 40 1 1 I 
X VCOOUT 4 -600 400 200 R 40 40 1 1 O 
# Gate Name: P
# Symbol Name: PWRN
T 1 50 175 50 0 2 0 VDD
T 1 50 -155 50 0 2 0 VSS
X VDD 16 0 300 200 D 40 40 2 1 W 
X VSS 8 0 -300 200 U 40 40 2 1 W 
ENDDRAW
ENDDEF

#End Library