EESchema-LIBRARY Version 2.3  29/04/2008-12:21:09
# Converted with eagle2kicad.ulp Version 0.9
# Device count = 5
#
# Dev Name: EP1C6T144
# Package Name: TQFP144
# Dev Tech: ''
# Dev Prefix: CYCLONE
# Gate count = 4
#
DEF EP1C6T144 CYCLONE 0 40 Y Y 4 L N
# Gate Name: BANK1
# Symbol Name: B1
F0 "CYCLONE" -1000 1350 50 H V L B
F1 "EP1C6T144" -1000 -1500 50 H V L B
F2 "altera-2-TQFP144" 0 150 50 H I C C
DRAW
P 2 1 0 0 -1000 1300 -1000 -1400
P 2 1 0 0 -1000 -1400 1000 -1400
P 2 1 0 0 1000 -1400 1000 1300
P 2 1 0 0 1000 1300 -1000 1300
X ASDO/IO25 25 1100 -100 100 L 40 40 1 1 B 
X CLK0/LVDSCLK1P 16 -1100 -1100 100 R 40 40 1 1 I C
X CLK1/LVDSCLK1N 17 -1100 -1200 100 R 40 40 1 1 I C
X CLKUSR/LVDS13P/IO3 3 1100 700 100 L 40 40 1 1 B 
X DATA0 13 -1100 -100 100 R 40 40 1 1 I 
X DCLK 24 -1100 -200 100 R 40 40 1 1 B 
X DPCLK0/IO28 28 1100 -400 100 L 40 40 1 1 B 
X DPCLK1/IO10 10 1100 200 100 L 40 40 1 1 B 
X GND@9 9 -1100 800 100 R 40 40 1 1 W 
X GND@30 30 -1100 700 100 R 40 40 1 1 W 
X GNDA_PLL1 18 -1100 300 100 R 40 40 1 1 W 
X GNDG_PLL1 19 -1100 200 100 R 40 40 1 1 W 
X INIT_DONE/LVDS14P/IO1 1 1100 900 100 L 40 40 1 1 B 
X IO6 6 1100 400 100 L 40 40 1 1 B 
X IO32 32 1100 -600 100 L 40 40 1 1 B 
X LVDS0N/IO36 36 1100 -1000 100 L 40 40 1 1 B 
X LVDS0P/IO35 35 1100 -900 100 L 40 40 1 1 B 
X LVDS1N/IO34 34 1100 -800 100 L 40 40 1 1 B 
X LVDS1P/IO33 33 1100 -700 100 L 40 40 1 1 B 
X LVDS12P/IO7 7 1100 300 100 L 40 40 1 1 B 
X LVDS13N/IO4 4 1100 600 100 L 40 40 1 1 B 
X LVDS14N/IO2 2 1100 800 100 L 40 40 1 1 B 
X MSEL0 22 -1100 -800 100 R 40 40 1 1 I 
X MSEL1 23 -1100 -900 100 R 40 40 1 1 I 
X NCE 21 -1100 -500 100 R 40 40 1 1 I 
X NCEO 20 -1100 -400 100 R 40 40 1 1 O 
X NCONFIG 14 -1100 -600 100 R 40 40 1 1 I 
X NCSO/IO12 12 1100 0 100 L 40 40 1 1 B 
X PLL1_OUTN/IO27 27 1100 -300 100 L 40 40 1 1 B 
X PLL1_OUTP/IO26 26 1100 -200 100 L 40 40 1 1 B 
X VCCA_PLL1 15 -1100 500 100 R 40 40 1 1 W 
X VCCIO1@8 8 -1100 1100 100 R 40 40 1 1 W 
X VCCIO1@29 29 -1100 1000 100 R 40 40 1 1 W 
X VREF0B1/IO5 5 1100 500 100 L 40 40 1 1 B 
X VREF1B1/IO11 11 1100 100 100 L 40 40 1 1 B 
X VREF2B1/IO31 31 1100 -500 100 L 40 40 1 1 B 
# Gate Name: BANK2
# Symbol Name: B2
P 2 2 0 0 -1000 1300 -1000 -1400
P 2 2 0 0 -1000 -1400 1000 -1400
P 2 2 0 0 1000 -1400 1000 1300
P 2 2 0 0 1000 1300 -1000 1300
X DEV_CLRN/LVDS15P/IO144 144 1100 -1300 100 L 40 40 2 1 B 
X DEV_OE/LVDS15N/IO143 143 1100 -1200 100 L 40 40 2 1 B 
X DPCLK2/IO134 134 1100 -700 100 L 40 40 2 1 B 
X DPCLK3/IO119 119 1100 600 100 L 40 40 2 1 B 
X GND@116 116 -1100 700 100 R 40 40 2 1 W 
X GND@118 118 -1100 -900 100 R 40 40 2 1 W 
X GND@127 127 -1100 -1000 100 R 40 40 2 1 W 
X GND@136 136 -1100 -1100 100 R 40 40 2 1 W 
X GND@138 138 -1100 600 100 R 40 40 2 1 W 
X IO121 121 1100 400 100 L 40 40 2 1 B 
X LVDS17N/IO141 141 1100 -1000 100 L 40 40 2 1 B 
X LVDS17P/IO142 142 1100 -1100 100 L 40 40 2 1 B 
X LVDS18N/IO139 139 1100 -800 100 L 40 40 2 1 B 
X LVDS18P/IO140 140 1100 -900 100 L 40 40 2 1 B 
X LVDS19P/IO132 132 1100 -500 100 L 40 40 2 1 B 
X LVDS23N/IO130 130 1100 -300 100 L 40 40 2 1 B 
X LVDS23P/IO131 131 1100 -400 100 L 40 40 2 1 B 
X LVDS24N/IO128 128 1100 -100 100 L 40 40 2 1 B 
X LVDS24P/IO129 129 1100 -200 100 L 40 40 2 1 B 
X LVDS25N/IO123 123 1100 200 100 L 40 40 2 1 B 
X LVDS25P/IO124 124 1100 100 100 L 40 40 2 1 B 
X LVDS27N/IO122 122 1100 300 100 L 40 40 2 1 B 
X LVDS31N/IO113 113 1100 800 100 L 40 40 2 1 B 
X LVDS31P/IO114 114 1100 700 100 L 40 40 2 1 B 
X LVDS32N/IO111 111 1100 1000 100 L 40 40 2 1 B 
X LVDS32P/IO112 112 1100 900 100 L 40 40 2 1 B 
X LVDS34N/IO109 109 1100 1200 100 L 40 40 2 1 B 
X LVDS34P/IO110 110 1100 1100 100 L 40 40 2 1 B 
X VCCINT@117 117 -1100 -500 100 R 40 40 2 1 W 
X VCCINT@126 126 -1100 -600 100 R 40 40 2 1 W 
X VCCINT@135 135 -1100 -700 100 R 40 40 2 1 W 
X VCCIO2@115 115 -1100 1000 100 R 40 40 2 1 W 
X VCCIO2@137 137 -1100 900 100 R 40 40 2 1 W 
X VREF0B2/IO120 120 1100 500 100 L 40 40 2 1 B 
X VREF1B2/IO125 125 1100 0 100 L 40 40 2 1 B 
X VREF2B2/IO133 133 1100 -600 100 L 40 40 2 1 B 
# Gate Name: BANK3
# Symbol Name: B3
P 2 3 0 0 -1000 1300 -1000 -1400
P 2 3 0 0 -1000 -1400 1000 -1400
P 2 3 0 0 1000 -1400 1000 1300
P 2 3 0 0 1000 1300 -1000 1300
X CLK2/LVDSCLK2P 93 -1100 -1000 100 R 40 40 3 1 I C
X CLK3/LVDSCLK2N 92 -1100 -1100 100 R 40 40 3 1 I C
X CONF_DONE 86 -1100 0 100 R 40 40 3 1 B 
X DPCLK4/IO100 100 1100 -500 100 L 40 40 3 1 B 
X DPCLK5/IO82 82 1100 300 100 L 40 40 3 1 B 
X GND@80 80 -1100 700 100 R 40 40 3 1 W 
X GND@101 101 -1100 600 100 R 40 40 3 1 W 
X GNDG_PLL2 91 -1100 200 100 R 40 40 3 1 W 
X IO103 103 1100 -600 100 L 40 40 3 1 B 
X LVDS35N/IO107 107 1100 -1000 100 L 40 40 3 1 B 
X LVDS35P/IO108 108 1100 -1100 100 L 40 40 3 1 B 
X LVDS36N/IO105 105 1100 -800 100 L 40 40 3 1 B 
X LVDS36P/IO106 106 1100 -900 100 L 40 40 3 1 B 
X LVDS38N/IO98 98 1100 -300 100 L 40 40 3 1 B 
X LVDS38P/IO99 99 1100 -400 100 L 40 40 3 1 B 
X LVDS39P/IO97 97 1100 -200 100 L 40 40 3 1 B 
X LVDS47N/IO85 85 1100 0 100 L 40 40 3 1 B 
X LVDS48N/IO83 83 1100 200 100 L 40 40 3 1 B 
X LVDS48P/IO84 84 1100 100 100 L 40 40 3 1 B 
X LVDS49N/IO77 77 1100 600 100 L 40 40 3 1 B 
X LVDS49P/IO78 78 1100 500 100 L 40 40 3 1 B 
X LVDS50N/IO75 75 1100 800 100 L 40 40 3 1 B 
X LVDS50P/IO76 76 1100 700 100 L 40 40 3 1 B 
X LVDS51N/IO73 73 1100 1000 100 L 40 40 3 1 B 
X LVDS51P/IO74 74 1100 900 100 L 40 40 3 1 B 
X NSTATUS 87 -1100 -100 100 R 40 40 3 1 B 
X TCK 88 -1100 -400 100 R 40 40 3 1 I 
X TDI 95 -1100 -600 100 R 40 40 3 1 I 
X TDO 90 -1100 -700 100 R 40 40 3 1 O 
X TMS 89 -1100 -500 100 R 40 40 3 1 I 
X VCCA_PLL2 94 -1100 400 100 R 40 40 3 1 W 
X VCCIO3@81 81 -1100 1000 100 R 40 40 3 1 W 
X VCCIO3@102 102 -1100 900 100 R 40 40 3 1 W 
X VREF0B3/IO104 104 1100 -700 100 L 40 40 3 1 B 
X VREF1B3/IO96 96 1100 -100 100 L 40 40 3 1 B 
X VREF2B3/IO79 79 1100 400 100 L 40 40 3 1 B 
# Gate Name: BANK4
# Symbol Name: B4
P 2 4 0 0 -1000 1300 -1000 -1400
P 2 4 0 0 -1000 -1400 1000 -1400
P 2 4 0 0 1000 -1400 1000 1300
P 2 4 0 0 1000 1300 -1000 1300
X DPCLK6/IO62 62 1100 -700 100 L 40 40 4 1 B 
X DPCLK7/IO47 47 1100 600 100 L 40 40 4 1 B 
X GND@43 43 -1100 700 100 R 40 40 4 1 W 
X GND@45 45 -1100 -900 100 R 40 40 4 1 W 
X GND@54 54 -1100 -1000 100 R 40 40 4 1 W 
X GND@63 63 -1100 -1100 100 R 40 40 4 1 W 
X GND@65 65 -1100 600 100 R 40 40 4 1 W 
X IO60 60 1100 -500 100 L 40 40 4 1 B 
X LVD52N/IO72 72 1100 -1300 100 L 40 40 4 1 B 
X LVD52P/IO71 71 1100 -1200 100 L 40 40 4 1 B 
X LVD54N/IO70 70 1100 -1100 100 L 40 40 4 1 B 
X LVDS54P/IO69 69 1100 -1000 100 L 40 40 4 1 B 
X LVDS55N/IO68 68 1100 -900 100 L 40 40 4 1 B 
X LVDS55P/IO67 67 1100 -800 100 L 40 40 4 1 B 
X LVDS59N/IO59 59 1100 -400 100 L 40 40 4 1 B 
X LVDS61N/IO58 58 1100 -300 100 L 40 40 4 1 B 
X LVDS61P/IO57 57 1100 -200 100 L 40 40 4 1 B 
X LVDS62N/IO53 53 1100 0 100 L 40 40 4 1 B 
X LVDS62P/IO52 52 1100 100 100 L 40 40 4 1 B 
X LVDS63N/IO51 51 1100 200 100 L 40 40 4 1 B 
X LVDS63P/IO50 50 1100 300 100 L 40 40 4 1 B 
X LVDS67P/IO49 49 1100 400 100 L 40 40 4 1 B 
X LVDS68N/IO42 42 1100 700 100 L 40 40 4 1 B 
X LVDS68P/IO41 41 1100 800 100 L 40 40 4 1 B 
X LVDS69N/IO40 40 1100 900 100 L 40 40 4 1 B 
X LVDS69P/IO39 39 1100 1000 100 L 40 40 4 1 B 
X LVDS71N/IO38 38 1100 1100 100 L 40 40 4 1 B 
X LVDS71P/IO37 37 1100 1200 100 L 40 40 4 1 B 
X VCCINT@46 46 -1100 -500 100 R 40 40 4 1 W 
X VCCINT@55 55 -1100 -600 100 R 40 40 4 1 W 
X VCCINT@64 64 -1100 -700 100 R 40 40 4 1 W 
X VCCIO4@44 44 -1100 1000 100 R 40 40 4 1 W 
X VCCIO4@66 66 -1100 900 100 R 40 40 4 1 W 
X VREF0B4/IO56 56 1100 -100 100 L 40 40 4 1 B 
X VREF0B4/IO61 61 1100 -600 100 L 40 40 4 1 B 
X VREF2B4/IO48 48 1100 500 100 L 40 40 4 1 B 
ENDDRAW
ENDDEF

#
# Dev Name: EPCS1SI8
# Package Name: SO08
# Dev Tech: ''
# Dev Prefix: IC
# Gate count = 1
#
DEF EPCS1SI8 IC 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: EPCS1
F0 "IC" -400 350 50 H V L B
F1 "EPCS1SI8" -400 -300 50 H V L B
F2 "altera-2-SO08" 0 150 50 H I C C
DRAW
P 2 1 0 0 400 -200 -400 -200
P 2 1 0 0 -400 -200 -400 300
P 2 1 0 0 -400 300 400 300
P 2 1 0 0 400 300 400 -200
X ASDI 5 500 -100 100 L 40 40 1 1 I 
X DATA 2 500 200 100 L 40 40 1 1 O 
X DCLK 6 500 100 100 L 40 40 1 1 I 
X GND 4 -500 -100 100 R 40 40 1 1 W 
X NCS 1 500 0 100 L 40 40 1 1 I 
X VCC@3 3 -500 200 100 R 40 40 1 1 W 
X VCC@7 7 -500 100 100 R 40 40 1 1 W 
X VCC@8 8 -500 0 100 R 40 40 1 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: EPCS4SI8
# Package Name: SO08
# Dev Tech: ''
# Dev Prefix: IC
# Gate count = 1
#
DEF EPCS4SI8 IC 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: EPCS1
F0 "IC" -400 350 50 H V L B
F1 "EPCS4SI8" -400 -300 50 H V L B
F2 "altera-2-SO08" 0 150 50 H I C C
DRAW
P 2 1 0 0 400 -200 -400 -200
P 2 1 0 0 -400 -200 -400 300
P 2 1 0 0 -400 300 400 300
P 2 1 0 0 400 300 400 -200
X ASDI 5 500 -100 100 L 40 40 1 1 I 
X DATA 2 500 200 100 L 40 40 1 1 O 
X DCLK 6 500 100 100 L 40 40 1 1 I 
X GND 4 -500 -100 100 R 40 40 1 1 W 
X NCS 1 500 0 100 L 40 40 1 1 I 
X VCC@3 3 -500 200 100 R 40 40 1 1 W 
X VCC@7 7 -500 100 100 R 40 40 1 1 W 
X VCC@8 8 -500 0 100 R 40 40 1 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: EPCS16SI16
# Package Name: SO16L
# Dev Tech: ''
# Dev Prefix: IC
# Gate count = 1
#
DEF EPCS16SI16 IC 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: EPCS1
F0 "IC" -400 350 50 H V L B
F1 "EPCS16SI16" -400 -300 50 H V L B
F2 "altera-2-SO16L" 0 150 50 H I C C
DRAW
P 2 1 0 0 400 -200 -400 -200
P 2 1 0 0 -400 -200 -400 300
P 2 1 0 0 -400 300 400 300
P 2 1 0 0 400 300 400 -200
X ASDI 15 500 -100 100 L 40 40 1 1 I 
X DATA 8 500 200 100 L 40 40 1 1 O 
X DCLK 16 500 100 100 L 40 40 1 1 I 
X GND 10 -500 -100 100 R 40 40 1 1 W 
X NCS 7 500 0 100 L 40 40 1 1 I 
X VCC@3 1 -500 200 100 R 40 40 1 1 W 
X VCC@7 2 -500 100 100 R 40 40 1 1 W 
X VCC@8 9 -500 0 100 R 40 40 1 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: EPCS64SI16
# Package Name: SO16L
# Dev Tech: ''
# Dev Prefix: IC
# Gate count = 1
#
DEF EPCS64SI16 IC 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: EPCS1
F0 "IC" -400 350 50 H V L B
F1 "EPCS64SI16" -400 -300 50 H V L B
F2 "altera-2-SO16L" 0 150 50 H I C C
DRAW
P 2 1 0 0 400 -200 -400 -200
P 2 1 0 0 -400 -200 -400 300
P 2 1 0 0 -400 300 400 300
P 2 1 0 0 400 300 400 -200
X ASDI 15 500 -100 100 L 40 40 1 1 I 
X DATA 8 500 200 100 L 40 40 1 1 O 
X DCLK 16 500 100 100 L 40 40 1 1 I 
X GND 10 -500 -100 100 R 40 40 1 1 W 
X NCS 7 500 0 100 L 40 40 1 1 I 
X VCC@3 1 -500 200 100 R 40 40 1 1 W 
X VCC@7 2 -500 100 100 R 40 40 1 1 W 
X VCC@8 9 -500 0 100 R 40 40 1 1 W 
ENDDRAW
ENDDEF

#End Library