EESchema-LIBRARY Version 2.3 29/04/2008-12:21:22 # Converted with eagle2kicad.ulp Version 0.9 # Device count = 30 # # Dev Name: AM7968-125/DKC # Package Name: DIP28-6 # Dev Tech: -125 # Dev Prefix: IC # Gate count = 2 # DEF AM7968-125/DKC IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: AM7968 F0 "IC" -500 800 50 H V L B F1 "AM7968-125/DKC" -500 -1000 50 H V L B F2 "amd_taxi-DIP28-6" 0 150 50 H I C C DRAW P 2 1 0 0 -500 800 500 800 P 2 1 0 0 500 800 500 -900 P 2 1 0 0 500 -900 -500 -900 P 2 1 0 0 -500 -900 -500 800 X ACK 1 -700 -700 200 R 40 40 1 1 O X CI0 12 -700 -400 200 R 40 40 1 1 I X CI1 13 -700 -300 200 R 40 40 1 1 I X CLK 18 700 -700 200 L 40 40 1 1 O C X DI0 23 -700 700 200 R 40 40 1 1 I X DI1 24 -700 600 200 R 40 40 1 1 I X DI2 25 -700 500 200 R 40 40 1 1 I X DI3 26 -700 400 200 R 40 40 1 1 I X DI4 27 -700 300 200 R 40 40 1 1 I X DI5 28 -700 200 200 R 40 40 1 1 I X DI6 17 -700 100 200 R 40 40 1 1 I X DI7 16 -700 0 200 R 40 40 1 1 I X DI8/CI3 15 -700 -100 200 R 40 40 1 1 I X DI9/CI2 14 -700 -200 200 R 40 40 1 1 I X DMS 9 -700 -800 200 R 40 40 1 1 I X RESET 8 700 -800 200 L 40 40 1 1 I I X SEROUT+ 3 700 700 200 L 40 40 1 1 O X SEROUT- 4 700 600 200 L 40 40 1 1 O X STRB 2 -700 -600 200 R 40 40 1 1 I X TLS 10 700 -500 200 L 40 40 1 1 I X TSERIN 11 700 -400 200 L 40 40 1 1 I X X1 20 700 300 200 L 40 40 1 1 I X X2 19 700 -100 200 L 40 40 1 1 I # Gate Name: P # Symbol Name: AM7968PW P 2 2 0 0 -500 200 500 200 P 2 2 0 0 500 200 500 -200 P 2 2 0 0 500 -200 -500 -200 P 2 2 0 0 -500 -200 -500 200 X GND1TTL 22 700 0 200 L 40 40 2 1 W X GND2CML 21 700 -100 200 L 40 40 2 1 W X VCC1TTL 6 -700 100 200 R 40 40 2 1 W X VCC2ECL 5 -700 0 200 R 40 40 2 1 W X VCC3CML 7 -700 -100 200 R 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: AM7968-125/DMC # Package Name: DIP28-6 # Dev Tech: -125 # Dev Prefix: IC # Gate count = 2 # DEF AM7968-125/DMC IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: AM7968 F0 "IC" -500 800 50 H V L B F1 "AM7968-125/DMC" -500 -1000 50 H V L B F2 "amd_taxi-DIP28-6" 0 150 50 H I C C DRAW P 2 1 0 0 -500 800 500 800 P 2 1 0 0 500 800 500 -900 P 2 1 0 0 500 -900 -500 -900 P 2 1 0 0 -500 -900 -500 800 X ACK 1 -700 -700 200 R 40 40 1 1 O X CI0 12 -700 -400 200 R 40 40 1 1 I X CI1 13 -700 -300 200 R 40 40 1 1 I X CLK 18 700 -700 200 L 40 40 1 1 O C X DI0 23 -700 700 200 R 40 40 1 1 I X DI1 24 -700 600 200 R 40 40 1 1 I X DI2 25 -700 500 200 R 40 40 1 1 I X DI3 26 -700 400 200 R 40 40 1 1 I X DI4 27 -700 300 200 R 40 40 1 1 I X DI5 28 -700 200 200 R 40 40 1 1 I X DI6 17 -700 100 200 R 40 40 1 1 I X DI7 16 -700 0 200 R 40 40 1 1 I X DI8/CI3 15 -700 -100 200 R 40 40 1 1 I X DI9/CI2 14 -700 -200 200 R 40 40 1 1 I X DMS 9 -700 -800 200 R 40 40 1 1 I X RESET 8 700 -800 200 L 40 40 1 1 I I X SEROUT+ 3 700 700 200 L 40 40 1 1 O X SEROUT- 4 700 600 200 L 40 40 1 1 O X STRB 2 -700 -600 200 R 40 40 1 1 I X TLS 10 700 -500 200 L 40 40 1 1 I X TSERIN 11 700 -400 200 L 40 40 1 1 I X X1 20 700 300 200 L 40 40 1 1 I X X2 19 700 -100 200 L 40 40 1 1 I # Gate Name: P # Symbol Name: AM7968PW P 2 2 0 0 -500 200 500 200 P 2 2 0 0 500 200 500 -200 P 2 2 0 0 500 -200 -500 -200 P 2 2 0 0 -500 -200 -500 200 X GND1TTL 22 700 0 200 L 40 40 2 1 W X GND2CML 21 700 -100 200 L 40 40 2 1 W X VCC1TTL 6 -700 100 200 R 40 40 2 1 W X VCC2ECL 5 -700 0 200 R 40 40 2 1 W X VCC3CML 7 -700 -100 200 R 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: AM7968-125/LKC # Package Name: LCC28 # Dev Tech: -125 # Dev Prefix: IC # Gate count = 2 # DEF AM7968-125/LKC IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: AM7968 F0 "IC" -500 800 50 H V L B F1 "AM7968-125/LKC" -500 -1000 50 H V L B F2 "amd_taxi-LCC28" 0 150 50 H I C C DRAW P 2 1 0 0 -500 800 500 800 P 2 1 0 0 500 800 500 -900 P 2 1 0 0 500 -900 -500 -900 P 2 1 0 0 -500 -900 -500 800 X ACK 1 -700 -700 200 R 40 40 1 1 O X CI0 12 -700 -400 200 R 40 40 1 1 I X CI1 13 -700 -300 200 R 40 40 1 1 I X CLK 18 700 -700 200 L 40 40 1 1 O C X DI0 23 -700 700 200 R 40 40 1 1 I X DI1 24 -700 600 200 R 40 40 1 1 I X DI2 25 -700 500 200 R 40 40 1 1 I X DI3 26 -700 400 200 R 40 40 1 1 I X DI4 27 -700 300 200 R 40 40 1 1 I X DI5 28 -700 200 200 R 40 40 1 1 I X DI6 17 -700 100 200 R 40 40 1 1 I X DI7 16 -700 0 200 R 40 40 1 1 I X DI8/CI3 15 -700 -100 200 R 40 40 1 1 I X DI9/CI2 14 -700 -200 200 R 40 40 1 1 I X DMS 9 -700 -800 200 R 40 40 1 1 I X RESET 8 700 -800 200 L 40 40 1 1 I I X SEROUT+ 3 700 700 200 L 40 40 1 1 O X SEROUT- 4 700 600 200 L 40 40 1 1 O X STRB 2 -700 -600 200 R 40 40 1 1 I X TLS 10 700 -500 200 L 40 40 1 1 I X TSERIN 11 700 -400 200 L 40 40 1 1 I X X1 20 700 300 200 L 40 40 1 1 I X X2 19 700 -100 200 L 40 40 1 1 I # Gate Name: P # Symbol Name: AM7968PW P 2 2 0 0 -500 200 500 200 P 2 2 0 0 500 200 500 -200 P 2 2 0 0 500 -200 -500 -200 P 2 2 0 0 -500 -200 -500 200 X GND1TTL 22 700 0 200 L 40 40 2 1 W X GND2CML 21 700 -100 200 L 40 40 2 1 W X VCC1TTL 6 -700 100 200 R 40 40 2 1 W X VCC2ECL 5 -700 0 200 R 40 40 2 1 W X VCC3CML 7 -700 -100 200 R 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: AM7968-125/LMC # Package Name: LCC28 # Dev Tech: -125 # Dev Prefix: IC # Gate count = 2 # DEF AM7968-125/LMC IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: AM7968 F0 "IC" -500 800 50 H V L B F1 "AM7968-125/LMC" -500 -1000 50 H V L B F2 "amd_taxi-LCC28" 0 150 50 H I C C DRAW P 2 1 0 0 -500 800 500 800 P 2 1 0 0 500 800 500 -900 P 2 1 0 0 500 -900 -500 -900 P 2 1 0 0 -500 -900 -500 800 X ACK 1 -700 -700 200 R 40 40 1 1 O X CI0 12 -700 -400 200 R 40 40 1 1 I X CI1 13 -700 -300 200 R 40 40 1 1 I X CLK 18 700 -700 200 L 40 40 1 1 O C X DI0 23 -700 700 200 R 40 40 1 1 I X DI1 24 -700 600 200 R 40 40 1 1 I X DI2 25 -700 500 200 R 40 40 1 1 I X DI3 26 -700 400 200 R 40 40 1 1 I X DI4 27 -700 300 200 R 40 40 1 1 I X DI5 28 -700 200 200 R 40 40 1 1 I X DI6 17 -700 100 200 R 40 40 1 1 I X DI7 16 -700 0 200 R 40 40 1 1 I X DI8/CI3 15 -700 -100 200 R 40 40 1 1 I X DI9/CI2 14 -700 -200 200 R 40 40 1 1 I X DMS 9 -700 -800 200 R 40 40 1 1 I X RESET 8 700 -800 200 L 40 40 1 1 I I X SEROUT+ 3 700 700 200 L 40 40 1 1 O X SEROUT- 4 700 600 200 L 40 40 1 1 O X STRB 2 -700 -600 200 R 40 40 1 1 I X TLS 10 700 -500 200 L 40 40 1 1 I X TSERIN 11 700 -400 200 L 40 40 1 1 I X X1 20 700 300 200 L 40 40 1 1 I X X2 19 700 -100 200 L 40 40 1 1 I # Gate Name: P # Symbol Name: AM7968PW P 2 2 0 0 -500 200 500 200 P 2 2 0 0 500 200 500 -200 P 2 2 0 0 500 -200 -500 -200 P 2 2 0 0 -500 -200 -500 200 X GND1TTL 22 700 0 200 L 40 40 2 1 W X GND2CML 21 700 -100 200 L 40 40 2 1 W X VCC1TTL 6 -700 100 200 R 40 40 2 1 W X VCC2ECL 5 -700 0 200 R 40 40 2 1 W X VCC3CML 7 -700 -100 200 R 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: AM7968-125DC # Package Name: DIP28-6 # Dev Tech: -125 # Dev Prefix: IC # Gate count = 2 # DEF AM7968-125DC IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: AM7968 F0 "IC" -500 800 50 H V L B F1 "AM7968-125DC" -500 -1000 50 H V L B F2 "amd_taxi-DIP28-6" 0 150 50 H I C C DRAW P 2 1 0 0 -500 800 500 800 P 2 1 0 0 500 800 500 -900 P 2 1 0 0 500 -900 -500 -900 P 2 1 0 0 -500 -900 -500 800 X ACK 1 -700 -700 200 R 40 40 1 1 O X CI0 12 -700 -400 200 R 40 40 1 1 I X CI1 13 -700 -300 200 R 40 40 1 1 I X CLK 18 700 -700 200 L 40 40 1 1 O C X DI0 23 -700 700 200 R 40 40 1 1 I X DI1 24 -700 600 200 R 40 40 1 1 I X DI2 25 -700 500 200 R 40 40 1 1 I X DI3 26 -700 400 200 R 40 40 1 1 I X DI4 27 -700 300 200 R 40 40 1 1 I X DI5 28 -700 200 200 R 40 40 1 1 I X DI6 17 -700 100 200 R 40 40 1 1 I X DI7 16 -700 0 200 R 40 40 1 1 I X DI8/CI3 15 -700 -100 200 R 40 40 1 1 I X DI9/CI2 14 -700 -200 200 R 40 40 1 1 I X DMS 9 -700 -800 200 R 40 40 1 1 I X RESET 8 700 -800 200 L 40 40 1 1 I I X SEROUT+ 3 700 700 200 L 40 40 1 1 O X SEROUT- 4 700 600 200 L 40 40 1 1 O X STRB 2 -700 -600 200 R 40 40 1 1 I X TLS 10 700 -500 200 L 40 40 1 1 I X TSERIN 11 700 -400 200 L 40 40 1 1 I X X1 20 700 300 200 L 40 40 1 1 I X X2 19 700 -100 200 L 40 40 1 1 I # Gate Name: P # Symbol Name: AM7968PW P 2 2 0 0 -500 200 500 200 P 2 2 0 0 500 200 500 -200 P 2 2 0 0 500 -200 -500 -200 P 2 2 0 0 -500 -200 -500 200 X GND1TTL 22 700 0 200 L 40 40 2 1 W X GND2CML 21 700 -100 200 L 40 40 2 1 W X VCC1TTL 6 -700 100 200 R 40 40 2 1 W X VCC2ECL 5 -700 0 200 R 40 40 2 1 W X VCC3CML 7 -700 -100 200 R 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: AM7968-125JC # Package Name: PLCC28S # Dev Tech: -125 # Dev Prefix: IC # Gate count = 2 # DEF AM7968-125JC IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: AM7968 F0 "IC" -500 800 50 H V L B F1 "AM7968-125JC" -500 -1000 50 H V L B F2 "amd_taxi-PLCC28S" 0 150 50 H I C C DRAW P 2 1 0 0 -500 800 500 800 P 2 1 0 0 500 800 500 -900 P 2 1 0 0 500 -900 -500 -900 P 2 1 0 0 -500 -900 -500 800 X ACK 1 -700 -700 200 R 40 40 1 1 O X CI0 12 -700 -400 200 R 40 40 1 1 I X CI1 13 -700 -300 200 R 40 40 1 1 I X CLK 18 700 -700 200 L 40 40 1 1 O C X DI0 23 -700 700 200 R 40 40 1 1 I X DI1 24 -700 600 200 R 40 40 1 1 I X DI2 25 -700 500 200 R 40 40 1 1 I X DI3 26 -700 400 200 R 40 40 1 1 I X DI4 27 -700 300 200 R 40 40 1 1 I X DI5 28 -700 200 200 R 40 40 1 1 I X DI6 17 -700 100 200 R 40 40 1 1 I X DI7 16 -700 0 200 R 40 40 1 1 I X DI8/CI3 15 -700 -100 200 R 40 40 1 1 I X DI9/CI2 14 -700 -200 200 R 40 40 1 1 I X DMS 9 -700 -800 200 R 40 40 1 1 I X RESET 8 700 -800 200 L 40 40 1 1 I I X SEROUT+ 3 700 700 200 L 40 40 1 1 O X SEROUT- 4 700 600 200 L 40 40 1 1 O X STRB 2 -700 -600 200 R 40 40 1 1 I X TLS 10 700 -500 200 L 40 40 1 1 I X TSERIN 11 700 -400 200 L 40 40 1 1 I X X1 20 700 300 200 L 40 40 1 1 I X X2 19 700 -100 200 L 40 40 1 1 I # Gate Name: P # Symbol Name: AM7968PW P 2 2 0 0 -500 200 500 200 P 2 2 0 0 500 200 500 -200 P 2 2 0 0 500 -200 -500 -200 P 2 2 0 0 -500 -200 -500 200 X GND1TTL 22 700 0 200 L 40 40 2 1 W X GND2CML 21 700 -100 200 L 40 40 2 1 W X VCC1TTL 6 -700 100 200 R 40 40 2 1 W X VCC2ECL 5 -700 0 200 R 40 40 2 1 W X VCC3CML 7 -700 -100 200 R 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: AM7968-125PC # Package Name: DIP28-6 # Dev Tech: -125 # Dev Prefix: IC # Gate count = 2 # DEF AM7968-125PC IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: AM7968 F0 "IC" -500 800 50 H V L B F1 "AM7968-125PC" -500 -1000 50 H V L B F2 "amd_taxi-DIP28-6" 0 150 50 H I C C DRAW P 2 1 0 0 -500 800 500 800 P 2 1 0 0 500 800 500 -900 P 2 1 0 0 500 -900 -500 -900 P 2 1 0 0 -500 -900 -500 800 X ACK 1 -700 -700 200 R 40 40 1 1 O X CI0 12 -700 -400 200 R 40 40 1 1 I X CI1 13 -700 -300 200 R 40 40 1 1 I X CLK 18 700 -700 200 L 40 40 1 1 O C X DI0 23 -700 700 200 R 40 40 1 1 I X DI1 24 -700 600 200 R 40 40 1 1 I X DI2 25 -700 500 200 R 40 40 1 1 I X DI3 26 -700 400 200 R 40 40 1 1 I X DI4 27 -700 300 200 R 40 40 1 1 I X DI5 28 -700 200 200 R 40 40 1 1 I X DI6 17 -700 100 200 R 40 40 1 1 I X DI7 16 -700 0 200 R 40 40 1 1 I X DI8/CI3 15 -700 -100 200 R 40 40 1 1 I X DI9/CI2 14 -700 -200 200 R 40 40 1 1 I X DMS 9 -700 -800 200 R 40 40 1 1 I X RESET 8 700 -800 200 L 40 40 1 1 I I X SEROUT+ 3 700 700 200 L 40 40 1 1 O X SEROUT- 4 700 600 200 L 40 40 1 1 O X STRB 2 -700 -600 200 R 40 40 1 1 I X TLS 10 700 -500 200 L 40 40 1 1 I X TSERIN 11 700 -400 200 L 40 40 1 1 I X X1 20 700 300 200 L 40 40 1 1 I X X2 19 700 -100 200 L 40 40 1 1 I # Gate Name: P # Symbol Name: AM7968PW P 2 2 0 0 -500 200 500 200 P 2 2 0 0 500 200 500 -200 P 2 2 0 0 500 -200 -500 -200 P 2 2 0 0 -500 -200 -500 200 X GND1TTL 22 700 0 200 L 40 40 2 1 W X GND2CML 21 700 -100 200 L 40 40 2 1 W X VCC1TTL 6 -700 100 200 R 40 40 2 1 W X VCC2ECL 5 -700 0 200 R 40 40 2 1 W X VCC3CML 7 -700 -100 200 R 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: AM7968-175DC # Package Name: DIP28-6 # Dev Tech: -175 # Dev Prefix: IC # Gate count = 2 # DEF AM7968-175DC IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: AM7968 F0 "IC" -500 800 50 H V L B F1 "AM7968-175DC" -500 -1000 50 H V L B F2 "amd_taxi-DIP28-6" 0 150 50 H I C C DRAW P 2 1 0 0 -500 800 500 800 P 2 1 0 0 500 800 500 -900 P 2 1 0 0 500 -900 -500 -900 P 2 1 0 0 -500 -900 -500 800 X ACK 1 -700 -700 200 R 40 40 1 1 O X CI0 12 -700 -400 200 R 40 40 1 1 I X CI1 13 -700 -300 200 R 40 40 1 1 I X CLK 18 700 -700 200 L 40 40 1 1 O C X DI0 23 -700 700 200 R 40 40 1 1 I X DI1 24 -700 600 200 R 40 40 1 1 I X DI2 25 -700 500 200 R 40 40 1 1 I X DI3 26 -700 400 200 R 40 40 1 1 I X DI4 27 -700 300 200 R 40 40 1 1 I X DI5 28 -700 200 200 R 40 40 1 1 I X DI6 17 -700 100 200 R 40 40 1 1 I X DI7 16 -700 0 200 R 40 40 1 1 I X DI8/CI3 15 -700 -100 200 R 40 40 1 1 I X DI9/CI2 14 -700 -200 200 R 40 40 1 1 I X DMS 9 -700 -800 200 R 40 40 1 1 I X RESET 8 700 -800 200 L 40 40 1 1 I I X SEROUT+ 3 700 700 200 L 40 40 1 1 O X SEROUT- 4 700 600 200 L 40 40 1 1 O X STRB 2 -700 -600 200 R 40 40 1 1 I X TLS 10 700 -500 200 L 40 40 1 1 I X TSERIN 11 700 -400 200 L 40 40 1 1 I X X1 20 700 300 200 L 40 40 1 1 I X X2 19 700 -100 200 L 40 40 1 1 I # Gate Name: P # Symbol Name: AM7968PW P 2 2 0 0 -500 200 500 200 P 2 2 0 0 500 200 500 -200 P 2 2 0 0 500 -200 -500 -200 P 2 2 0 0 -500 -200 -500 200 X GND1TTL 22 700 0 200 L 40 40 2 1 W X GND2CML 21 700 -100 200 L 40 40 2 1 W X VCC1TTL 6 -700 100 200 R 40 40 2 1 W X VCC2ECL 5 -700 0 200 R 40 40 2 1 W X VCC3CML 7 -700 -100 200 R 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: AM7968-175JC # Package Name: PLCC28S # Dev Tech: -175 # Dev Prefix: IC # Gate count = 2 # DEF AM7968-175JC IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: AM7968 F0 "IC" -500 800 50 H V L B F1 "AM7968-175JC" -500 -1000 50 H V L B F2 "amd_taxi-PLCC28S" 0 150 50 H I C C DRAW P 2 1 0 0 -500 800 500 800 P 2 1 0 0 500 800 500 -900 P 2 1 0 0 500 -900 -500 -900 P 2 1 0 0 -500 -900 -500 800 X ACK 1 -700 -700 200 R 40 40 1 1 O X CI0 12 -700 -400 200 R 40 40 1 1 I X CI1 13 -700 -300 200 R 40 40 1 1 I X CLK 18 700 -700 200 L 40 40 1 1 O C X DI0 23 -700 700 200 R 40 40 1 1 I X DI1 24 -700 600 200 R 40 40 1 1 I X DI2 25 -700 500 200 R 40 40 1 1 I X DI3 26 -700 400 200 R 40 40 1 1 I X DI4 27 -700 300 200 R 40 40 1 1 I X DI5 28 -700 200 200 R 40 40 1 1 I X DI6 17 -700 100 200 R 40 40 1 1 I X DI7 16 -700 0 200 R 40 40 1 1 I X DI8/CI3 15 -700 -100 200 R 40 40 1 1 I X DI9/CI2 14 -700 -200 200 R 40 40 1 1 I X DMS 9 -700 -800 200 R 40 40 1 1 I X RESET 8 700 -800 200 L 40 40 1 1 I I X SEROUT+ 3 700 700 200 L 40 40 1 1 O X SEROUT- 4 700 600 200 L 40 40 1 1 O X STRB 2 -700 -600 200 R 40 40 1 1 I X TLS 10 700 -500 200 L 40 40 1 1 I X TSERIN 11 700 -400 200 L 40 40 1 1 I X X1 20 700 300 200 L 40 40 1 1 I X X2 19 700 -100 200 L 40 40 1 1 I # Gate Name: P # Symbol Name: AM7968PW P 2 2 0 0 -500 200 500 200 P 2 2 0 0 500 200 500 -200 P 2 2 0 0 500 -200 -500 -200 P 2 2 0 0 -500 -200 -500 200 X GND1TTL 22 700 0 200 L 40 40 2 1 W X GND2CML 21 700 -100 200 L 40 40 2 1 W X VCC1TTL 6 -700 100 200 R 40 40 2 1 W X VCC2ECL 5 -700 0 200 R 40 40 2 1 W X VCC3CML 7 -700 -100 200 R 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: AM7968-175PC # Package Name: DIP28-6 # Dev Tech: -175 # Dev Prefix: IC # Gate count = 2 # DEF AM7968-175PC IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: AM7968 F0 "IC" -500 800 50 H V L B F1 "AM7968-175PC" -500 -1000 50 H V L B F2 "amd_taxi-DIP28-6" 0 150 50 H I C C DRAW P 2 1 0 0 -500 800 500 800 P 2 1 0 0 500 800 500 -900 P 2 1 0 0 500 -900 -500 -900 P 2 1 0 0 -500 -900 -500 800 X ACK 1 -700 -700 200 R 40 40 1 1 O X CI0 12 -700 -400 200 R 40 40 1 1 I X CI1 13 -700 -300 200 R 40 40 1 1 I X CLK 18 700 -700 200 L 40 40 1 1 O C X DI0 23 -700 700 200 R 40 40 1 1 I X DI1 24 -700 600 200 R 40 40 1 1 I X DI2 25 -700 500 200 R 40 40 1 1 I X DI3 26 -700 400 200 R 40 40 1 1 I X DI4 27 -700 300 200 R 40 40 1 1 I X DI5 28 -700 200 200 R 40 40 1 1 I X DI6 17 -700 100 200 R 40 40 1 1 I X DI7 16 -700 0 200 R 40 40 1 1 I X DI8/CI3 15 -700 -100 200 R 40 40 1 1 I X DI9/CI2 14 -700 -200 200 R 40 40 1 1 I X DMS 9 -700 -800 200 R 40 40 1 1 I X RESET 8 700 -800 200 L 40 40 1 1 I I X SEROUT+ 3 700 700 200 L 40 40 1 1 O X SEROUT- 4 700 600 200 L 40 40 1 1 O X STRB 2 -700 -600 200 R 40 40 1 1 I X TLS 10 700 -500 200 L 40 40 1 1 I X TSERIN 11 700 -400 200 L 40 40 1 1 I X X1 20 700 300 200 L 40 40 1 1 I X X2 19 700 -100 200 L 40 40 1 1 I # Gate Name: P # Symbol Name: AM7968PW P 2 2 0 0 -500 200 500 200 P 2 2 0 0 500 200 500 -200 P 2 2 0 0 500 -200 -500 -200 P 2 2 0 0 -500 -200 -500 200 X GND1TTL 22 700 0 200 L 40 40 2 1 W X GND2CML 21 700 -100 200 L 40 40 2 1 W X VCC1TTL 6 -700 100 200 R 40 40 2 1 W X VCC2ECL 5 -700 0 200 R 40 40 2 1 W X VCC3CML 7 -700 -100 200 R 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: AM7969-125/DKC # Package Name: DIP28-6 # Dev Tech: -125 # Dev Prefix: IC # Gate count = 2 # DEF AM7969-125/DKC IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: AM7969 F0 "IC" -500 800 50 H V L B F1 "AM7969-125/DKC" -500 -1000 50 H V L B F2 "amd_taxi-DIP28-6" 0 150 50 H I C C DRAW P 2 1 0 0 -500 800 500 800 P 2 1 0 0 500 800 500 -900 P 2 1 0 0 500 -900 -500 -900 P 2 1 0 0 -500 -900 -500 800 X CLK 19 -700 -600 200 R 40 40 1 1 O X CNB 24 -700 -300 200 R 40 40 1 1 I X CO0 15 700 -400 200 L 40 40 1 1 O X CO1 16 700 -300 200 L 40 40 1 1 O X CSTRB 13 700 -700 200 L 40 40 1 1 O X DMS 11 -700 -800 200 R 40 40 1 1 I X DO0 4 700 700 200 L 40 40 1 1 O X DO1 3 700 600 200 L 40 40 1 1 O X DO2 2 700 500 200 L 40 40 1 1 O X DO3 1 700 400 200 L 40 40 1 1 O X DO4 28 700 300 200 L 40 40 1 1 O X DO5 27 700 200 200 L 40 40 1 1 O X DO6 26 700 100 200 L 40 40 1 1 O X DO7 25 700 0 200 L 40 40 1 1 O X DO8/CO3 18 700 -100 200 L 40 40 1 1 O X DO9/CO2 17 700 -200 200 L 40 40 1 1 O X DSTRB 12 700 -600 200 L 40 40 1 1 O X IGM 5 -700 -400 200 R 40 40 1 1 O X RESET 6 -700 -700 200 R 40 40 1 1 I I X SERIN+ 9 -700 700 200 R 40 40 1 1 I X SERIN- 10 -700 600 200 R 40 40 1 1 I X VLTN 14 700 -800 200 L 40 40 1 1 O X X1 22 -700 300 200 R 40 40 1 1 I X X2 23 -700 -100 200 R 40 40 1 1 I # Gate Name: P # Symbol Name: AM7969PW P 2 2 0 0 -500 300 500 300 P 2 2 0 0 500 300 500 -100 P 2 2 0 0 500 -100 -500 -100 P 2 2 0 0 -500 -100 -500 300 X GND1TTL 20 700 100 200 L 40 40 2 1 W X GND2CML 21 700 0 200 L 40 40 2 1 W X VCC1TTL 7 -700 100 200 R 40 40 2 1 W X VCC2CML 8 -700 0 200 R 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: AM7969-125/DMC # Package Name: DIP28-6 # Dev Tech: -125 # Dev Prefix: IC # Gate count = 2 # DEF AM7969-125/DMC IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: AM7969 F0 "IC" -500 800 50 H V L B F1 "AM7969-125/DMC" -500 -1000 50 H V L B F2 "amd_taxi-DIP28-6" 0 150 50 H I C C DRAW P 2 1 0 0 -500 800 500 800 P 2 1 0 0 500 800 500 -900 P 2 1 0 0 500 -900 -500 -900 P 2 1 0 0 -500 -900 -500 800 X CLK 19 -700 -600 200 R 40 40 1 1 O X CNB 24 -700 -300 200 R 40 40 1 1 I X CO0 15 700 -400 200 L 40 40 1 1 O X CO1 16 700 -300 200 L 40 40 1 1 O X CSTRB 13 700 -700 200 L 40 40 1 1 O X DMS 11 -700 -800 200 R 40 40 1 1 I X DO0 4 700 700 200 L 40 40 1 1 O X DO1 3 700 600 200 L 40 40 1 1 O X DO2 2 700 500 200 L 40 40 1 1 O X DO3 1 700 400 200 L 40 40 1 1 O X DO4 28 700 300 200 L 40 40 1 1 O X DO5 27 700 200 200 L 40 40 1 1 O X DO6 26 700 100 200 L 40 40 1 1 O X DO7 25 700 0 200 L 40 40 1 1 O X DO8/CO3 18 700 -100 200 L 40 40 1 1 O X DO9/CO2 17 700 -200 200 L 40 40 1 1 O X DSTRB 12 700 -600 200 L 40 40 1 1 O X IGM 5 -700 -400 200 R 40 40 1 1 O X RESET 6 -700 -700 200 R 40 40 1 1 I I X SERIN+ 9 -700 700 200 R 40 40 1 1 I X SERIN- 10 -700 600 200 R 40 40 1 1 I X VLTN 14 700 -800 200 L 40 40 1 1 O X X1 22 -700 300 200 R 40 40 1 1 I X X2 23 -700 -100 200 R 40 40 1 1 I # Gate Name: P # Symbol Name: AM7969PW P 2 2 0 0 -500 300 500 300 P 2 2 0 0 500 300 500 -100 P 2 2 0 0 500 -100 -500 -100 P 2 2 0 0 -500 -100 -500 300 X GND1TTL 20 700 100 200 L 40 40 2 1 W X GND2CML 21 700 0 200 L 40 40 2 1 W X VCC1TTL 7 -700 100 200 R 40 40 2 1 W X VCC2CML 8 -700 0 200 R 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: AM7969-125/LKC # Package Name: LCC28 # Dev Tech: -125 # Dev Prefix: IC # Gate count = 2 # DEF AM7969-125/LKC IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: AM7969 F0 "IC" -500 800 50 H V L B F1 "AM7969-125/LKC" -500 -1000 50 H V L B F2 "amd_taxi-LCC28" 0 150 50 H I C C DRAW P 2 1 0 0 -500 800 500 800 P 2 1 0 0 500 800 500 -900 P 2 1 0 0 500 -900 -500 -900 P 2 1 0 0 -500 -900 -500 800 X CLK 19 -700 -600 200 R 40 40 1 1 O X CNB 24 -700 -300 200 R 40 40 1 1 I X CO0 15 700 -400 200 L 40 40 1 1 O X CO1 16 700 -300 200 L 40 40 1 1 O X CSTRB 13 700 -700 200 L 40 40 1 1 O X DMS 11 -700 -800 200 R 40 40 1 1 I X DO0 4 700 700 200 L 40 40 1 1 O X DO1 3 700 600 200 L 40 40 1 1 O X DO2 2 700 500 200 L 40 40 1 1 O X DO3 1 700 400 200 L 40 40 1 1 O X DO4 28 700 300 200 L 40 40 1 1 O X DO5 27 700 200 200 L 40 40 1 1 O X DO6 26 700 100 200 L 40 40 1 1 O X DO7 25 700 0 200 L 40 40 1 1 O X DO8/CO3 18 700 -100 200 L 40 40 1 1 O X DO9/CO2 17 700 -200 200 L 40 40 1 1 O X DSTRB 12 700 -600 200 L 40 40 1 1 O X IGM 5 -700 -400 200 R 40 40 1 1 O X RESET 6 -700 -700 200 R 40 40 1 1 I I X SERIN+ 9 -700 700 200 R 40 40 1 1 I X SERIN- 10 -700 600 200 R 40 40 1 1 I X VLTN 14 700 -800 200 L 40 40 1 1 O X X1 22 -700 300 200 R 40 40 1 1 I X X2 23 -700 -100 200 R 40 40 1 1 I # Gate Name: P # Symbol Name: AM7969PW P 2 2 0 0 -500 300 500 300 P 2 2 0 0 500 300 500 -100 P 2 2 0 0 500 -100 -500 -100 P 2 2 0 0 -500 -100 -500 300 X GND1TTL 20 700 100 200 L 40 40 2 1 W X GND2CML 21 700 0 200 L 40 40 2 1 W X VCC1TTL 7 -700 100 200 R 40 40 2 1 W X VCC2CML 8 -700 0 200 R 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: AM7969-125/LMC # Package Name: LCC28 # Dev Tech: -125 # Dev Prefix: IC # Gate count = 2 # DEF AM7969-125/LMC IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: AM7969 F0 "IC" -500 800 50 H V L B F1 "AM7969-125/LMC" -500 -1000 50 H V L B F2 "amd_taxi-LCC28" 0 150 50 H I C C DRAW P 2 1 0 0 -500 800 500 800 P 2 1 0 0 500 800 500 -900 P 2 1 0 0 500 -900 -500 -900 P 2 1 0 0 -500 -900 -500 800 X CLK 19 -700 -600 200 R 40 40 1 1 O X CNB 24 -700 -300 200 R 40 40 1 1 I X CO0 15 700 -400 200 L 40 40 1 1 O X CO1 16 700 -300 200 L 40 40 1 1 O X CSTRB 13 700 -700 200 L 40 40 1 1 O X DMS 11 -700 -800 200 R 40 40 1 1 I X DO0 4 700 700 200 L 40 40 1 1 O X DO1 3 700 600 200 L 40 40 1 1 O X DO2 2 700 500 200 L 40 40 1 1 O X DO3 1 700 400 200 L 40 40 1 1 O X DO4 28 700 300 200 L 40 40 1 1 O X DO5 27 700 200 200 L 40 40 1 1 O X DO6 26 700 100 200 L 40 40 1 1 O X DO7 25 700 0 200 L 40 40 1 1 O X DO8/CO3 18 700 -100 200 L 40 40 1 1 O X DO9/CO2 17 700 -200 200 L 40 40 1 1 O X DSTRB 12 700 -600 200 L 40 40 1 1 O X IGM 5 -700 -400 200 R 40 40 1 1 O X RESET 6 -700 -700 200 R 40 40 1 1 I I X SERIN+ 9 -700 700 200 R 40 40 1 1 I X SERIN- 10 -700 600 200 R 40 40 1 1 I X VLTN 14 700 -800 200 L 40 40 1 1 O X X1 22 -700 300 200 R 40 40 1 1 I X X2 23 -700 -100 200 R 40 40 1 1 I # Gate Name: P # Symbol Name: AM7969PW P 2 2 0 0 -500 300 500 300 P 2 2 0 0 500 300 500 -100 P 2 2 0 0 500 -100 -500 -100 P 2 2 0 0 -500 -100 -500 300 X GND1TTL 20 700 100 200 L 40 40 2 1 W X GND2CML 21 700 0 200 L 40 40 2 1 W X VCC1TTL 7 -700 100 200 R 40 40 2 1 W X VCC2CML 8 -700 0 200 R 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: AM7969-125DC # Package Name: DIP28-6 # Dev Tech: -125 # Dev Prefix: IC # Gate count = 2 # DEF AM7969-125DC IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: AM7969 F0 "IC" -500 800 50 H V L B F1 "AM7969-125DC" -500 -1000 50 H V L B F2 "amd_taxi-DIP28-6" 0 150 50 H I C C DRAW P 2 1 0 0 -500 800 500 800 P 2 1 0 0 500 800 500 -900 P 2 1 0 0 500 -900 -500 -900 P 2 1 0 0 -500 -900 -500 800 X CLK 19 -700 -600 200 R 40 40 1 1 O X CNB 24 -700 -300 200 R 40 40 1 1 I X CO0 15 700 -400 200 L 40 40 1 1 O X CO1 16 700 -300 200 L 40 40 1 1 O X CSTRB 13 700 -700 200 L 40 40 1 1 O X DMS 11 -700 -800 200 R 40 40 1 1 I X DO0 4 700 700 200 L 40 40 1 1 O X DO1 3 700 600 200 L 40 40 1 1 O X DO2 2 700 500 200 L 40 40 1 1 O X DO3 1 700 400 200 L 40 40 1 1 O X DO4 28 700 300 200 L 40 40 1 1 O X DO5 27 700 200 200 L 40 40 1 1 O X DO6 26 700 100 200 L 40 40 1 1 O X DO7 25 700 0 200 L 40 40 1 1 O X DO8/CO3 18 700 -100 200 L 40 40 1 1 O X DO9/CO2 17 700 -200 200 L 40 40 1 1 O X DSTRB 12 700 -600 200 L 40 40 1 1 O X IGM 5 -700 -400 200 R 40 40 1 1 O X RESET 6 -700 -700 200 R 40 40 1 1 I I X SERIN+ 9 -700 700 200 R 40 40 1 1 I X SERIN- 10 -700 600 200 R 40 40 1 1 I X VLTN 14 700 -800 200 L 40 40 1 1 O X X1 22 -700 300 200 R 40 40 1 1 I X X2 23 -700 -100 200 R 40 40 1 1 I # Gate Name: P # Symbol Name: AM7969PW P 2 2 0 0 -500 300 500 300 P 2 2 0 0 500 300 500 -100 P 2 2 0 0 500 -100 -500 -100 P 2 2 0 0 -500 -100 -500 300 X GND1TTL 20 700 100 200 L 40 40 2 1 W X GND2CML 21 700 0 200 L 40 40 2 1 W X VCC1TTL 7 -700 100 200 R 40 40 2 1 W X VCC2CML 8 -700 0 200 R 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: AM7969-125JC # Package Name: PLCC28S # Dev Tech: -125 # Dev Prefix: IC # Gate count = 2 # DEF AM7969-125JC IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: AM7969 F0 "IC" -500 800 50 H V L B F1 "AM7969-125JC" -500 -1000 50 H V L B F2 "amd_taxi-PLCC28S" 0 150 50 H I C C DRAW P 2 1 0 0 -500 800 500 800 P 2 1 0 0 500 800 500 -900 P 2 1 0 0 500 -900 -500 -900 P 2 1 0 0 -500 -900 -500 800 X CLK 19 -700 -600 200 R 40 40 1 1 O X CNB 24 -700 -300 200 R 40 40 1 1 I X CO0 15 700 -400 200 L 40 40 1 1 O X CO1 16 700 -300 200 L 40 40 1 1 O X CSTRB 13 700 -700 200 L 40 40 1 1 O X DMS 11 -700 -800 200 R 40 40 1 1 I X DO0 4 700 700 200 L 40 40 1 1 O X DO1 3 700 600 200 L 40 40 1 1 O X DO2 2 700 500 200 L 40 40 1 1 O X DO3 1 700 400 200 L 40 40 1 1 O X DO4 28 700 300 200 L 40 40 1 1 O X DO5 27 700 200 200 L 40 40 1 1 O X DO6 26 700 100 200 L 40 40 1 1 O X DO7 25 700 0 200 L 40 40 1 1 O X DO8/CO3 18 700 -100 200 L 40 40 1 1 O X DO9/CO2 17 700 -200 200 L 40 40 1 1 O X DSTRB 12 700 -600 200 L 40 40 1 1 O X IGM 5 -700 -400 200 R 40 40 1 1 O X RESET 6 -700 -700 200 R 40 40 1 1 I I X SERIN+ 9 -700 700 200 R 40 40 1 1 I X SERIN- 10 -700 600 200 R 40 40 1 1 I X VLTN 14 700 -800 200 L 40 40 1 1 O X X1 22 -700 300 200 R 40 40 1 1 I X X2 23 -700 -100 200 R 40 40 1 1 I # Gate Name: P # Symbol Name: AM7969PW P 2 2 0 0 -500 300 500 300 P 2 2 0 0 500 300 500 -100 P 2 2 0 0 500 -100 -500 -100 P 2 2 0 0 -500 -100 -500 300 X GND1TTL 20 700 100 200 L 40 40 2 1 W X GND2CML 21 700 0 200 L 40 40 2 1 W X VCC1TTL 7 -700 100 200 R 40 40 2 1 W X VCC2CML 8 -700 0 200 R 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: AM7969-125PC # Package Name: DIP28-6 # Dev Tech: -125 # Dev Prefix: IC # Gate count = 2 # DEF AM7969-125PC IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: AM7969 F0 "IC" -500 800 50 H V L B F1 "AM7969-125PC" -500 -1000 50 H V L B F2 "amd_taxi-DIP28-6" 0 150 50 H I C C DRAW P 2 1 0 0 -500 800 500 800 P 2 1 0 0 500 800 500 -900 P 2 1 0 0 500 -900 -500 -900 P 2 1 0 0 -500 -900 -500 800 X CLK 19 -700 -600 200 R 40 40 1 1 O X CNB 24 -700 -300 200 R 40 40 1 1 I X CO0 15 700 -400 200 L 40 40 1 1 O X CO1 16 700 -300 200 L 40 40 1 1 O X CSTRB 13 700 -700 200 L 40 40 1 1 O X DMS 11 -700 -800 200 R 40 40 1 1 I X DO0 4 700 700 200 L 40 40 1 1 O X DO1 3 700 600 200 L 40 40 1 1 O X DO2 2 700 500 200 L 40 40 1 1 O X DO3 1 700 400 200 L 40 40 1 1 O X DO4 28 700 300 200 L 40 40 1 1 O X DO5 27 700 200 200 L 40 40 1 1 O X DO6 26 700 100 200 L 40 40 1 1 O X DO7 25 700 0 200 L 40 40 1 1 O X DO8/CO3 18 700 -100 200 L 40 40 1 1 O X DO9/CO2 17 700 -200 200 L 40 40 1 1 O X DSTRB 12 700 -600 200 L 40 40 1 1 O X IGM 5 -700 -400 200 R 40 40 1 1 O X RESET 6 -700 -700 200 R 40 40 1 1 I I X SERIN+ 9 -700 700 200 R 40 40 1 1 I X SERIN- 10 -700 600 200 R 40 40 1 1 I X VLTN 14 700 -800 200 L 40 40 1 1 O X X1 22 -700 300 200 R 40 40 1 1 I X X2 23 -700 -100 200 R 40 40 1 1 I # Gate Name: P # Symbol Name: AM7969PW P 2 2 0 0 -500 300 500 300 P 2 2 0 0 500 300 500 -100 P 2 2 0 0 500 -100 -500 -100 P 2 2 0 0 -500 -100 -500 300 X GND1TTL 20 700 100 200 L 40 40 2 1 W X GND2CML 21 700 0 200 L 40 40 2 1 W X VCC1TTL 7 -700 100 200 R 40 40 2 1 W X VCC2CML 8 -700 0 200 R 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: AM7969-175DC # Package Name: DIP28-6 # Dev Tech: -175 # Dev Prefix: IC # Gate count = 2 # DEF AM7969-175DC IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: AM7969 F0 "IC" -500 800 50 H V L B F1 "AM7969-175DC" -500 -1000 50 H V L B F2 "amd_taxi-DIP28-6" 0 150 50 H I C C DRAW P 2 1 0 0 -500 800 500 800 P 2 1 0 0 500 800 500 -900 P 2 1 0 0 500 -900 -500 -900 P 2 1 0 0 -500 -900 -500 800 X CLK 19 -700 -600 200 R 40 40 1 1 O X CNB 24 -700 -300 200 R 40 40 1 1 I X CO0 15 700 -400 200 L 40 40 1 1 O X CO1 16 700 -300 200 L 40 40 1 1 O X CSTRB 13 700 -700 200 L 40 40 1 1 O X DMS 11 -700 -800 200 R 40 40 1 1 I X DO0 4 700 700 200 L 40 40 1 1 O X DO1 3 700 600 200 L 40 40 1 1 O X DO2 2 700 500 200 L 40 40 1 1 O X DO3 1 700 400 200 L 40 40 1 1 O X DO4 28 700 300 200 L 40 40 1 1 O X DO5 27 700 200 200 L 40 40 1 1 O X DO6 26 700 100 200 L 40 40 1 1 O X DO7 25 700 0 200 L 40 40 1 1 O X DO8/CO3 18 700 -100 200 L 40 40 1 1 O X DO9/CO2 17 700 -200 200 L 40 40 1 1 O X DSTRB 12 700 -600 200 L 40 40 1 1 O X IGM 5 -700 -400 200 R 40 40 1 1 O X RESET 6 -700 -700 200 R 40 40 1 1 I I X SERIN+ 9 -700 700 200 R 40 40 1 1 I X SERIN- 10 -700 600 200 R 40 40 1 1 I X VLTN 14 700 -800 200 L 40 40 1 1 O X X1 22 -700 300 200 R 40 40 1 1 I X X2 23 -700 -100 200 R 40 40 1 1 I # Gate Name: P # Symbol Name: AM7969PW P 2 2 0 0 -500 300 500 300 P 2 2 0 0 500 300 500 -100 P 2 2 0 0 500 -100 -500 -100 P 2 2 0 0 -500 -100 -500 300 X GND1TTL 20 700 100 200 L 40 40 2 1 W X GND2CML 21 700 0 200 L 40 40 2 1 W X VCC1TTL 7 -700 100 200 R 40 40 2 1 W X VCC2CML 8 -700 0 200 R 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: AM7969-175JC # Package Name: PLCC28S # Dev Tech: -175 # Dev Prefix: IC # Gate count = 2 # DEF AM7969-175JC IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: AM7969 F0 "IC" -500 800 50 H V L B F1 "AM7969-175JC" -500 -1000 50 H V L B F2 "amd_taxi-PLCC28S" 0 150 50 H I C C DRAW P 2 1 0 0 -500 800 500 800 P 2 1 0 0 500 800 500 -900 P 2 1 0 0 500 -900 -500 -900 P 2 1 0 0 -500 -900 -500 800 X CLK 19 -700 -600 200 R 40 40 1 1 O X CNB 24 -700 -300 200 R 40 40 1 1 I X CO0 15 700 -400 200 L 40 40 1 1 O X CO1 16 700 -300 200 L 40 40 1 1 O X CSTRB 13 700 -700 200 L 40 40 1 1 O X DMS 11 -700 -800 200 R 40 40 1 1 I X DO0 4 700 700 200 L 40 40 1 1 O X DO1 3 700 600 200 L 40 40 1 1 O X DO2 2 700 500 200 L 40 40 1 1 O X DO3 1 700 400 200 L 40 40 1 1 O X DO4 28 700 300 200 L 40 40 1 1 O X DO5 27 700 200 200 L 40 40 1 1 O X DO6 26 700 100 200 L 40 40 1 1 O X DO7 25 700 0 200 L 40 40 1 1 O X DO8/CO3 18 700 -100 200 L 40 40 1 1 O X DO9/CO2 17 700 -200 200 L 40 40 1 1 O X DSTRB 12 700 -600 200 L 40 40 1 1 O X IGM 5 -700 -400 200 R 40 40 1 1 O X RESET 6 -700 -700 200 R 40 40 1 1 I I X SERIN+ 9 -700 700 200 R 40 40 1 1 I X SERIN- 10 -700 600 200 R 40 40 1 1 I X VLTN 14 700 -800 200 L 40 40 1 1 O X X1 22 -700 300 200 R 40 40 1 1 I X X2 23 -700 -100 200 R 40 40 1 1 I # Gate Name: P # Symbol Name: AM7969PW P 2 2 0 0 -500 300 500 300 P 2 2 0 0 500 300 500 -100 P 2 2 0 0 500 -100 -500 -100 P 2 2 0 0 -500 -100 -500 300 X GND1TTL 20 700 100 200 L 40 40 2 1 W X GND2CML 21 700 0 200 L 40 40 2 1 W X VCC1TTL 7 -700 100 200 R 40 40 2 1 W X VCC2CML 8 -700 0 200 R 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: AM7969-175PC # Package Name: DIP28-6 # Dev Tech: -175 # Dev Prefix: IC # Gate count = 2 # DEF AM7969-175PC IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: AM7969 F0 "IC" -500 800 50 H V L B F1 "AM7969-175PC" -500 -1000 50 H V L B F2 "amd_taxi-DIP28-6" 0 150 50 H I C C DRAW P 2 1 0 0 -500 800 500 800 P 2 1 0 0 500 800 500 -900 P 2 1 0 0 500 -900 -500 -900 P 2 1 0 0 -500 -900 -500 800 X CLK 19 -700 -600 200 R 40 40 1 1 O X CNB 24 -700 -300 200 R 40 40 1 1 I X CO0 15 700 -400 200 L 40 40 1 1 O X CO1 16 700 -300 200 L 40 40 1 1 O X CSTRB 13 700 -700 200 L 40 40 1 1 O X DMS 11 -700 -800 200 R 40 40 1 1 I X DO0 4 700 700 200 L 40 40 1 1 O X DO1 3 700 600 200 L 40 40 1 1 O X DO2 2 700 500 200 L 40 40 1 1 O X DO3 1 700 400 200 L 40 40 1 1 O X DO4 28 700 300 200 L 40 40 1 1 O X DO5 27 700 200 200 L 40 40 1 1 O X DO6 26 700 100 200 L 40 40 1 1 O X DO7 25 700 0 200 L 40 40 1 1 O X DO8/CO3 18 700 -100 200 L 40 40 1 1 O X DO9/CO2 17 700 -200 200 L 40 40 1 1 O X DSTRB 12 700 -600 200 L 40 40 1 1 O X IGM 5 -700 -400 200 R 40 40 1 1 O X RESET 6 -700 -700 200 R 40 40 1 1 I I X SERIN+ 9 -700 700 200 R 40 40 1 1 I X SERIN- 10 -700 600 200 R 40 40 1 1 I X VLTN 14 700 -800 200 L 40 40 1 1 O X X1 22 -700 300 200 R 40 40 1 1 I X X2 23 -700 -100 200 R 40 40 1 1 I # Gate Name: P # Symbol Name: AM7969PW P 2 2 0 0 -500 300 500 300 P 2 2 0 0 500 300 500 -100 P 2 2 0 0 500 -100 -500 -100 P 2 2 0 0 -500 -100 -500 300 X GND1TTL 20 700 100 200 L 40 40 2 1 W X GND2CML 21 700 0 200 L 40 40 2 1 W X VCC1TTL 7 -700 100 200 R 40 40 2 1 W X VCC2CML 8 -700 0 200 R 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: IMSC011M1-E20S # Package Name: SOJ28-3 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF IMSC011M1-E20S IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: IMSC011M F0 "IC" -500 700 50 H V L B F1 "IMSC011M1-E20S" -500 -800 50 H V L B F2 "amd_taxi-SOJ28-3" 0 150 50 H I C C DRAW P 2 1 0 0 -500 700 600 700 P 2 1 0 0 600 700 600 -700 P 2 1 0 0 600 -700 -500 -700 P 2 1 0 0 -500 -700 -500 700 X CAPMINUS 27 800 600 200 L 40 40 1 1 B X CLOCKIN 15 800 -600 200 L 40 40 1 1 I X I0 5 -700 200 200 R 40 40 1 1 I X I1 6 -700 100 200 R 40 40 1 1 I X I2 7 -700 0 200 R 40 40 1 1 I X I3 8 -700 -100 200 R 40 40 1 1 I X I4 9 -700 -200 200 R 40 40 1 1 I X I5 10 -700 -300 200 R 40 40 1 1 I X I6 11 -700 -400 200 R 40 40 1 1 I X I7 12 -700 -500 200 R 40 40 1 1 I X IACK 4 -700 300 200 R 40 40 1 1 O X IVALID 3 -700 400 200 R 40 40 1 1 I X LINKIN 2 -700 500 200 R 40 40 1 1 I X LINKOUT 1 -700 600 200 R 40 40 1 1 O X Q0 24 800 300 200 L 40 40 1 1 O X Q1 23 800 200 200 L 40 40 1 1 O X Q2 22 800 100 200 L 40 40 1 1 O X Q3 21 800 0 200 L 40 40 1 1 O X Q4 20 800 -100 200 L 40 40 1 1 O X Q5 19 800 -200 200 L 40 40 1 1 O X Q6 18 800 -300 200 L 40 40 1 1 O X Q7 17 800 -400 200 L 40 40 1 1 O X QACK 25 800 400 200 L 40 40 1 1 I X QVALID 26 800 500 200 L 40 40 1 1 O X RESET 13 -700 -600 200 R 40 40 1 1 I X SEPARATELQ 16 800 -500 200 L 40 40 1 1 I # Gate Name: P # Symbol Name: PWRN X GND 14 -100 -200 200 U 40 40 2 1 W X VCC 28 -100 400 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: IMSC011M1 # Package Name: SOJ28-3 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF IMSC011M1 IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: IMSC011M F0 "IC" -500 700 50 H V L B F1 "IMSC011M1" -500 -800 50 H V L B F2 "amd_taxi-SOJ28-3" 0 150 50 H I C C DRAW P 2 1 0 0 -500 700 600 700 P 2 1 0 0 600 700 600 -700 P 2 1 0 0 600 -700 -500 -700 P 2 1 0 0 -500 -700 -500 700 X CAPMINUS 27 800 600 200 L 40 40 1 1 B X CLOCKIN 15 800 -600 200 L 40 40 1 1 I X I0 5 -700 200 200 R 40 40 1 1 I X I1 6 -700 100 200 R 40 40 1 1 I X I2 7 -700 0 200 R 40 40 1 1 I X I3 8 -700 -100 200 R 40 40 1 1 I X I4 9 -700 -200 200 R 40 40 1 1 I X I5 10 -700 -300 200 R 40 40 1 1 I X I6 11 -700 -400 200 R 40 40 1 1 I X I7 12 -700 -500 200 R 40 40 1 1 I X IACK 4 -700 300 200 R 40 40 1 1 O X IVALID 3 -700 400 200 R 40 40 1 1 I X LINKIN 2 -700 500 200 R 40 40 1 1 I X LINKOUT 1 -700 600 200 R 40 40 1 1 O X Q0 24 800 300 200 L 40 40 1 1 O X Q1 23 800 200 200 L 40 40 1 1 O X Q2 22 800 100 200 L 40 40 1 1 O X Q3 21 800 0 200 L 40 40 1 1 O X Q4 20 800 -100 200 L 40 40 1 1 O X Q5 19 800 -200 200 L 40 40 1 1 O X Q6 18 800 -300 200 L 40 40 1 1 O X Q7 17 800 -400 200 L 40 40 1 1 O X QACK 25 800 400 200 L 40 40 1 1 I X QVALID 26 800 500 200 L 40 40 1 1 O X RESET 13 -700 -600 200 R 40 40 1 1 I X SEPARATELQ 16 800 -500 200 L 40 40 1 1 I # Gate Name: P # Symbol Name: PWRN X GND 14 -100 -200 200 U 40 40 2 1 W X VCC 28 -100 400 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: IMSC011M2-E20S # Package Name: SOJ28-3 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF IMSC011M2-E20S IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: IMSC011M2 F0 "IC" -700 700 50 H V L B F1 "IMSC011M2-E20S" -700 -800 50 H V L B F2 "amd_taxi-SOJ28-3" 0 150 50 H I C C DRAW P 2 1 0 0 -700 700 700 700 P 2 1 0 0 700 700 700 -700 P 2 1 0 0 700 -700 -700 -700 P 2 1 0 0 -700 -700 -700 700 X CAPMINUS 27 900 600 200 L 40 40 1 1 W X CLOCKIN 15 900 -600 200 L 40 40 1 1 B C X D0 24 900 300 200 L 40 40 1 1 B X D1 23 900 200 200 L 40 40 1 1 B X D2 22 900 100 200 L 40 40 1 1 B X D3 8 -900 -100 200 R 40 40 1 1 B X D4 20 900 -100 200 L 40 40 1 1 B X D5 10 -900 -300 200 R 40 40 1 1 B X D6 18 900 -300 200 L 40 40 1 1 B X D7 12 -900 -500 200 R 40 40 1 1 B X DONOTWIRE@1 7 -900 0 200 R 40 40 1 1 U X DONOTWIRE@2 9 -900 -200 200 R 40 40 1 1 U X DONOTWIRE@3 19 900 -200 200 L 40 40 1 1 U X DONOTWIRE@4 21 900 0 200 L 40 40 1 1 U X HOLDTOGND 11 -900 -400 200 R 40 40 1 1 W X INPUTINT 26 900 500 200 L 40 40 1 1 O X LINKIN 2 -900 500 200 R 40 40 1 1 I X LINKOUT 1 -900 600 200 R 40 40 1 1 O X LINKSPEED 17 900 -400 200 L 40 40 1 1 I X NOTCS 25 900 400 200 L 40 40 1 1 I X OUTPUTINT 4 -900 300 200 R 40 40 1 1 O X RESET 13 -900 -600 200 R 40 40 1 1 I X RNOTW 3 -900 400 200 R 40 40 1 1 I X RS0 5 -900 200 200 R 40 40 1 1 I X RS1 6 -900 100 200 R 40 40 1 1 I X SEPARATELQ 16 900 -500 200 L 40 40 1 1 I # Gate Name: P # Symbol Name: PWRN X GND 14 -100 -200 200 U 40 40 2 1 W X VCC 28 -100 400 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: ISP1032LT # Package Name: TQFP100 # Dev Tech: '' # Dev Prefix: IC # Gate count = 5 # DEF ISP1032LT IC 0 40 Y Y 5 L N # Gate Name: G$1 # Symbol Name: ISP1032L F0 "IC" -200 600 50 H V L B F1 "ISP1032LT" -200 -500 50 H V L B F2 "amd_taxi-TQFP100" 0 150 50 H I C C DRAW P 2 1 0 0 -1400 1500 1500 1500 P 2 1 0 0 1500 1500 1500 -1700 P 2 1 0 0 1500 -1700 -1400 -1700 P 2 1 0 0 -1400 -1700 -1400 1500 X I/O0 17 -1600 -400 200 R 40 40 1 1 B X I/O1 18 -1600 -500 200 R 40 40 1 1 B X I/O2 19 -1600 -600 200 R 40 40 1 1 B X I/O3 20 -1600 -700 200 R 40 40 1 1 B X I/O4 21 -1600 -800 200 R 40 40 1 1 B X I/O5 22 -1600 -900 200 R 40 40 1 1 B X I/O6 23 -1600 -1000 200 R 40 40 1 1 B X I/O7 28 -900 -1900 200 U 40 40 1 1 B X I/O8 29 -800 -1900 200 U 40 40 1 1 B X I/O9 30 -700 -1900 200 U 40 40 1 1 B X I/O10 31 -600 -1900 200 U 40 40 1 1 B X I/O11 32 -500 -1900 200 U 40 40 1 1 B X I/O12 33 -400 -1900 200 U 40 40 1 1 B X I/O13 34 -300 -1900 200 U 40 40 1 1 B X I/O14 35 -200 -1900 200 U 40 40 1 1 B X I/O15 36 -100 -1900 200 U 40 40 1 1 B X I/O16 40 200 -1900 200 U 40 40 1 1 B X I/O17 41 300 -1900 200 U 40 40 1 1 B X I/O18 42 400 -1900 200 U 40 40 1 1 B X I/O19 43 500 -1900 200 U 40 40 1 1 B X I/O20 44 600 -1900 200 U 40 40 1 1 B X I/O21 45 700 -1900 200 U 40 40 1 1 B X I/O22 46 800 -1900 200 U 40 40 1 1 B X I/O23 47 900 -1900 200 U 40 40 1 1 B X I/O24 48 1000 -1900 200 U 40 40 1 1 B X I/O25 53 1700 -1000 200 L 40 40 1 1 B X I/O26 54 1700 -900 200 L 40 40 1 1 B X I/O27 55 1700 -800 200 L 40 40 1 1 B X I/O28 56 1700 -700 200 L 40 40 1 1 B X I/O29 57 1700 -600 200 L 40 40 1 1 B X I/O30 58 1700 -500 200 L 40 40 1 1 B X I/O31 59 1700 -400 200 L 40 40 1 1 B X I/O32 67 1700 200 200 L 40 40 1 1 B X I/O33 68 1700 300 200 L 40 40 1 1 B X I/O34 69 1700 400 200 L 40 40 1 1 B X I/O35 70 1700 500 200 L 40 40 1 1 B X I/O36 71 1700 600 200 L 40 40 1 1 B X I/O37 72 1700 700 200 L 40 40 1 1 B X I/O38 73 1700 800 200 L 40 40 1 1 B X I/O39 78 1000 1700 200 D 40 40 1 1 B X I/O40 79 900 1700 200 D 40 40 1 1 B X I/O41 80 800 1700 200 D 40 40 1 1 B X I/O42 81 700 1700 200 D 40 40 1 1 B X I/O43 82 600 1700 200 D 40 40 1 1 B X I/O44 83 500 1700 200 D 40 40 1 1 B X I/O45 84 400 1700 200 D 40 40 1 1 B X I/O46 85 300 1700 200 D 40 40 1 1 B X I/O47 86 200 1700 200 D 40 40 1 1 B X I/O48 90 -100 1700 200 D 40 40 1 1 B X I/O49 91 -200 1700 200 D 40 40 1 1 B X I/O50 92 -300 1700 200 D 40 40 1 1 B X I/O51 93 -400 1700 200 D 40 40 1 1 B X I/O52 94 -500 1700 200 D 40 40 1 1 B X I/O53 95 -600 1700 200 D 40 40 1 1 B X I/O54 96 -700 1700 200 D 40 40 1 1 B X I/O55 97 -800 1700 200 D 40 40 1 1 B X I/O56 98 -900 1700 200 D 40 40 1 1 B X I/O57 3 -1600 800 200 R 40 40 1 1 B X I/O58 4 -1600 700 200 R 40 40 1 1 B X I/O59 5 -1600 600 200 R 40 40 1 1 B X I/O60 6 -1600 500 200 R 40 40 1 1 B X I/O61 7 -1600 400 200 R 40 40 1 1 B X I/O62 8 -1600 300 200 R 40 40 1 1 B X I/O63 9 -1600 200 200 R 40 40 1 1 B X IN3/SCLK 60 1700 -300 200 L 40 40 1 1 I C X IN4 66 1700 100 200 L 40 40 1 1 I X IN5 87 100 1700 200 D 40 40 1 1 I X IN6 89 0 1700 200 D 40 40 1 1 I X IN7 10 -1600 100 200 R 40 40 1 1 B X ISPEN/NC 14 -1600 -100 200 R 40 40 1 1 I I X MODE/IN1 37 0 -1900 200 U 40 40 1 1 I X NC@1 1 -1600 1000 200 R 40 40 1 1 U X NC@2 2 -1600 900 200 R 40 40 1 1 U X NC@3 24 -1600 -1100 200 R 40 40 1 1 U X NC@4 25 -1600 -1200 200 R 40 40 1 1 U X NC@5 26 -1100 -1900 200 U 40 40 1 1 U X NC@6 27 -1000 -1900 200 U 40 40 1 1 U X NC@7 49 1100 -1900 200 U 40 40 1 1 U X NC@8 50 1200 -1900 200 U 40 40 1 1 U X NC@9 51 1700 -1200 200 L 40 40 1 1 U X NC@10 52 1700 -1100 200 L 40 40 1 1 U X NC@11 74 1700 900 200 L 40 40 1 1 U X NC@12 75 1700 1000 200 L 40 40 1 1 U X NC@13 76 1200 1700 200 D 40 40 1 1 U X NC@14 77 1100 1700 200 D 40 40 1 1 U X NC@15 99 -1000 1700 200 D 40 40 1 1 U X NC@16 100 -1100 1700 200 D 40 40 1 1 U X RESET 15 -1600 -200 200 R 40 40 1 1 I I X SDI/IN0 16 -1600 -300 200 R 40 40 1 1 I X SDO/IN2 39 100 -1900 200 U 40 40 1 1 B X Y0 11 -1600 0 200 R 40 40 1 1 I C X Y1 65 1700 0 200 L 40 40 1 1 I C X Y2 62 1700 -100 200 L 40 40 1 1 I C X Y3 61 1700 -200 200 L 40 40 1 1 I C # Gate Name: P1 # Symbol Name: PWRN X GND 13 -100 -200 200 U 40 40 2 1 W X VCC 12 -100 400 200 D 40 40 2 1 W # Gate Name: P2 # Symbol Name: PWRN X GND 63 -100 -200 200 U 40 40 3 1 W X VCC 64 -100 400 200 D 40 40 3 1 W # Gate Name: P3 # Symbol Name: PWGND X GND 38 -100 -200 200 U 40 40 4 1 W # Gate Name: P4 # Symbol Name: PWGND X GND 88 -100 -200 200 U 40 40 5 1 W ENDDRAW ENDDEF # # Dev Name: ISP2032T # Package Name: QFP44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 3 # DEF ISP2032T IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: ISP2032T F0 "IC" -200 300 50 H V L B F1 "ISP2032T" -200 -300 50 H V L B F2 "amd_taxi-QFP44" 0 150 50 H I C C DRAW P 2 1 0 0 -900 900 900 900 P 2 1 0 0 900 900 900 -900 P 2 1 0 0 900 -900 -900 -900 P 2 1 0 0 -900 -900 -900 900 X GOE0 40 -100 1100 200 D 40 40 1 1 I X I/O0 9 -1100 -300 200 R 40 40 1 1 B X I/O1 10 -1100 -400 200 R 40 40 1 1 B X I/O2 11 -1100 -500 200 R 40 40 1 1 B X I/O3 12 -500 -1100 200 U 40 40 1 1 B X I/O4 13 -400 -1100 200 U 40 40 1 1 B X I/O5 14 -300 -1100 200 U 40 40 1 1 B X I/O6 15 -200 -1100 200 U 40 40 1 1 B X I/O7 16 -100 -1100 200 U 40 40 1 1 B X I/O8 19 100 -1100 200 U 40 40 1 1 B X I/O9 20 200 -1100 200 U 40 40 1 1 B X I/O10 21 300 -1100 200 U 40 40 1 1 B X I/O11 22 400 -1100 200 U 40 40 1 1 B X I/O12 23 1100 -500 200 L 40 40 1 1 B X I/O13 24 1100 -400 200 L 40 40 1 1 B X I/O14 25 1100 -300 200 L 40 40 1 1 B X I/O15 26 1100 -200 200 L 40 40 1 1 B X I/O16 31 1100 200 200 L 40 40 1 1 B X I/O17 32 1100 300 200 L 40 40 1 1 B X I/O18 33 1100 400 200 L 40 40 1 1 B X I/O19 34 400 1100 200 D 40 40 1 1 B X I/O20 35 300 1100 200 D 40 40 1 1 B X I/O21 36 200 1100 200 D 40 40 1 1 B X I/O22 37 100 1100 200 D 40 40 1 1 B X I/O23 38 0 1100 200 D 40 40 1 1 B X I/O24 41 -200 1100 200 D 40 40 1 1 B X I/O25 42 -300 1100 200 D 40 40 1 1 B X I/O26 43 -400 1100 200 D 40 40 1 1 B X I/O27 44 -500 1100 200 D 40 40 1 1 B X I/O28 1 -1100 400 200 R 40 40 1 1 B X I/O29 2 -1100 300 200 R 40 40 1 1 B X I/O30 3 -1100 200 200 R 40 40 1 1 B X I/O31 4 -1100 100 200 R 40 40 1 1 B X ISPEN/NC 7 -1100 -100 200 R 40 40 1 1 I I X MODE/NC 30 1100 100 200 L 40 40 1 1 I X RESET/Y1 29 1100 0 200 L 40 40 1 1 I IC X SCLK/Y2 27 1100 -100 200 L 40 40 1 1 I C X SDI/IN0 8 -1100 -200 200 R 40 40 1 1 I X SDO/IN1 18 0 -1100 200 U 40 40 1 1 B X Y0 5 -1100 0 200 R 40 40 1 1 I C # Gate Name: P1 # Symbol Name: PWRN X GND 17 -100 -200 200 U 40 40 2 1 W X VCC 6 -100 400 200 D 40 40 2 1 W # Gate Name: P2 # Symbol Name: PWRN X GND 39 -100 -200 200 U 40 40 3 1 W X VCC 28 -100 400 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: ISP2096-80LT # Package Name: TQFP128 # Dev Tech: -80L # Dev Prefix: IC # Gate count = 1 # DEF ISP2096-80LT IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: ISP2096 F0 "IC" -200 200 50 H V L B F1 "ISP2096-80LT" -200 -200 50 H V L B F2 "amd_taxi-TQFP128" 0 150 50 H I C C DRAW P 2 1 0 0 -2000 2000 2100 2000 P 2 1 0 0 2100 2000 2100 -2100 P 2 1 0 0 2100 -2100 -2000 -2100 P 2 1 0 0 -2000 -2100 -2000 2000 X GND 1 -2100 1500 100 R 40 40 1 1 W X GND@1 17 -2100 -100 100 R 40 40 1 1 W X GND@2 33 -1500 -2200 100 U 40 40 1 1 W X GND@3 49 100 -2200 100 U 40 40 1 1 W X GND@4 65 2200 -1600 100 L 40 40 1 1 W X GND@5 81 2200 0 100 L 40 40 1 1 W X GND@6 97 1600 2100 100 D 40 40 1 1 W X GND@7 112 100 2100 100 D 40 40 1 1 W X GOE0 64 1600 -2200 100 U 40 40 1 1 I X GOE1 114 -100 2100 100 D 40 40 1 1 W X I/O0 21 -2100 -500 100 R 40 40 1 1 B X I/O1 22 -2100 -600 100 R 40 40 1 1 B X I/O2 23 -2100 -700 100 R 40 40 1 1 B X I/O3 24 -2100 -800 100 R 40 40 1 1 B X I/O4 25 -2100 -900 100 R 40 40 1 1 B X I/O5 26 -2100 -1000 100 R 40 40 1 1 B X I/O6 27 -2100 -1100 100 R 40 40 1 1 B X I/O7 28 -2100 -1200 100 R 40 40 1 1 B X I/O8 29 -2100 -1300 100 R 40 40 1 1 B X I/O9 30 -2100 -1400 100 R 40 40 1 1 B X I/O10 31 -2100 -1500 100 R 40 40 1 1 B X I/O11 32 -2100 -1600 100 R 40 40 1 1 B X I/O12 34 -1400 -2200 100 U 40 40 1 1 B X I/O13 35 -1300 -2200 100 U 40 40 1 1 B X I/O14 36 -1200 -2200 100 U 40 40 1 1 B X I/O15 37 -1100 -2200 100 U 40 40 1 1 B X I/O16 38 -1000 -2200 100 U 40 40 1 1 B X I/O17 39 -900 -2200 100 U 40 40 1 1 B X I/O18 40 -800 -2200 100 U 40 40 1 1 B X I/O19 41 -700 -2200 100 U 40 40 1 1 B X I/O20 42 -600 -2200 100 U 40 40 1 1 B X I/O21 43 -500 -2200 100 U 40 40 1 1 B X I/O22 44 -400 -2200 100 U 40 40 1 1 B X I/O23 45 -300 -2200 100 U 40 40 1 1 B X I/O24 52 400 -2200 100 U 40 40 1 1 B X I/O25 53 500 -2200 100 U 40 40 1 1 B X I/O26 54 600 -2200 100 U 40 40 1 1 B X I/O27 55 700 -2200 100 U 40 40 1 1 B X I/O28 56 800 -2200 100 U 40 40 1 1 B X I/O29 57 900 -2200 100 U 40 40 1 1 B X I/O30 58 1000 -2200 100 U 40 40 1 1 B X I/O31 59 1100 -2200 100 U 40 40 1 1 B X I/O32 60 1200 -2200 100 U 40 40 1 1 B X I/O33 61 1300 -2200 100 U 40 40 1 1 B X I/O34 62 1400 -2200 100 U 40 40 1 1 B X I/O35 63 1500 -2200 100 U 40 40 1 1 B X I/O36 66 2200 -1500 100 L 40 40 1 1 B X I/O37 67 2200 -1400 100 L 40 40 1 1 B X I/O38 68 2200 -1300 100 L 40 40 1 1 B X I/O39 69 2200 -1200 100 L 40 40 1 1 B X I/O40 70 2200 -1100 100 L 40 40 1 1 B X I/O41 71 2200 -1000 100 L 40 40 1 1 B X I/O42 72 2200 -900 100 L 40 40 1 1 B X I/O43 73 2200 -800 100 L 40 40 1 1 B X I/O44 74 2200 -700 100 L 40 40 1 1 B X I/O45 75 2200 -600 100 L 40 40 1 1 B X I/O46 76 2200 -500 100 L 40 40 1 1 B X I/O47 77 2200 -400 100 L 40 40 1 1 B X I/O48 85 2200 400 100 L 40 40 1 1 B X I/O49 86 2200 500 100 L 40 40 1 1 B X I/O50 87 2200 600 100 L 40 40 1 1 B X I/O51 88 2200 700 100 L 40 40 1 1 B X I/O52 89 2200 800 100 L 40 40 1 1 B X I/O53 90 2200 900 100 L 40 40 1 1 B X I/O54 91 2200 1000 100 L 40 40 1 1 B X I/O55 92 2200 1100 100 L 40 40 1 1 B X I/O56 93 2200 1200 100 L 40 40 1 1 B X I/O57 94 2200 1300 100 L 40 40 1 1 B X I/O58 95 2200 1400 100 L 40 40 1 1 B X I/O59 96 2200 1500 100 L 40 40 1 1 B X I/O60 98 1500 2100 100 D 40 40 1 1 B X I/O61 99 1400 2100 100 D 40 40 1 1 B X I/O62 100 1300 2100 100 D 40 40 1 1 B X I/O63 101 1200 2100 100 D 40 40 1 1 B X I/O64 102 1100 2100 100 D 40 40 1 1 B X I/O65 103 1000 2100 100 D 40 40 1 1 B X I/O66 104 900 2100 100 D 40 40 1 1 B X I/O67 105 800 2100 100 D 40 40 1 1 B X I/O68 106 700 2100 100 D 40 40 1 1 B X I/O69 107 600 2100 100 D 40 40 1 1 B X I/O70 108 500 2100 100 D 40 40 1 1 B X I/O71 109 400 2100 100 D 40 40 1 1 B X I/O72 117 -400 2100 100 D 40 40 1 1 B X I/O73 118 -500 2100 100 D 40 40 1 1 B X I/O74 119 -600 2100 100 D 40 40 1 1 B X I/O75 120 -700 2100 100 D 40 40 1 1 B X I/O76 121 -800 2100 100 D 40 40 1 1 B X I/O77 122 -900 2100 100 D 40 40 1 1 B X I/O78 123 -1000 2100 100 D 40 40 1 1 B X I/O79 124 -1100 2100 100 D 40 40 1 1 B X I/O80 125 -1200 2100 100 D 40 40 1 1 B X I/O81 126 -1300 2100 100 D 40 40 1 1 B X I/O82 127 -1400 2100 100 D 40 40 1 1 B X I/O83 128 -1500 2100 100 D 40 40 1 1 B X I/O84 2 -2100 1400 100 R 40 40 1 1 B X I/O85 3 -2100 1300 100 R 40 40 1 1 B X I/O86 4 -2100 1200 100 R 40 40 1 1 B X I/O87 5 -2100 1100 100 R 40 40 1 1 B X I/O88 6 -2100 1000 100 R 40 40 1 1 B X I/O89 7 -2100 900 100 R 40 40 1 1 B X I/O90 8 -2100 800 100 R 40 40 1 1 B X I/O91 9 -2100 700 100 R 40 40 1 1 B X I/O92 10 -2100 600 100 R 40 40 1 1 B X I/O93 11 -2100 500 100 R 40 40 1 1 B X I/O94 12 -2100 400 100 R 40 40 1 1 B X I/O95 13 -2100 300 100 R 40 40 1 1 B X IN2 51 300 -2200 100 U 40 40 1 1 B X IN4 84 2200 300 100 L 40 40 1 1 I X IN5 110 300 2100 100 D 40 40 1 1 I X ISPEN\NC 18 -2100 -200 100 R 40 40 1 1 I X MODE/IN1 46 -200 -2200 100 U 40 40 1 1 I X NC 14 -2100 200 100 R 40 40 1 1 W X NC@1 47 -100 -2200 100 U 40 40 1 1 U X NC@2 79 200 2100 100 D 40 40 1 1 U X NC@3 111 2200 -200 100 L 40 40 1 1 U X NC@4 115 -200 2100 100 D 40 40 1 1 W X NC@5 116 -300 2100 100 D 40 40 1 1 W X RESET\ 19 -2100 -300 100 R 40 40 1 1 I X SCLK\IN3 78 2200 -300 100 L 40 40 1 1 I X SDI/IN0 20 -2100 -400 100 R 40 40 1 1 I X SDO/NC 50 200 -2200 100 U 40 40 1 1 I X VCC 16 -2100 0 100 R 40 40 1 1 W X VCC@1 48 0 -2200 100 U 40 40 1 1 W X VCC@2 82 2200 100 100 L 40 40 1 1 W X VCC@3 113 0 2100 100 D 40 40 1 1 W X Y0 15 -2100 100 100 R 40 40 1 1 I X Y1 83 2200 200 100 L 40 40 1 1 I X Y2 80 2200 -100 100 L 40 40 1 1 I ENDDRAW ENDDEF # # Dev Name: ISPG22V10B # Package Name: PLCC28S # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF ISPG22V10B IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: ISPG22V1 F0 "IC" -300 800 50 H V L B F1 "ISPG22V10B" -300 -1200 50 H V L B F2 "amd_taxi-PLCC28S" 0 150 50 H I C C DRAW P 2 1 0 0 -300 800 500 800 P 2 1 0 0 500 800 500 -1100 P 2 1 0 0 500 -1100 -300 -1100 P 2 1 0 0 -300 -1100 -300 800 X I/CLK 2 -500 -1000 200 R 40 40 1 1 I X I/O/Q0 17 700 100 200 L 40 40 1 1 B X I/O/Q1 18 700 0 200 L 40 40 1 1 B X I/O/Q2 19 700 -100 200 L 40 40 1 1 B X I/O/Q3 20 700 -200 200 L 40 40 1 1 B X I/O/Q4 21 700 -300 200 L 40 40 1 1 B X I/O/Q5 23 700 -400 200 L 40 40 1 1 B X I/O/Q6 24 700 -500 200 L 40 40 1 1 B X I/O/Q7 25 700 -600 200 L 40 40 1 1 B X I/O/Q8 26 700 -700 200 L 40 40 1 1 B X I/O/Q9 27 700 -800 200 L 40 40 1 1 B X I0 3 -500 100 200 R 40 40 1 1 I X I1 4 -500 0 200 R 40 40 1 1 I X I2 5 -500 -100 200 R 40 40 1 1 I X I3 6 -500 -200 200 R 40 40 1 1 I X I4 7 -500 -300 200 R 40 40 1 1 I X I5 9 -500 -400 200 R 40 40 1 1 I X I6 10 -500 -500 200 R 40 40 1 1 I X I7 11 -500 -600 200 R 40 40 1 1 I X I8 12 -500 -700 200 R 40 40 1 1 I X I9 13 -500 -800 200 R 40 40 1 1 I X I10 16 -500 -900 200 R 40 40 1 1 I X MODE 8 -500 500 200 R 40 40 1 1 I X SCLK 1 -500 400 200 R 40 40 1 1 I C X SDI 15 -500 600 200 R 40 40 1 1 I X SDO 22 -500 700 200 R 40 40 1 1 O # Gate Name: P # Symbol Name: PWRN X GND 14 -100 -200 200 U 40 40 2 1 W X VCC 28 -100 400 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: ISPG22V10C # Package Name: SO28 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF ISPG22V10C IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: ISPG22V1 F0 "IC" -300 800 50 H V L B F1 "ISPG22V10C" -300 -1200 50 H V L B F2 "amd_taxi-SO28" 0 150 50 H I C C DRAW P 2 1 0 0 -300 800 500 800 P 2 1 0 0 500 800 500 -1100 P 2 1 0 0 500 -1100 -300 -1100 P 2 1 0 0 -300 -1100 -300 800 X I/CLK 2 -500 -1000 200 R 40 40 1 1 I X I/O/Q0 27 700 100 200 L 40 40 1 1 B X I/O/Q1 26 700 0 200 L 40 40 1 1 B X I/O/Q2 25 700 -100 200 L 40 40 1 1 B X I/O/Q3 24 700 -200 200 L 40 40 1 1 B X I/O/Q4 23 700 -300 200 L 40 40 1 1 B X I/O/Q5 21 700 -400 200 L 40 40 1 1 B X I/O/Q6 20 700 -500 200 L 40 40 1 1 B X I/O/Q7 19 700 -600 200 L 40 40 1 1 B X I/O/Q8 18 700 -700 200 L 40 40 1 1 B X I/O/Q9 17 700 -800 200 L 40 40 1 1 B X I0 3 -500 100 200 R 40 40 1 1 I X I1 4 -500 0 200 R 40 40 1 1 I X I2 5 -500 -100 200 R 40 40 1 1 I X I3 6 -500 -200 200 R 40 40 1 1 I X I4 7 -500 -300 200 R 40 40 1 1 I X I5 9 -500 -400 200 R 40 40 1 1 I X I6 10 -500 -500 200 R 40 40 1 1 I X I7 11 -500 -600 200 R 40 40 1 1 I X I8 12 -500 -700 200 R 40 40 1 1 I X I9 13 -500 -800 200 R 40 40 1 1 I X I10 16 -500 -900 200 R 40 40 1 1 I X MODE 8 -500 500 200 R 40 40 1 1 I X SCLK 1 -500 400 200 R 40 40 1 1 I C X SDI 15 -500 600 200 R 40 40 1 1 I X SDO 22 -500 700 200 R 40 40 1 1 O # Gate Name: P # Symbol Name: PWRN X GND 14 -100 -200 200 U 40 40 2 1 W X VCC 28 -100 400 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: ISPGDS14 # Package Name: PLCC20S # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF ISPGDS14 IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: ISPGDS14 F0 "IC" -300 900 50 H V L B F1 "ISPGDS14" -300 -700 50 H V L B F2 "amd_taxi-PLCC20S" 0 150 50 H I C C DRAW P 2 1 0 0 -300 800 300 800 P 2 1 0 0 300 800 300 -600 P 2 1 0 0 300 -600 -300 -600 P 2 1 0 0 -300 -600 -300 800 X A0 1 -500 -500 200 R 40 40 1 1 B X A1 2 -500 -400 200 R 40 40 1 1 B X A2 3 -500 -300 200 R 40 40 1 1 B X A3 6 -500 -200 200 R 40 40 1 1 B X A4 8 -500 -100 200 R 40 40 1 1 B X A5 9 -500 0 200 R 40 40 1 1 B X A6 10 -500 100 200 R 40 40 1 1 B X B0 20 500 -500 200 L 40 40 1 1 B X B1 19 500 -400 200 L 40 40 1 1 B X B2 18 500 -300 200 L 40 40 1 1 B X B3 16 500 -200 200 L 40 40 1 1 B X B4 13 500 -100 200 L 40 40 1 1 B X B5 12 500 0 200 L 40 40 1 1 B X B6 11 500 100 200 L 40 40 1 1 B X MODE 7 -500 500 200 R 40 40 1 1 I X SCLK 14 -500 400 200 R 40 40 1 1 I C X SDI 4 -500 600 200 R 40 40 1 1 I X SDO 17 -500 700 200 R 40 40 1 1 O # Gate Name: P # Symbol Name: VCCGND X GND 15 -100 300 200 D 40 40 2 1 w X VCC 5 0 300 200 D 40 40 2 1 w ENDDRAW ENDDEF # # Dev Name: ISPGDS14PL # Package Name: PLCC20S # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF ISPGDS14PL IC 0 40 Y Y 2 L N # Gate Name: _POWER # Symbol Name: VCCGND F0 "IC" 100 0 50 H V L B F1 "ISPGDS14PL" 0 0 50 H V L B F2 "amd_taxi-PLCC20S" 0 150 50 H I C C DRAW X GND 15 -100 300 200 D 40 40 1 1 w X VCC 5 0 300 200 D 40 40 1 1 w # Gate Name: _SIGNALS # Symbol Name: ISPGDS14 P 2 2 0 0 -300 800 300 800 P 2 2 0 0 300 800 300 -600 P 2 2 0 0 300 -600 -300 -600 P 2 2 0 0 -300 -600 -300 800 X A0 1 -500 -500 200 R 40 40 2 1 B X A1 2 -500 -400 200 R 40 40 2 1 B X A2 3 -500 -300 200 R 40 40 2 1 B X A3 6 -500 -200 200 R 40 40 2 1 B X A4 8 -500 -100 200 R 40 40 2 1 B X A5 9 -500 0 200 R 40 40 2 1 B X A6 10 -500 100 200 R 40 40 2 1 B X B0 20 500 -500 200 L 40 40 2 1 B X B1 19 500 -400 200 L 40 40 2 1 B X B2 18 500 -300 200 L 40 40 2 1 B X B3 16 500 -200 200 L 40 40 2 1 B X B4 13 500 -100 200 L 40 40 2 1 B X B5 12 500 0 200 L 40 40 2 1 B X B6 11 500 100 200 L 40 40 2 1 B X MODE 7 -500 500 200 R 40 40 2 1 I X SCLK 14 -500 400 200 R 40 40 2 1 I C X SDI 4 -500 600 200 R 40 40 2 1 I X SDO 17 -500 700 200 R 40 40 2 1 O ENDDRAW ENDDEF #End Library