EESchema-LIBRARY Version 2.3  29/04/2008-12:21:26
# Converted with eagle2kicad.ulp Version 0.9
# Device count = 9
#
# Dev Name: AT89C55
# Package Name: PDIP40
# Dev Tech: ''
# Dev Prefix: IO
# Gate count = 1
#
DEF AT89C55 IO 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: 55
F0 "IO" -400 800 50 H V L B
F1 "AT89C55" -400 -1700 50 H V L B
F2 "atmel89cxxxx-PDIP40" 0 150 50 H I C C
DRAW
P 2 1 0 0 -400 800 900 800
P 2 1 0 0 900 800 900 -1600
P 2 1 0 0 900 -1600 -400 -1600
P 2 1 0 0 -400 -1600 -400 800
X ALE/PROG 30 1100 -1200 200 L 40 40 1 1 B 
X EA/VPP 31 1100 -1100 200 L 40 40 1 1 B 
X GND 20 -600 -1500 200 R 40 40 1 1 W 
X P0.0/AD0 39 1100 700 200 L 40 40 1 1 B 
X P0.1/AD1 38 1100 600 200 L 40 40 1 1 B 
X P0.2/AD2 37 1100 500 200 L 40 40 1 1 B 
X P0.3/AD3 36 1100 400 200 L 40 40 1 1 B 
X P0.4/AD4 35 1100 300 200 L 40 40 1 1 B 
X P0.5/AD5 34 1100 200 200 L 40 40 1 1 B 
X P0.6/AD6 33 1100 100 200 L 40 40 1 1 B 
X P0.7/AD7 32 1100 0 200 L 40 40 1 1 B 
X P1.0/T2 1 -600 700 200 R 40 40 1 1 B 
X P1.1/T2EX 2 -600 600 200 R 40 40 1 1 B 
X P1.2 3 -600 500 200 R 40 40 1 1 B 
X P1.3 4 -600 400 200 R 40 40 1 1 B 
X P1.4 5 -600 300 200 R 40 40 1 1 B 
X P1.5 6 -600 200 200 R 40 40 1 1 B 
X P1.6 7 -600 100 200 R 40 40 1 1 B 
X P1.7 8 -600 0 200 R 40 40 1 1 B 
X P2.0/A8 21 1100 -200 200 L 40 40 1 1 B 
X P2.1/A9 22 1100 -300 200 L 40 40 1 1 B 
X P2.2/A10 23 1100 -400 200 L 40 40 1 1 B 
X P2.3/A11 24 1100 -500 200 L 40 40 1 1 B 
X P2.4/A12 25 1100 -600 200 L 40 40 1 1 B 
X P2.5/A13 26 1100 -700 200 L 40 40 1 1 B 
X P2.6/A14 27 1100 -800 200 L 40 40 1 1 B 
X P2.7/A15 28 1100 -900 200 L 40 40 1 1 B 
X P3.0/RXD 10 -600 -200 200 R 40 40 1 1 B 
X P3.1/TXD 11 -600 -300 200 R 40 40 1 1 B 
X P3.2/INT0 12 -600 -400 200 R 40 40 1 1 B 
X P3.3/INT1 13 -600 -500 200 R 40 40 1 1 B 
X P3.4T0 14 -600 -600 200 R 40 40 1 1 B 
X P3.5/T1 15 -600 -700 200 R 40 40 1 1 B 
X P3.6/WR 16 -600 -800 200 R 40 40 1 1 B 
X P3.7/RD 17 -600 -900 200 R 40 40 1 1 B 
X PSEN 29 1100 -1300 200 L 40 40 1 1 B 
X RST 9 -600 -1100 200 R 40 40 1 1 B 
X VCC 40 1100 -1500 200 L 40 40 1 1 W 
X XTAL1 19 -600 -1200 200 R 40 40 1 1 B 
X XTAL2 18 -600 -1300 200 R 40 40 1 1 B 
ENDDRAW
ENDDEF

#
# Dev Name: AT89C55P
# Package Name: PLCC44PA
# Dev Tech: ''
# Dev Prefix: IO
# Gate count = 1
#
DEF AT89C55P IO 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: 55
F0 "IO" -400 800 50 H V L B
F1 "AT89C55P" -400 -1700 50 H V L B
F2 "atmel89cxxxx-PLCC44PA" 0 150 50 H I C C
DRAW
P 2 1 0 0 -400 800 900 800
P 2 1 0 0 900 800 900 -1600
P 2 1 0 0 900 -1600 -400 -1600
P 2 1 0 0 -400 -1600 -400 800
X ALE/PROG 30 1100 -1200 200 L 40 40 1 1 B 
X EA/VPP 31 1100 -1100 200 L 40 40 1 1 B 
X GND 20 -600 -1500 200 R 40 40 1 1 W 
X P0.0/AD0 39 1100 700 200 L 40 40 1 1 B 
X P0.1/AD1 38 1100 600 200 L 40 40 1 1 B 
X P0.2/AD2 37 1100 500 200 L 40 40 1 1 B 
X P0.3/AD3 36 1100 400 200 L 40 40 1 1 B 
X P0.4/AD4 35 1100 300 200 L 40 40 1 1 B 
X P0.5/AD5 34 1100 200 200 L 40 40 1 1 B 
X P0.6/AD6 33 1100 100 200 L 40 40 1 1 B 
X P0.7/AD7 32 1100 0 200 L 40 40 1 1 B 
X P1.0/T2 1 -600 700 200 R 40 40 1 1 B 
X P1.1/T2EX 2 -600 600 200 R 40 40 1 1 B 
X P1.2 3 -600 500 200 R 40 40 1 1 B 
X P1.3 4 -600 400 200 R 40 40 1 1 B 
X P1.4 5 -600 300 200 R 40 40 1 1 B 
X P1.5 6 -600 200 200 R 40 40 1 1 B 
X P1.6 7 -600 100 200 R 40 40 1 1 B 
X P1.7 8 -600 0 200 R 40 40 1 1 B 
X P2.0/A8 21 1100 -200 200 L 40 40 1 1 B 
X P2.1/A9 22 1100 -300 200 L 40 40 1 1 B 
X P2.2/A10 23 1100 -400 200 L 40 40 1 1 B 
X P2.3/A11 24 1100 -500 200 L 40 40 1 1 B 
X P2.4/A12 25 1100 -600 200 L 40 40 1 1 B 
X P2.5/A13 26 1100 -700 200 L 40 40 1 1 B 
X P2.6/A14 27 1100 -800 200 L 40 40 1 1 B 
X P2.7/A15 28 1100 -900 200 L 40 40 1 1 B 
X P3.0/RXD 10 -600 -200 200 R 40 40 1 1 B 
X P3.1/TXD 11 -600 -300 200 R 40 40 1 1 B 
X P3.2/INT0 12 -600 -400 200 R 40 40 1 1 B 
X P3.3/INT1 13 -600 -500 200 R 40 40 1 1 B 
X P3.4T0 14 -600 -600 200 R 40 40 1 1 B 
X P3.5/T1 15 -600 -700 200 R 40 40 1 1 B 
X P3.6/WR 16 -600 -800 200 R 40 40 1 1 B 
X P3.7/RD 17 -600 -900 200 R 40 40 1 1 B 
X PSEN 29 1100 -1300 200 L 40 40 1 1 B 
X RST 9 -600 -1100 200 R 40 40 1 1 B 
X VCC 40 1100 -1500 200 L 40 40 1 1 W 
X XTAL1 19 -600 -1200 200 R 40 40 1 1 B 
X XTAL2 18 -600 -1300 200 R 40 40 1 1 B 
ENDDRAW
ENDDEF

#
# Dev Name: AT89C55S
# Package Name: PQFP
# Dev Tech: ''
# Dev Prefix: IO
# Gate count = 1
#
DEF AT89C55S IO 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: 55
F0 "IO" -400 800 50 H V L B
F1 "AT89C55S" -400 -1700 50 H V L B
F2 "atmel89cxxxx-PQFP" 0 150 50 H I C C
DRAW
P 2 1 0 0 -400 800 900 800
P 2 1 0 0 900 800 900 -1600
P 2 1 0 0 900 -1600 -400 -1600
P 2 1 0 0 -400 -1600 -400 800
X ALE/PROG 30 1100 -1200 200 L 40 40 1 1 B 
X EA/VPP 31 1100 -1100 200 L 40 40 1 1 B 
X GND 20 -600 -1500 200 R 40 40 1 1 W 
X P0.0/AD0 39 1100 700 200 L 40 40 1 1 B 
X P0.1/AD1 38 1100 600 200 L 40 40 1 1 B 
X P0.2/AD2 37 1100 500 200 L 40 40 1 1 B 
X P0.3/AD3 36 1100 400 200 L 40 40 1 1 B 
X P0.4/AD4 35 1100 300 200 L 40 40 1 1 B 
X P0.5/AD5 34 1100 200 200 L 40 40 1 1 B 
X P0.6/AD6 33 1100 100 200 L 40 40 1 1 B 
X P0.7/AD7 32 1100 0 200 L 40 40 1 1 B 
X P1.0/T2 1 -600 700 200 R 40 40 1 1 B 
X P1.1/T2EX 2 -600 600 200 R 40 40 1 1 B 
X P1.2 3 -600 500 200 R 40 40 1 1 B 
X P1.3 4 -600 400 200 R 40 40 1 1 B 
X P1.4 5 -600 300 200 R 40 40 1 1 B 
X P1.5 6 -600 200 200 R 40 40 1 1 B 
X P1.6 7 -600 100 200 R 40 40 1 1 B 
X P1.7 8 -600 0 200 R 40 40 1 1 B 
X P2.0/A8 21 1100 -200 200 L 40 40 1 1 B 
X P2.1/A9 22 1100 -300 200 L 40 40 1 1 B 
X P2.2/A10 23 1100 -400 200 L 40 40 1 1 B 
X P2.3/A11 24 1100 -500 200 L 40 40 1 1 B 
X P2.4/A12 25 1100 -600 200 L 40 40 1 1 B 
X P2.5/A13 26 1100 -700 200 L 40 40 1 1 B 
X P2.6/A14 27 1100 -800 200 L 40 40 1 1 B 
X P2.7/A15 28 1100 -900 200 L 40 40 1 1 B 
X P3.0/RXD 10 -600 -200 200 R 40 40 1 1 B 
X P3.1/TXD 11 -600 -300 200 R 40 40 1 1 B 
X P3.2/INT0 12 -600 -400 200 R 40 40 1 1 B 
X P3.3/INT1 13 -600 -500 200 R 40 40 1 1 B 
X P3.4T0 14 -600 -600 200 R 40 40 1 1 B 
X P3.5/T1 15 -600 -700 200 R 40 40 1 1 B 
X P3.6/WR 16 -600 -800 200 R 40 40 1 1 B 
X P3.7/RD 17 -600 -900 200 R 40 40 1 1 B 
X PSEN 29 1100 -1300 200 L 40 40 1 1 B 
X RST 9 -600 -1100 200 R 40 40 1 1 B 
X VCC 40 1100 -1500 200 L 40 40 1 1 W 
X XTAL1 19 -600 -1200 200 R 40 40 1 1 B 
X XTAL2 18 -600 -1300 200 R 40 40 1 1 B 
ENDDRAW
ENDDEF

#
# Dev Name: AT89C1051
# Package Name: PDIP20
# Dev Tech: ''
# Dev Prefix: IO
# Gate count = 1
#
DEF AT89C1051 IO 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: 1051
F0 "IO" -600 700 50 H V L B
F1 "AT89C1051" -600 -900 50 H V L B
F2 "atmel89cxxxx-PDIP20" 0 150 50 H I C C
DRAW
P 2 1 0 0 -600 700 700 700
P 2 1 0 0 700 700 700 -800
P 2 1 0 0 700 -800 -600 -800
P 2 1 0 0 -600 -800 -600 700
X GND 10 -800 -700 200 R 40 40 1 1 W 
X P0.0/AIN0 12 -800 600 200 R 40 40 1 1 B 
X P0.1/AIN1 13 -800 500 200 R 40 40 1 1 B 
X P0.2 14 -800 400 200 R 40 40 1 1 B 
X P0.3 15 -800 300 200 R 40 40 1 1 B 
X P0.4 16 -800 200 200 R 40 40 1 1 B 
X P0.5 17 -800 100 200 R 40 40 1 1 B 
X P0.6 18 -800 0 200 R 40 40 1 1 B 
X P0.7 19 -800 -100 200 R 40 40 1 1 B 
X P3.0 2 900 600 200 L 40 40 1 1 B 
X P3.1 3 900 500 200 L 40 40 1 1 B 
X P3.2/INT0 6 900 400 200 L 40 40 1 1 B 
X P3.3/INT1 7 900 300 200 L 40 40 1 1 B 
X P3.4/T0 8 900 200 200 L 40 40 1 1 B 
X P3.5/T1 9 900 100 200 L 40 40 1 1 B 
X P3.7 11 900 -100 200 L 40 40 1 1 B 
X RST 1 -800 -300 200 R 40 40 1 1 W 
X VCC 20 900 -700 200 L 40 40 1 1 W 
X XTAL1 5 900 -400 200 L 40 40 1 1 W 
X XTAL2 4 900 -300 200 L 40 40 1 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: AT89C1051S
# Package Name: DIP20SMD
# Dev Tech: ''
# Dev Prefix: IO
# Gate count = 1
#
DEF AT89C1051S IO 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: 1051
F0 "IO" -600 700 50 H V L B
F1 "AT89C1051S" -600 -900 50 H V L B
F2 "atmel89cxxxx-DIP20SMD" 0 150 50 H I C C
DRAW
P 2 1 0 0 -600 700 700 700
P 2 1 0 0 700 700 700 -800
P 2 1 0 0 700 -800 -600 -800
P 2 1 0 0 -600 -800 -600 700
X GND 10 -800 -700 200 R 40 40 1 1 W 
X P0.0/AIN0 12 -800 600 200 R 40 40 1 1 B 
X P0.1/AIN1 13 -800 500 200 R 40 40 1 1 B 
X P0.2 14 -800 400 200 R 40 40 1 1 B 
X P0.3 15 -800 300 200 R 40 40 1 1 B 
X P0.4 16 -800 200 200 R 40 40 1 1 B 
X P0.5 17 -800 100 200 R 40 40 1 1 B 
X P0.6 18 -800 0 200 R 40 40 1 1 B 
X P0.7 19 -800 -100 200 R 40 40 1 1 B 
X P3.0 2 900 600 200 L 40 40 1 1 B 
X P3.1 3 900 500 200 L 40 40 1 1 B 
X P3.2/INT0 6 900 400 200 L 40 40 1 1 B 
X P3.3/INT1 7 900 300 200 L 40 40 1 1 B 
X P3.4/T0 8 900 200 200 L 40 40 1 1 B 
X P3.5/T1 9 900 100 200 L 40 40 1 1 B 
X P3.7 11 900 -100 200 L 40 40 1 1 B 
X RST 1 -800 -300 200 R 40 40 1 1 W 
X VCC 20 900 -700 200 L 40 40 1 1 W 
X XTAL1 5 900 -400 200 L 40 40 1 1 W 
X XTAL2 4 900 -300 200 L 40 40 1 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: AT89C2051
# Package Name: PDIP20
# Dev Tech: ''
# Dev Prefix: IO
# Gate count = 1
#
DEF AT89C2051 IO 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: 2051
F0 "IO" -600 700 50 H V L B
F1 "AT89C2051" -600 -900 50 H V L B
F2 "atmel89cxxxx-PDIP20" 0 150 50 H I C C
DRAW
P 2 1 0 0 -600 700 700 700
P 2 1 0 0 700 700 700 -800
P 2 1 0 0 700 -800 -600 -800
P 2 1 0 0 -600 -800 -600 700
X GND 10 -800 -700 200 R 40 40 1 1 W 
X P0.0/AIN0 12 -800 600 200 R 40 40 1 1 B 
X P0.1/AIN1 13 -800 500 200 R 40 40 1 1 B 
X P0.2 14 -800 400 200 R 40 40 1 1 B 
X P0.3 15 -800 300 200 R 40 40 1 1 B 
X P0.4 16 -800 200 200 R 40 40 1 1 B 
X P0.5 17 -800 100 200 R 40 40 1 1 B 
X P0.6 18 -800 0 200 R 40 40 1 1 B 
X P0.7 19 -800 -100 200 R 40 40 1 1 B 
X P3.0/RXD 2 900 600 200 L 40 40 1 1 B 
X P3.1/TXD 3 900 500 200 L 40 40 1 1 B 
X P3.2/INT0 6 900 400 200 L 40 40 1 1 B 
X P3.3/INT1 7 900 300 200 L 40 40 1 1 B 
X P3.4/T0 8 900 200 200 L 40 40 1 1 B 
X P3.5/T1 9 900 100 200 L 40 40 1 1 B 
X P3.7 11 900 -100 200 L 40 40 1 1 B 
X RST 1 -800 -300 200 R 40 40 1 1 W 
X VCC 20 900 -700 200 L 40 40 1 1 W 
X XTAL1 5 900 -400 200 L 40 40 1 1 W 
X XTAL2 4 900 -300 200 L 40 40 1 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: AT89C2051S
# Package Name: DIP20SMD
# Dev Tech: ''
# Dev Prefix: IO
# Gate count = 1
#
DEF AT89C2051S IO 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: 2051
F0 "IO" -600 700 50 H V L B
F1 "AT89C2051S" -600 -900 50 H V L B
F2 "atmel89cxxxx-DIP20SMD" 0 150 50 H I C C
DRAW
P 2 1 0 0 -600 700 700 700
P 2 1 0 0 700 700 700 -800
P 2 1 0 0 700 -800 -600 -800
P 2 1 0 0 -600 -800 -600 700
X GND 10 -800 -700 200 R 40 40 1 1 W 
X P0.0/AIN0 12 -800 600 200 R 40 40 1 1 B 
X P0.1/AIN1 13 -800 500 200 R 40 40 1 1 B 
X P0.2 14 -800 400 200 R 40 40 1 1 B 
X P0.3 15 -800 300 200 R 40 40 1 1 B 
X P0.4 16 -800 200 200 R 40 40 1 1 B 
X P0.5 17 -800 100 200 R 40 40 1 1 B 
X P0.6 18 -800 0 200 R 40 40 1 1 B 
X P0.7 19 -800 -100 200 R 40 40 1 1 B 
X P3.0/RXD 2 900 600 200 L 40 40 1 1 B 
X P3.1/TXD 3 900 500 200 L 40 40 1 1 B 
X P3.2/INT0 6 900 400 200 L 40 40 1 1 B 
X P3.3/INT1 7 900 300 200 L 40 40 1 1 B 
X P3.4/T0 8 900 200 200 L 40 40 1 1 B 
X P3.5/T1 9 900 100 200 L 40 40 1 1 B 
X P3.7 11 900 -100 200 L 40 40 1 1 B 
X RST 1 -800 -300 200 R 40 40 1 1 W 
X VCC 20 900 -700 200 L 40 40 1 1 W 
X XTAL1 5 900 -400 200 L 40 40 1 1 W 
X XTAL2 4 900 -300 200 L 40 40 1 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: T89C51CC01PLCC-SOCKET
# Package Name: PLCC44PA
# Dev Tech: ''
# Dev Prefix: IC
# Gate count = 2
#
DEF T89C51CC01PLCC-SOCKET IC 0 40 Y Y 2 L N
# Gate Name: G$1
# Symbol Name: C51CC01
F0 "IC" -400 1625 50 H V L B
F1 "T89C51CC01PLCC-SOCKET" -400 -1600 50 H V L B
F2 "atmel89cxxxx-PLCC44PA" 0 150 50 H I C C
DRAW
P 2 1 0 0 600 1600 -700 1600
P 2 1 0 0 -700 1600 -700 -1500
P 2 1 0 0 -700 -1500 600 -1500
P 2 1 0 0 600 -1500 600 1600
X A8/P2,0 29 800 600 200 L 40 40 1 1 B 
X A9/P2,1 28 800 500 200 L 40 40 1 1 B 
X A10/P2,2 27 800 400 200 L 40 40 1 1 B 
X A11/P2,3 26 800 300 200 L 40 40 1 1 B 
X A12/P2,4 25 800 200 200 L 40 40 1 1 B 
X A13/P2,5 24 800 100 200 L 40 40 1 1 B 
X A14/P2,6 23 800 0 200 L 40 40 1 1 B 
X A15/P2,7 22 800 -100 200 L 40 40 1 1 B 
X AD0/P0,0 30 800 1500 200 L 40 40 1 1 B 
X AD1/P0,1 31 800 1400 200 L 40 40 1 1 B 
X AD2/P0,2 32 800 1300 200 L 40 40 1 1 B 
X AD3/P0,3 33 800 1200 200 L 40 40 1 1 B 
X AD4/P0,4 34 800 1100 200 L 40 40 1 1 B 
X AD5/P0,5 35 800 1000 200 L 40 40 1 1 B 
X AD6/P0,6 36 800 900 200 L 40 40 1 1 B 
X AD7/P0,7 37 800 800 200 L 40 40 1 1 B 
X ALE 39 800 -1400 200 L 40 40 1 1 O 
X EA\ 11 -900 -1300 200 R 40 40 1 1 I 
X INT0/P3,2 14 800 -500 200 L 40 40 1 1 B 
X INT1/P3,3 15 800 -600 200 L 40 40 1 1 B 
X P1,0/AN0/T2 3 -900 1500 200 R 40 40 1 1 B 
X P1,1/AN1/T2EX 4 -900 1400 200 R 40 40 1 1 B 
X P1,2/AN2/ECI 5 -900 1300 200 R 40 40 1 1 B 
X P1,3/AN3/CEX0 6 -900 1200 200 R 40 40 1 1 B 
X P1,4/AN4/CEX1 7 -900 1100 200 R 40 40 1 1 B 
X P1,5/AN5/CEX2 8 -900 1000 200 R 40 40 1 1 B 
X P1,6/AN6/CEX3 9 -900 900 200 R 40 40 1 1 B 
X P1,7/AN7/CEX4 10 -900 800 200 R 40 40 1 1 B 
X P4,0/TXDC 20 -900 -100 200 R 40 40 1 1 B 
X P4,1/RXDC 21 -900 -200 200 R 40 40 1 1 B 
X PSEN\ 38 800 -1300 200 L 40 40 1 1 O 
X RD/P3,7 19 800 -1000 200 L 40 40 1 1 B 
X RESET 44 -900 -1400 200 R 40 40 1 1 I 
X RXD/P3,0 12 800 -300 200 L 40 40 1 1 B 
X T0/P3,4 16 800 -700 200 L 40 40 1 1 B 
X T1/P3,5 17 800 -800 200 L 40 40 1 1 B 
X TXD/P3,1 13 800 -400 200 L 40 40 1 1 B 
X VAGND 1 -900 100 200 R 40 40 1 1 P 
X VAREF 2 -900 200 200 R 40 40 1 1 P 
X WR/P3,6 18 800 -900 200 L 40 40 1 1 B 
X XTAL1 41 -900 600 200 R 40 40 1 1 P 
X XTAL2 40 -900 500 200 R 40 40 1 1 P 
# Gate Name: G$2
# Symbol Name: VCCVSS
T 1 50 -155 50 0 2 0 VSS
T 1 50 180 50 0 2 0 VCC
X VCC 42 0 300 200 D 40 40 2 1 W 
X VSS 43 0 -300 200 U 40 40 2 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: T89C51CC01SMD-SOCKET
# Package Name: PLCC44
# Dev Tech: ''
# Dev Prefix: IC
# Gate count = 2
#
DEF T89C51CC01SMD-SOCKET IC 0 40 Y Y 2 L N
# Gate Name: G$1
# Symbol Name: C51CC01
F0 "IC" -400 1625 50 H V L B
F1 "T89C51CC01SMD-SOCKET" -400 -1600 50 H V L B
F2 "atmel89cxxxx-PLCC44" 0 150 50 H I C C
DRAW
P 2 1 0 0 600 1600 -700 1600
P 2 1 0 0 -700 1600 -700 -1500
P 2 1 0 0 -700 -1500 600 -1500
P 2 1 0 0 600 -1500 600 1600
X A8/P2,0 29 800 600 200 L 40 40 1 1 B 
X A9/P2,1 28 800 500 200 L 40 40 1 1 B 
X A10/P2,2 27 800 400 200 L 40 40 1 1 B 
X A11/P2,3 26 800 300 200 L 40 40 1 1 B 
X A12/P2,4 25 800 200 200 L 40 40 1 1 B 
X A13/P2,5 24 800 100 200 L 40 40 1 1 B 
X A14/P2,6 23 800 0 200 L 40 40 1 1 B 
X A15/P2,7 22 800 -100 200 L 40 40 1 1 B 
X AD0/P0,0 30 800 1500 200 L 40 40 1 1 B 
X AD1/P0,1 31 800 1400 200 L 40 40 1 1 B 
X AD2/P0,2 32 800 1300 200 L 40 40 1 1 B 
X AD3/P0,3 33 800 1200 200 L 40 40 1 1 B 
X AD4/P0,4 34 800 1100 200 L 40 40 1 1 B 
X AD5/P0,5 35 800 1000 200 L 40 40 1 1 B 
X AD6/P0,6 36 800 900 200 L 40 40 1 1 B 
X AD7/P0,7 37 800 800 200 L 40 40 1 1 B 
X ALE 39 800 -1400 200 L 40 40 1 1 O 
X EA\ 11 -900 -1300 200 R 40 40 1 1 I 
X INT0/P3,2 14 800 -500 200 L 40 40 1 1 B 
X INT1/P3,3 15 800 -600 200 L 40 40 1 1 B 
X P1,0/AN0/T2 3 -900 1500 200 R 40 40 1 1 B 
X P1,1/AN1/T2EX 4 -900 1400 200 R 40 40 1 1 B 
X P1,2/AN2/ECI 5 -900 1300 200 R 40 40 1 1 B 
X P1,3/AN3/CEX0 6 -900 1200 200 R 40 40 1 1 B 
X P1,4/AN4/CEX1 7 -900 1100 200 R 40 40 1 1 B 
X P1,5/AN5/CEX2 8 -900 1000 200 R 40 40 1 1 B 
X P1,6/AN6/CEX3 9 -900 900 200 R 40 40 1 1 B 
X P1,7/AN7/CEX4 10 -900 800 200 R 40 40 1 1 B 
X P4,0/TXDC 20 -900 -100 200 R 40 40 1 1 B 
X P4,1/RXDC 21 -900 -200 200 R 40 40 1 1 B 
X PSEN\ 38 800 -1300 200 L 40 40 1 1 O 
X RD/P3,7 19 800 -1000 200 L 40 40 1 1 B 
X RESET 44 -900 -1400 200 R 40 40 1 1 I 
X RXD/P3,0 12 800 -300 200 L 40 40 1 1 B 
X T0/P3,4 16 800 -700 200 L 40 40 1 1 B 
X T1/P3,5 17 800 -800 200 L 40 40 1 1 B 
X TXD/P3,1 13 800 -400 200 L 40 40 1 1 B 
X VAGND 1 -900 100 200 R 40 40 1 1 P 
X VAREF 2 -900 200 200 R 40 40 1 1 P 
X WR/P3,6 18 800 -900 200 L 40 40 1 1 B 
X XTAL1 41 -900 600 200 R 40 40 1 1 P 
X XTAL2 40 -900 500 200 R 40 40 1 1 P 
# Gate Name: G$2
# Symbol Name: VCCVSS
T 1 50 -155 50 0 2 0 VSS
T 1 50 180 50 0 2 0 VCC
X VCC 42 0 300 200 D 40 40 2 1 W 
X VSS 43 0 -300 200 U 40 40 2 1 W 
ENDDRAW
ENDDEF

#End Library