EESchema-LIBRARY Version 2.3 29/04/2008-12:21:27 # Converted with eagle2kicad.ulp Version 0.9 # Device count = 3 # # Dev Name: ATTINY24/44/84-MU # Package Name: QFN/MLF20 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF ATTINY24/44/84-MU IC 0 40 Y Y 1 L N # Gate Name: 1 # Symbol Name: ATTINY24/44/84 F0 "IC" -100 730 50 H V L B F1 "ATTINY24/44/84-MU" -100 -800 50 H V L B F2 "attiny24_44_84-QFN/MLF20" 0 150 50 H I C C DRAW P 2 1 0 0 -100 700 1800 700 P 2 1 0 0 1800 700 1800 -700 P 2 1 0 0 1800 -700 -100 -700 P 2 1 0 0 -100 -700 -100 700 X (PCINT0/AREF/ADC0)PA0 5 2000 -600 200 L 40 40 1 1 B X (PCINT1/AIN0/ADC1)PA1 4 2000 -500 200 L 40 40 1 1 B X (PCINT2/AIN1/ADC2)PA2 3 2000 -400 200 L 40 40 1 1 B X (PCINT3/T0/ADC3)PA3 2 2000 -300 200 L 40 40 1 1 B X (PCINT4/T1/SCL/USCK/ADC4)PA4 1 2000 -200 200 L 40 40 1 1 B X (PCINT5/OC1B/MISO/DO/ADC5)PA5 20 2000 -100 200 L 40 40 1 1 B X (PCINT6/OC1A/SDA/MOSI/ADC6)PA6 16 2000 0 200 L 40 40 1 1 B X (PCINT7/ICP/OC0B/ADC7)PA7 15 2000 100 200 L 40 40 1 1 B X (PCINT8/XTAL1/CLKI)PB0 11 2000 300 200 L 40 40 1 1 B X (PCINT9/XTAL2)PB1 12 2000 400 200 L 40 40 1 1 B X (PCINT10/INT0/OC0A/CKOUT)PB2 14 2000 500 200 L 40 40 1 1 B X (PCINT11/RESET/DW)PB3 13 2000 600 200 L 40 40 1 1 B X GND 8 -300 -600 200 R 40 40 1 1 W X VCC 9 -300 -100 200 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: ATTINY24/44/84-PU # Package Name: DIL14 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF ATTINY24/44/84-PU IC 0 40 Y Y 1 L N # Gate Name: 1 # Symbol Name: ATTINY24/44/84 F0 "IC" -100 730 50 H V L B F1 "ATTINY24/44/84-PU" -100 -800 50 H V L B F2 "attiny24_44_84-DIL14" 0 150 50 H I C C DRAW P 2 1 0 0 -100 700 1800 700 P 2 1 0 0 1800 700 1800 -700 P 2 1 0 0 1800 -700 -100 -700 P 2 1 0 0 -100 -700 -100 700 X (PCINT0/AREF/ADC0)PA0 13 2000 -600 200 L 40 40 1 1 B X (PCINT1/AIN0/ADC1)PA1 12 2000 -500 200 L 40 40 1 1 B X (PCINT2/AIN1/ADC2)PA2 11 2000 -400 200 L 40 40 1 1 B X (PCINT3/T0/ADC3)PA3 10 2000 -300 200 L 40 40 1 1 B X (PCINT4/T1/SCL/USCK/ADC4)PA4 9 2000 -200 200 L 40 40 1 1 B X (PCINT5/OC1B/MISO/DO/ADC5)PA5 8 2000 -100 200 L 40 40 1 1 B X (PCINT6/OC1A/SDA/MOSI/ADC6)PA6 7 2000 0 200 L 40 40 1 1 B X (PCINT7/ICP/OC0B/ADC7)PA7 6 2000 100 200 L 40 40 1 1 B X (PCINT8/XTAL1/CLKI)PB0 2 2000 300 200 L 40 40 1 1 B X (PCINT9/XTAL2)PB1 3 2000 400 200 L 40 40 1 1 B X (PCINT10/INT0/OC0A/CKOUT)PB2 5 2000 500 200 L 40 40 1 1 B X (PCINT11/RESET/DW)PB3 4 2000 600 200 L 40 40 1 1 B X GND 14 -300 -600 200 R 40 40 1 1 W X VCC 1 -300 -100 200 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: ATTINY24/44/84-SSU # Package Name: SOIC14 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF ATTINY24/44/84-SSU IC 0 40 Y Y 1 L N # Gate Name: 1 # Symbol Name: ATTINY24/44/84 F0 "IC" -100 730 50 H V L B F1 "ATTINY24/44/84-SSU" -100 -800 50 H V L B F2 "attiny24_44_84-SOIC14" 0 150 50 H I C C DRAW P 2 1 0 0 -100 700 1800 700 P 2 1 0 0 1800 700 1800 -700 P 2 1 0 0 1800 -700 -100 -700 P 2 1 0 0 -100 -700 -100 700 X (PCINT0/AREF/ADC0)PA0 13 2000 -600 200 L 40 40 1 1 B X (PCINT1/AIN0/ADC1)PA1 12 2000 -500 200 L 40 40 1 1 B X (PCINT2/AIN1/ADC2)PA2 11 2000 -400 200 L 40 40 1 1 B X (PCINT3/T0/ADC3)PA3 10 2000 -300 200 L 40 40 1 1 B X (PCINT4/T1/SCL/USCK/ADC4)PA4 9 2000 -200 200 L 40 40 1 1 B X (PCINT5/OC1B/MISO/DO/ADC5)PA5 8 2000 -100 200 L 40 40 1 1 B X (PCINT6/OC1A/SDA/MOSI/ADC6)PA6 7 2000 0 200 L 40 40 1 1 B X (PCINT7/ICP/OC0B/ADC7)PA7 6 2000 100 200 L 40 40 1 1 B X (PCINT8/XTAL1/CLKI)PB0 2 2000 300 200 L 40 40 1 1 B X (PCINT9/XTAL2)PB1 3 2000 400 200 L 40 40 1 1 B X (PCINT10/INT0/OC0A/CKOUT)PB2 5 2000 500 200 L 40 40 1 1 B X (PCINT11/RESET/DW)PB3 4 2000 600 200 L 40 40 1 1 B X GND 14 -300 -600 200 R 40 40 1 1 W X VCC 1 -300 -100 200 R 40 40 1 1 W ENDDRAW ENDDEF #End Library