EESchema-LIBRARY Version 2.3 29/04/2008-12:21:28 # Converted with eagle2kicad.ulp Version 0.9 # Device count = 105 # # Dev Name: AT904434A # Package Name: TQFP44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF AT904434A IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-4 F0 "IC" -600 1730 50 H V L B F1 "AT904434A" -600 -2000 50 H V L B F2 "avr-1-TQFP44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -1900 P 2 1 0 0 600 -1900 -600 -1900 P 2 1 0 0 -600 -1900 -600 1700 X (ADC0)PA0 37 800 900 200 L 40 40 1 1 B X (ADC1)PA1 36 800 1000 200 L 40 40 1 1 B X (ADC2)PA2 35 800 1100 200 L 40 40 1 1 B X (ADC3)PA3 34 800 1200 200 L 40 40 1 1 B X (ADC4)PA4 33 800 1300 200 L 40 40 1 1 B X (ADC5)PA5 32 800 1400 200 L 40 40 1 1 B X (ADC6)PA6 31 800 1500 200 L 40 40 1 1 B X (ADC7)PA7 30 800 1600 200 L 40 40 1 1 B X (AIN0)PB2 42 800 200 200 L 40 40 1 1 B X (AIN1)PB3 43 800 300 200 L 40 40 1 1 B X (ICP)PD6 15 800 -1200 200 L 40 40 1 1 B X (INT0)PD2 11 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 12 800 -1500 200 L 40 40 1 1 B X (MISO)PB6 2 800 600 200 L 40 40 1 1 B X (MOSI)PB5 1 800 500 200 L 40 40 1 1 B X (OC1A)PD5 14 800 -1300 200 L 40 40 1 1 B X (OC1B)PD4 13 800 -1400 200 L 40 40 1 1 B X (OC2)PD7 16 800 -1100 200 L 40 40 1 1 B X (RXD)PD0 9 800 -1800 200 L 40 40 1 1 B X (SCK)PB7 3 800 700 200 L 40 40 1 1 B X (SS)PB4 44 800 400 200 L 40 40 1 1 B X (T0)PB0 40 800 0 200 L 40 40 1 1 B X (T1)PB1 41 800 100 200 L 40 40 1 1 B X (TOSC1)PC6 25 800 -300 200 L 40 40 1 1 B X (TOSC2)PC7 26 800 -200 200 L 40 40 1 1 B X (TXD)PD1 10 800 -1700 200 L 40 40 1 1 B X AGND 28 -800 700 200 R 40 40 1 1 W X AREF 29 -800 900 200 R 40 40 1 1 W X AVCC 27 -800 800 200 R 40 40 1 1 W X GND 6 -800 0 200 R 40 40 1 1 W X GND1 18 -800 100 200 R 40 40 1 1 W X GND2 39 -800 -100 200 R 40 40 1 1 W X PC0 19 800 -900 200 L 40 40 1 1 B X PC1 20 800 -800 200 L 40 40 1 1 B X PC2 21 800 -700 200 L 40 40 1 1 B X PC3 22 800 -600 200 L 40 40 1 1 B X PC4 23 800 -500 200 L 40 40 1 1 B X PC5 24 800 -400 200 L 40 40 1 1 B X RESET 4 -800 1600 200 R 40 40 1 1 I I X VCC 5 -800 400 200 R 40 40 1 1 W X VCC1 17 -800 500 200 R 40 40 1 1 W X VCC2 38 -800 300 200 R 40 40 1 1 W X XTAL1 8 -800 1100 200 R 40 40 1 1 B X XTAL2 7 -800 1300 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT908535A # Package Name: TQFP44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF AT908535A IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-4 F0 "IC" -600 1730 50 H V L B F1 "AT908535A" -600 -2000 50 H V L B F2 "avr-1-TQFP44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -1900 P 2 1 0 0 600 -1900 -600 -1900 P 2 1 0 0 -600 -1900 -600 1700 X (ADC0)PA0 37 800 900 200 L 40 40 1 1 B X (ADC1)PA1 36 800 1000 200 L 40 40 1 1 B X (ADC2)PA2 35 800 1100 200 L 40 40 1 1 B X (ADC3)PA3 34 800 1200 200 L 40 40 1 1 B X (ADC4)PA4 33 800 1300 200 L 40 40 1 1 B X (ADC5)PA5 32 800 1400 200 L 40 40 1 1 B X (ADC6)PA6 31 800 1500 200 L 40 40 1 1 B X (ADC7)PA7 30 800 1600 200 L 40 40 1 1 B X (AIN0)PB2 42 800 200 200 L 40 40 1 1 B X (AIN1)PB3 43 800 300 200 L 40 40 1 1 B X (ICP)PD6 15 800 -1200 200 L 40 40 1 1 B X (INT0)PD2 11 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 12 800 -1500 200 L 40 40 1 1 B X (MISO)PB6 2 800 600 200 L 40 40 1 1 B X (MOSI)PB5 1 800 500 200 L 40 40 1 1 B X (OC1A)PD5 14 800 -1300 200 L 40 40 1 1 B X (OC1B)PD4 13 800 -1400 200 L 40 40 1 1 B X (OC2)PD7 16 800 -1100 200 L 40 40 1 1 B X (RXD)PD0 9 800 -1800 200 L 40 40 1 1 B X (SCK)PB7 3 800 700 200 L 40 40 1 1 B X (SS)PB4 44 800 400 200 L 40 40 1 1 B X (T0)PB0 40 800 0 200 L 40 40 1 1 B X (T1)PB1 41 800 100 200 L 40 40 1 1 B X (TOSC1)PC6 25 800 -300 200 L 40 40 1 1 B X (TOSC2)PC7 26 800 -200 200 L 40 40 1 1 B X (TXD)PD1 10 800 -1700 200 L 40 40 1 1 B X AGND 28 -800 700 200 R 40 40 1 1 W X AREF 29 -800 900 200 R 40 40 1 1 W X AVCC 27 -800 800 200 R 40 40 1 1 W X GND 6 -800 0 200 R 40 40 1 1 W X GND1 18 -800 100 200 R 40 40 1 1 W X GND2 39 -800 -100 200 R 40 40 1 1 W X PC0 19 800 -900 200 L 40 40 1 1 B X PC1 20 800 -800 200 L 40 40 1 1 B X PC2 21 800 -700 200 L 40 40 1 1 B X PC3 22 800 -600 200 L 40 40 1 1 B X PC4 23 800 -500 200 L 40 40 1 1 B X PC5 24 800 -400 200 L 40 40 1 1 B X RESET 4 -800 1600 200 R 40 40 1 1 I I X VCC 5 -800 400 200 R 40 40 1 1 W X VCC1 17 -800 500 200 R 40 40 1 1 W X VCC2 38 -800 300 200 R 40 40 1 1 W X XTAL1 8 -800 1100 200 R 40 40 1 1 B X XTAL2 7 -800 1300 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90C8534A # Package Name: TQFP48 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF AT90C8534A IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 15-I/O-3 F0 "IC" -600 1730 50 H V L B F1 "AT90C8534A" -600 -1600 50 H V L B F2 "avr-1-TQFP48" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -1500 P 2 1 0 0 600 -1500 -600 -1500 P 2 1 0 0 -600 -1500 -600 1700 X ADIN0 1 800 0 200 L 40 40 1 1 I X ADIN1 13 800 100 200 L 40 40 1 1 I X ADIN2 14 800 200 200 L 40 40 1 1 I X ADIN3 15 800 300 200 L 40 40 1 1 I X ADIN4 16 800 400 200 L 40 40 1 1 I X ADIN5 17 800 500 200 L 40 40 1 1 I X AGND 11 -800 800 200 R 40 40 1 1 I X AVCC 18 -800 900 200 R 40 40 1 1 I X GND 31 -800 500 200 R 40 40 1 1 W X INT0 35 800 700 200 L 40 40 1 1 I X INT1 34 800 800 200 L 40 40 1 1 I X NC1 2 -600 -200 0 R 40 40 1 1 U X NC2 3 -600 -300 0 R 40 40 1 1 U X NC3 4 -600 -400 0 R 40 40 1 1 U X NC4 5 -600 -500 0 R 40 40 1 1 U X NC5 6 -600 -600 0 R 40 40 1 1 U X NC6 7 -600 -700 0 R 40 40 1 1 U X NC7 8 -600 -800 0 R 40 40 1 1 U X NC8 9 -600 -900 0 R 40 40 1 1 U X NC9 10 -600 -1000 0 R 40 40 1 1 U X NC10 12 -600 -1100 0 R 40 40 1 1 U X NC11 19 -600 -1200 0 R 40 40 1 1 U X NC12 21 -600 -1300 0 R 40 40 1 1 U X NC13 25 -600 -1400 0 R 40 40 1 1 U X NC14 26 600 -1400 0 R 40 40 1 1 U X NC15 27 600 -1300 0 R 40 40 1 1 U X NC16 28 600 -1200 0 R 40 40 1 1 U X NC17 29 600 -1100 0 R 40 40 1 1 U X NC18 30 600 -1000 0 R 40 40 1 1 U X NC19 32 600 -900 0 R 40 40 1 1 U X NC20 36 600 -800 0 R 40 40 1 1 U X NC21 37 600 -700 0 R 40 40 1 1 U X NC22 40 600 -600 0 R 40 40 1 1 U X NC23 41 600 -500 0 R 40 40 1 1 U X NC24 42 600 -400 0 R 40 40 1 1 U X NC25 43 600 -300 0 R 40 40 1 1 U X NC26 48 600 -200 0 R 40 40 1 1 U X PA0 47 800 1000 200 L 40 40 1 1 B X PA1 46 800 1100 200 L 40 40 1 1 B X PA2 45 800 1200 200 L 40 40 1 1 B X PA3 44 800 1300 200 L 40 40 1 1 B X PA4 39 800 1400 200 L 40 40 1 1 B X PA5 38 800 1500 200 L 40 40 1 1 B X PA6 33 800 1600 200 L 40 40 1 1 B X RESET 20 -800 1600 200 R 40 40 1 1 I I X VCC 22 -800 600 200 R 40 40 1 1 W X XTAL1 24 -800 1100 200 R 40 40 1 1 B X XTAL2 23 -800 1300 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90LS2323P # Package Name: DIL08 # Dev Tech: LS # Dev Prefix: IC # Gate count = 1 # DEF AT90LS2323P IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 3-I/O-1 F0 "IC" -500 430 50 H V L B F1 "AT90LS2323P" -500 -600 50 H V L B F2 "avr-1-DIL08" 0 150 50 H I C C DRAW P 2 1 0 0 -500 -500 500 -500 P 2 1 0 0 500 -500 500 400 P 2 1 0 0 500 400 -500 400 P 2 1 0 0 -500 400 -500 -500 X (MISO)PB1 6 700 200 200 L 40 40 1 1 B X (MOSI)PB0 5 700 100 200 L 40 40 1 1 B X (SCK)PB2 7 700 300 200 L 40 40 1 1 B X GND 4 -700 -400 200 R 40 40 1 1 W X RESET 1 -700 300 200 R 40 40 1 1 I I X VCC 8 -700 -300 200 R 40 40 1 1 W X XTAL1 2 -700 -100 200 R 40 40 1 1 B X XTAL2 3 -700 100 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90LS2323S # Package Name: SOIC8 # Dev Tech: LS # Dev Prefix: IC # Gate count = 1 # DEF AT90LS2323S IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 3-I/O-1 F0 "IC" -500 430 50 H V L B F1 "AT90LS2323S" -500 -600 50 H V L B F2 "avr-1-SOIC8" 0 150 50 H I C C DRAW P 2 1 0 0 -500 -500 500 -500 P 2 1 0 0 500 -500 500 400 P 2 1 0 0 500 400 -500 400 P 2 1 0 0 -500 400 -500 -500 X (MISO)PB1 6 700 200 200 L 40 40 1 1 B X (MOSI)PB0 5 700 100 200 L 40 40 1 1 B X (SCK)PB2 7 700 300 200 L 40 40 1 1 B X GND 4 -700 -400 200 R 40 40 1 1 W X RESET 1 -700 300 200 R 40 40 1 1 I I X VCC 8 -700 -300 200 R 40 40 1 1 W X XTAL1 2 -700 -100 200 R 40 40 1 1 B X XTAL2 3 -700 100 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90LS2343P # Package Name: DIL08 # Dev Tech: LS # Dev Prefix: IC # Gate count = 1 # DEF AT90LS2343P IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 5-I/O-1 F0 "IC" -500 330 50 H V L B F1 "AT90LS2343P" -500 -400 50 H V L B F2 "avr-1-DIL08" 0 150 50 H I C C DRAW P 2 1 0 0 -500 -300 500 -300 P 2 1 0 0 500 -300 500 300 P 2 1 0 0 500 300 -500 300 P 2 1 0 0 -500 300 -500 -300 X (CLOCK)PB3 2 700 100 200 L 40 40 1 1 B X (MISO)PB1 6 700 -100 200 L 40 40 1 1 B X (MOSI)PB0 5 700 -200 200 L 40 40 1 1 B X (SCK)PB2 7 700 0 200 L 40 40 1 1 B X GND 4 -700 -200 200 R 40 40 1 1 W X PB4 3 700 200 200 L 40 40 1 1 B X RESET 1 -700 200 200 R 40 40 1 1 I I X VCC 8 -700 -100 200 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: AT90LS2343S # Package Name: SOIC8 # Dev Tech: LS # Dev Prefix: IC # Gate count = 1 # DEF AT90LS2343S IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 5-I/O-1 F0 "IC" -500 330 50 H V L B F1 "AT90LS2343S" -500 -400 50 H V L B F2 "avr-1-SOIC8" 0 150 50 H I C C DRAW P 2 1 0 0 -500 -300 500 -300 P 2 1 0 0 500 -300 500 300 P 2 1 0 0 500 300 -500 300 P 2 1 0 0 -500 300 -500 -300 X (CLOCK)PB3 2 700 100 200 L 40 40 1 1 B X (MISO)PB1 6 700 -100 200 L 40 40 1 1 B X (MOSI)PB0 5 700 -200 200 L 40 40 1 1 B X (SCK)PB2 7 700 0 200 L 40 40 1 1 B X GND 4 -700 -200 200 R 40 40 1 1 W X PB4 3 700 200 200 L 40 40 1 1 B X RESET 1 -700 200 200 R 40 40 1 1 I I X VCC 8 -700 -100 200 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: AT90LS4434J # Package Name: PLCC44 # Dev Tech: LS # Dev Prefix: IC # Gate count = 1 # DEF AT90LS4434J IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-4 F0 "IC" -600 1730 50 H V L B F1 "AT90LS4434J" -600 -2000 50 H V L B F2 "avr-1-PLCC44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -1900 P 2 1 0 0 600 -1900 -600 -1900 P 2 1 0 0 -600 -1900 -600 1700 X (ADC0)PA0 43 800 900 200 L 40 40 1 1 B X (ADC1)PA1 42 800 1000 200 L 40 40 1 1 B X (ADC2)PA2 41 800 1100 200 L 40 40 1 1 B X (ADC3)PA3 40 800 1200 200 L 40 40 1 1 B X (ADC4)PA4 39 800 1300 200 L 40 40 1 1 B X (ADC5)PA5 38 800 1400 200 L 40 40 1 1 B X (ADC6)PA6 37 800 1500 200 L 40 40 1 1 B X (ADC7)PA7 36 800 1600 200 L 40 40 1 1 B X (AIN0)PB2 4 800 200 200 L 40 40 1 1 B X (AIN1)PB3 5 800 300 200 L 40 40 1 1 B X (ICP)PD6 21 800 -1200 200 L 40 40 1 1 B X (INT0)PD2 17 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 18 800 -1500 200 L 40 40 1 1 B X (MISO)PB6 8 800 600 200 L 40 40 1 1 B X (MOSI)PB5 7 800 500 200 L 40 40 1 1 B X (OC1A)PD5 20 800 -1300 200 L 40 40 1 1 B X (OC1B)PD4 19 800 -1400 200 L 40 40 1 1 B X (OC2)PD7 22 800 -1100 200 L 40 40 1 1 B X (RXD)PD0 15 800 -1800 200 L 40 40 1 1 B X (SCK)PB7 9 800 700 200 L 40 40 1 1 B X (SS)PB4 6 800 400 200 L 40 40 1 1 B X (T0)PB0 2 800 0 200 L 40 40 1 1 B X (T1)PB1 3 800 100 200 L 40 40 1 1 B X (TOSC1)PC6 31 800 -300 200 L 40 40 1 1 B X (TOSC2)PC7 32 800 -200 200 L 40 40 1 1 B X (TXD)PD1 16 800 -1700 200 L 40 40 1 1 B X AGND 34 -800 700 200 R 40 40 1 1 W X AREF 35 -800 900 200 R 40 40 1 1 W X AVCC 33 -800 800 200 R 40 40 1 1 W X GND 24 -800 0 200 R 40 40 1 1 W X GND1 1 -800 100 200 R 40 40 1 1 W X GND2 12 -800 -100 200 R 40 40 1 1 W X PC0 25 800 -900 200 L 40 40 1 1 B X PC1 26 800 -800 200 L 40 40 1 1 B X PC2 27 800 -700 200 L 40 40 1 1 B X PC3 28 800 -600 200 L 40 40 1 1 B X PC4 29 800 -500 200 L 40 40 1 1 B X PC5 30 800 -400 200 L 40 40 1 1 B X RESET 10 -800 1600 200 R 40 40 1 1 I I X VCC 23 -800 400 200 R 40 40 1 1 W X VCC1 11 -800 500 200 R 40 40 1 1 W X VCC2 44 -800 300 200 R 40 40 1 1 W X XTAL1 14 -800 1100 200 R 40 40 1 1 B X XTAL2 13 -800 1300 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90LS4434J-S # Package Name: S44 # Dev Tech: LS # Dev Prefix: IC # Gate count = 1 # DEF AT90LS4434J-S IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-4 F0 "IC" -600 1730 50 H V L B F1 "AT90LS4434J-S" -600 -2000 50 H V L B F2 "avr-1-S44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -1900 P 2 1 0 0 600 -1900 -600 -1900 P 2 1 0 0 -600 -1900 -600 1700 X (ADC0)PA0 43 800 900 200 L 40 40 1 1 B X (ADC1)PA1 42 800 1000 200 L 40 40 1 1 B X (ADC2)PA2 41 800 1100 200 L 40 40 1 1 B X (ADC3)PA3 40 800 1200 200 L 40 40 1 1 B X (ADC4)PA4 39 800 1300 200 L 40 40 1 1 B X (ADC5)PA5 38 800 1400 200 L 40 40 1 1 B X (ADC6)PA6 37 800 1500 200 L 40 40 1 1 B X (ADC7)PA7 36 800 1600 200 L 40 40 1 1 B X (AIN0)PB2 4 800 200 200 L 40 40 1 1 B X (AIN1)PB3 5 800 300 200 L 40 40 1 1 B X (ICP)PD6 21 800 -1200 200 L 40 40 1 1 B X (INT0)PD2 17 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 18 800 -1500 200 L 40 40 1 1 B X (MISO)PB6 8 800 600 200 L 40 40 1 1 B X (MOSI)PB5 7 800 500 200 L 40 40 1 1 B X (OC1A)PD5 20 800 -1300 200 L 40 40 1 1 B X (OC1B)PD4 19 800 -1400 200 L 40 40 1 1 B X (OC2)PD7 22 800 -1100 200 L 40 40 1 1 B X (RXD)PD0 15 800 -1800 200 L 40 40 1 1 B X (SCK)PB7 9 800 700 200 L 40 40 1 1 B X (SS)PB4 6 800 400 200 L 40 40 1 1 B X (T0)PB0 2 800 0 200 L 40 40 1 1 B X (T1)PB1 3 800 100 200 L 40 40 1 1 B X (TOSC1)PC6 31 800 -300 200 L 40 40 1 1 B X (TOSC2)PC7 32 800 -200 200 L 40 40 1 1 B X (TXD)PD1 16 800 -1700 200 L 40 40 1 1 B X AGND 34 -800 700 200 R 40 40 1 1 W X AREF 35 -800 900 200 R 40 40 1 1 W X AVCC 33 -800 800 200 R 40 40 1 1 W X GND 24 -800 0 200 R 40 40 1 1 W X GND1 1 -800 100 200 R 40 40 1 1 W X GND2 12 -800 -100 200 R 40 40 1 1 W X PC0 25 800 -900 200 L 40 40 1 1 B X PC1 26 800 -800 200 L 40 40 1 1 B X PC2 27 800 -700 200 L 40 40 1 1 B X PC3 28 800 -600 200 L 40 40 1 1 B X PC4 29 800 -500 200 L 40 40 1 1 B X PC5 30 800 -400 200 L 40 40 1 1 B X RESET 10 -800 1600 200 R 40 40 1 1 I I X VCC 23 -800 400 200 R 40 40 1 1 W X VCC1 44 -800 500 200 R 40 40 1 1 W X VCC2 11 -800 300 200 R 40 40 1 1 W X XTAL1 14 -800 1100 200 R 40 40 1 1 B X XTAL2 13 -800 1300 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90LS4434J-SM # Package Name: PLCC-SM44 # Dev Tech: LS # Dev Prefix: IC # Gate count = 1 # DEF AT90LS4434J-SM IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-4 F0 "IC" -600 1730 50 H V L B F1 "AT90LS4434J-SM" -600 -2000 50 H V L B F2 "avr-1-PLCC-SM44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -1900 P 2 1 0 0 600 -1900 -600 -1900 P 2 1 0 0 -600 -1900 -600 1700 X (ADC0)PA0 43 800 900 200 L 40 40 1 1 B X (ADC1)PA1 42 800 1000 200 L 40 40 1 1 B X (ADC2)PA2 41 800 1100 200 L 40 40 1 1 B X (ADC3)PA3 40 800 1200 200 L 40 40 1 1 B X (ADC4)PA4 39 800 1300 200 L 40 40 1 1 B X (ADC5)PA5 38 800 1400 200 L 40 40 1 1 B X (ADC6)PA6 37 800 1500 200 L 40 40 1 1 B X (ADC7)PA7 36 800 1600 200 L 40 40 1 1 B X (AIN0)PB2 4 800 200 200 L 40 40 1 1 B X (AIN1)PB3 5 800 300 200 L 40 40 1 1 B X (ICP)PD6 21 800 -1200 200 L 40 40 1 1 B X (INT0)PD2 17 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 18 800 -1500 200 L 40 40 1 1 B X (MISO)PB6 8 800 600 200 L 40 40 1 1 B X (MOSI)PB5 7 800 500 200 L 40 40 1 1 B X (OC1A)PD5 20 800 -1300 200 L 40 40 1 1 B X (OC1B)PD4 19 800 -1400 200 L 40 40 1 1 B X (OC2)PD7 22 800 -1100 200 L 40 40 1 1 B X (RXD)PD0 15 800 -1800 200 L 40 40 1 1 B X (SCK)PB7 9 800 700 200 L 40 40 1 1 B X (SS)PB4 6 800 400 200 L 40 40 1 1 B X (T0)PB0 2 800 0 200 L 40 40 1 1 B X (T1)PB1 3 800 100 200 L 40 40 1 1 B X (TOSC1)PC6 31 800 -300 200 L 40 40 1 1 B X (TOSC2)PC7 32 800 -200 200 L 40 40 1 1 B X (TXD)PD1 16 800 -1700 200 L 40 40 1 1 B X AGND 34 -800 700 200 R 40 40 1 1 W X AREF 35 -800 900 200 R 40 40 1 1 W X AVCC 33 -800 800 200 R 40 40 1 1 W X GND 24 -800 0 200 R 40 40 1 1 W X GND1 1 -800 100 200 R 40 40 1 1 W X GND2 12 -800 -100 200 R 40 40 1 1 W X PC0 25 800 -900 200 L 40 40 1 1 B X PC1 26 800 -800 200 L 40 40 1 1 B X PC2 27 800 -700 200 L 40 40 1 1 B X PC3 28 800 -600 200 L 40 40 1 1 B X PC4 29 800 -500 200 L 40 40 1 1 B X PC5 30 800 -400 200 L 40 40 1 1 B X RESET 10 -800 1600 200 R 40 40 1 1 I I X VCC 23 -800 400 200 R 40 40 1 1 W X VCC1 11 -800 500 200 R 40 40 1 1 W X VCC2 44 -800 300 200 R 40 40 1 1 W X XTAL1 14 -800 1100 200 R 40 40 1 1 B X XTAL2 13 -800 1300 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90LS4434P # Package Name: DIL40 # Dev Tech: LS # Dev Prefix: IC # Gate count = 1 # DEF AT90LS4434P IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-3 F0 "IC" -600 1830 50 H V L B F1 "AT90LS4434P" -600 -1900 50 H V L B F2 "avr-1-DIL40" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1800 600 1800 P 2 1 0 0 600 1800 600 -1800 P 2 1 0 0 600 -1800 -600 -1800 P 2 1 0 0 -600 -1800 -600 1800 X (ADC0)PA0 40 800 1000 200 L 40 40 1 1 B X (ADC1)PA1 39 800 1100 200 L 40 40 1 1 B X (ADC2)PA2 38 800 1200 200 L 40 40 1 1 B X (ADC3)PA3 37 800 1300 200 L 40 40 1 1 B X (ADC4)PA4 36 800 1400 200 L 40 40 1 1 B X (ADC5)PA5 35 800 1500 200 L 40 40 1 1 B X (ADC6)PA6 34 800 1600 200 L 40 40 1 1 B X (ADC7)PA7 33 800 1700 200 L 40 40 1 1 B X (AIN0)PB2 3 800 300 200 L 40 40 1 1 B X (AIN1)PB3 4 800 400 200 L 40 40 1 1 B X (ICP)PD6 20 800 -1100 200 L 40 40 1 1 B X (INT0)PD2 16 800 -1500 200 L 40 40 1 1 B X (INT1)PD3 17 800 -1400 200 L 40 40 1 1 B X (MISO)PB6 7 800 700 200 L 40 40 1 1 B X (MOSI)PB5 6 800 600 200 L 40 40 1 1 B X (OC1A)PD5 19 800 -1200 200 L 40 40 1 1 B X (OC1B)PD4 18 800 -1300 200 L 40 40 1 1 B X (OC2)PD7 21 800 -1000 200 L 40 40 1 1 B X (RXD)PD0 14 800 -1700 200 L 40 40 1 1 B X (SCK)PB7 8 800 800 200 L 40 40 1 1 B X (SS)PB4 5 800 500 200 L 40 40 1 1 B X (T0)PB0 1 800 100 200 L 40 40 1 1 B X (T1)PB1 2 800 200 200 L 40 40 1 1 B X (TOSC1)PC6 28 800 -200 200 L 40 40 1 1 B X (TOSC2)PC7 29 800 -100 200 L 40 40 1 1 B X (TXD)PD1 15 800 -1600 200 L 40 40 1 1 B X AGND 31 -800 800 200 R 40 40 1 1 W X AREF 32 -800 1000 200 R 40 40 1 1 W X AVCC 30 -800 900 200 R 40 40 1 1 W X GND 11 -800 500 200 R 40 40 1 1 W X PC0 22 800 -800 200 L 40 40 1 1 B X PC1 23 800 -700 200 L 40 40 1 1 B X PC2 24 800 -600 200 L 40 40 1 1 B X PC3 25 800 -500 200 L 40 40 1 1 B X PC4 26 800 -400 200 L 40 40 1 1 B X PC5 27 800 -300 200 L 40 40 1 1 B X RESET 9 -800 1700 200 R 40 40 1 1 I I X VCC 10 -800 600 200 R 40 40 1 1 W X XTAL1 13 -800 1200 200 R 40 40 1 1 B X XTAL2 12 -800 1400 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90LS8535J # Package Name: PLCC44 # Dev Tech: LS # Dev Prefix: IC # Gate count = 1 # DEF AT90LS8535J IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-4 F0 "IC" -600 1730 50 H V L B F1 "AT90LS8535J" -600 -2000 50 H V L B F2 "avr-1-PLCC44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -1900 P 2 1 0 0 600 -1900 -600 -1900 P 2 1 0 0 -600 -1900 -600 1700 X (ADC0)PA0 43 800 900 200 L 40 40 1 1 B X (ADC1)PA1 42 800 1000 200 L 40 40 1 1 B X (ADC2)PA2 41 800 1100 200 L 40 40 1 1 B X (ADC3)PA3 40 800 1200 200 L 40 40 1 1 B X (ADC4)PA4 39 800 1300 200 L 40 40 1 1 B X (ADC5)PA5 38 800 1400 200 L 40 40 1 1 B X (ADC6)PA6 37 800 1500 200 L 40 40 1 1 B X (ADC7)PA7 36 800 1600 200 L 40 40 1 1 B X (AIN0)PB2 4 800 200 200 L 40 40 1 1 B X (AIN1)PB3 5 800 300 200 L 40 40 1 1 B X (ICP)PD6 21 800 -1200 200 L 40 40 1 1 B X (INT0)PD2 17 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 18 800 -1500 200 L 40 40 1 1 B X (MISO)PB6 8 800 600 200 L 40 40 1 1 B X (MOSI)PB5 7 800 500 200 L 40 40 1 1 B X (OC1A)PD5 20 800 -1300 200 L 40 40 1 1 B X (OC1B)PD4 19 800 -1400 200 L 40 40 1 1 B X (OC2)PD7 22 800 -1100 200 L 40 40 1 1 B X (RXD)PD0 15 800 -1800 200 L 40 40 1 1 B X (SCK)PB7 9 800 700 200 L 40 40 1 1 B X (SS)PB4 6 800 400 200 L 40 40 1 1 B X (T0)PB0 2 800 0 200 L 40 40 1 1 B X (T1)PB1 3 800 100 200 L 40 40 1 1 B X (TOSC1)PC6 31 800 -300 200 L 40 40 1 1 B X (TOSC2)PC7 32 800 -200 200 L 40 40 1 1 B X (TXD)PD1 16 800 -1700 200 L 40 40 1 1 B X AGND 34 -800 700 200 R 40 40 1 1 W X AREF 35 -800 900 200 R 40 40 1 1 W X AVCC 33 -800 800 200 R 40 40 1 1 W X GND 24 -800 0 200 R 40 40 1 1 W X GND1 1 -800 100 200 R 40 40 1 1 W X GND2 12 -800 -100 200 R 40 40 1 1 W X PC0 25 800 -900 200 L 40 40 1 1 B X PC1 26 800 -800 200 L 40 40 1 1 B X PC2 27 800 -700 200 L 40 40 1 1 B X PC3 28 800 -600 200 L 40 40 1 1 B X PC4 29 800 -500 200 L 40 40 1 1 B X PC5 30 800 -400 200 L 40 40 1 1 B X RESET 10 -800 1600 200 R 40 40 1 1 I I X VCC 23 -800 400 200 R 40 40 1 1 W X VCC1 11 -800 500 200 R 40 40 1 1 W X VCC2 44 -800 300 200 R 40 40 1 1 W X XTAL1 14 -800 1100 200 R 40 40 1 1 B X XTAL2 13 -800 1300 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90LS8535J-S # Package Name: S44 # Dev Tech: LS # Dev Prefix: IC # Gate count = 1 # DEF AT90LS8535J-S IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-4 F0 "IC" -600 1730 50 H V L B F1 "AT90LS8535J-S" -600 -2000 50 H V L B F2 "avr-1-S44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -1900 P 2 1 0 0 600 -1900 -600 -1900 P 2 1 0 0 -600 -1900 -600 1700 X (ADC0)PA0 43 800 900 200 L 40 40 1 1 B X (ADC1)PA1 42 800 1000 200 L 40 40 1 1 B X (ADC2)PA2 41 800 1100 200 L 40 40 1 1 B X (ADC3)PA3 40 800 1200 200 L 40 40 1 1 B X (ADC4)PA4 39 800 1300 200 L 40 40 1 1 B X (ADC5)PA5 38 800 1400 200 L 40 40 1 1 B X (ADC6)PA6 37 800 1500 200 L 40 40 1 1 B X (ADC7)PA7 36 800 1600 200 L 40 40 1 1 B X (AIN0)PB2 4 800 200 200 L 40 40 1 1 B X (AIN1)PB3 5 800 300 200 L 40 40 1 1 B X (ICP)PD6 21 800 -1200 200 L 40 40 1 1 B X (INT0)PD2 17 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 18 800 -1500 200 L 40 40 1 1 B X (MISO)PB6 8 800 600 200 L 40 40 1 1 B X (MOSI)PB5 7 800 500 200 L 40 40 1 1 B X (OC1A)PD5 20 800 -1300 200 L 40 40 1 1 B X (OC1B)PD4 19 800 -1400 200 L 40 40 1 1 B X (OC2)PD7 22 800 -1100 200 L 40 40 1 1 B X (RXD)PD0 15 800 -1800 200 L 40 40 1 1 B X (SCK)PB7 9 800 700 200 L 40 40 1 1 B X (SS)PB4 6 800 400 200 L 40 40 1 1 B X (T0)PB0 2 800 0 200 L 40 40 1 1 B X (T1)PB1 3 800 100 200 L 40 40 1 1 B X (TOSC1)PC6 31 800 -300 200 L 40 40 1 1 B X (TOSC2)PC7 32 800 -200 200 L 40 40 1 1 B X (TXD)PD1 16 800 -1700 200 L 40 40 1 1 B X AGND 34 -800 700 200 R 40 40 1 1 W X AREF 35 -800 900 200 R 40 40 1 1 W X AVCC 33 -800 800 200 R 40 40 1 1 W X GND 24 -800 0 200 R 40 40 1 1 W X GND1 1 -800 100 200 R 40 40 1 1 W X GND2 12 -800 -100 200 R 40 40 1 1 W X PC0 25 800 -900 200 L 40 40 1 1 B X PC1 26 800 -800 200 L 40 40 1 1 B X PC2 27 800 -700 200 L 40 40 1 1 B X PC3 28 800 -600 200 L 40 40 1 1 B X PC4 29 800 -500 200 L 40 40 1 1 B X PC5 30 800 -400 200 L 40 40 1 1 B X RESET 10 -800 1600 200 R 40 40 1 1 I I X VCC 23 -800 400 200 R 40 40 1 1 W X VCC1 11 -800 500 200 R 40 40 1 1 W X VCC2 44 -800 300 200 R 40 40 1 1 W X XTAL1 14 -800 1100 200 R 40 40 1 1 B X XTAL2 13 -800 1300 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90LS8535J-SM # Package Name: PLCC-SM44 # Dev Tech: LS # Dev Prefix: IC # Gate count = 1 # DEF AT90LS8535J-SM IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-4 F0 "IC" -600 1730 50 H V L B F1 "AT90LS8535J-SM" -600 -2000 50 H V L B F2 "avr-1-PLCC-SM44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -1900 P 2 1 0 0 600 -1900 -600 -1900 P 2 1 0 0 -600 -1900 -600 1700 X (ADC0)PA0 43 800 900 200 L 40 40 1 1 B X (ADC1)PA1 42 800 1000 200 L 40 40 1 1 B X (ADC2)PA2 41 800 1100 200 L 40 40 1 1 B X (ADC3)PA3 40 800 1200 200 L 40 40 1 1 B X (ADC4)PA4 39 800 1300 200 L 40 40 1 1 B X (ADC5)PA5 38 800 1400 200 L 40 40 1 1 B X (ADC6)PA6 37 800 1500 200 L 40 40 1 1 B X (ADC7)PA7 36 800 1600 200 L 40 40 1 1 B X (AIN0)PB2 4 800 200 200 L 40 40 1 1 B X (AIN1)PB3 5 800 300 200 L 40 40 1 1 B X (ICP)PD6 21 800 -1200 200 L 40 40 1 1 B X (INT0)PD2 17 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 18 800 -1500 200 L 40 40 1 1 B X (MISO)PB6 8 800 600 200 L 40 40 1 1 B X (MOSI)PB5 7 800 500 200 L 40 40 1 1 B X (OC1A)PD5 20 800 -1300 200 L 40 40 1 1 B X (OC1B)PD4 19 800 -1400 200 L 40 40 1 1 B X (OC2)PD7 22 800 -1100 200 L 40 40 1 1 B X (RXD)PD0 15 800 -1800 200 L 40 40 1 1 B X (SCK)PB7 9 800 700 200 L 40 40 1 1 B X (SS)PB4 6 800 400 200 L 40 40 1 1 B X (T0)PB0 2 800 0 200 L 40 40 1 1 B X (T1)PB1 3 800 100 200 L 40 40 1 1 B X (TOSC1)PC6 31 800 -300 200 L 40 40 1 1 B X (TOSC2)PC7 32 800 -200 200 L 40 40 1 1 B X (TXD)PD1 16 800 -1700 200 L 40 40 1 1 B X AGND 34 -800 700 200 R 40 40 1 1 W X AREF 35 -800 900 200 R 40 40 1 1 W X AVCC 33 -800 800 200 R 40 40 1 1 W X GND 24 -800 0 200 R 40 40 1 1 W X GND1 1 -800 100 200 R 40 40 1 1 W X GND2 12 -800 -100 200 R 40 40 1 1 W X PC0 25 800 -900 200 L 40 40 1 1 B X PC1 26 800 -800 200 L 40 40 1 1 B X PC2 27 800 -700 200 L 40 40 1 1 B X PC3 28 800 -600 200 L 40 40 1 1 B X PC4 29 800 -500 200 L 40 40 1 1 B X PC5 30 800 -400 200 L 40 40 1 1 B X RESET 10 -800 1600 200 R 40 40 1 1 I I X VCC 23 -800 400 200 R 40 40 1 1 W X VCC1 11 -800 500 200 R 40 40 1 1 W X VCC2 44 -800 300 200 R 40 40 1 1 W X XTAL1 14 -800 1100 200 R 40 40 1 1 B X XTAL2 13 -800 1300 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90LS8535P # Package Name: DIL40 # Dev Tech: LS # Dev Prefix: IC # Gate count = 1 # DEF AT90LS8535P IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-3 F0 "IC" -600 1830 50 H V L B F1 "AT90LS8535P" -600 -1900 50 H V L B F2 "avr-1-DIL40" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1800 600 1800 P 2 1 0 0 600 1800 600 -1800 P 2 1 0 0 600 -1800 -600 -1800 P 2 1 0 0 -600 -1800 -600 1800 X (ADC0)PA0 40 800 1000 200 L 40 40 1 1 B X (ADC1)PA1 39 800 1100 200 L 40 40 1 1 B X (ADC2)PA2 38 800 1200 200 L 40 40 1 1 B X (ADC3)PA3 37 800 1300 200 L 40 40 1 1 B X (ADC4)PA4 36 800 1400 200 L 40 40 1 1 B X (ADC5)PA5 35 800 1500 200 L 40 40 1 1 B X (ADC6)PA6 34 800 1600 200 L 40 40 1 1 B X (ADC7)PA7 33 800 1700 200 L 40 40 1 1 B X (AIN0)PB2 3 800 300 200 L 40 40 1 1 B X (AIN1)PB3 4 800 400 200 L 40 40 1 1 B X (ICP)PD6 20 800 -1100 200 L 40 40 1 1 B X (INT0)PD2 16 800 -1500 200 L 40 40 1 1 B X (INT1)PD3 17 800 -1400 200 L 40 40 1 1 B X (MISO)PB6 7 800 700 200 L 40 40 1 1 B X (MOSI)PB5 6 800 600 200 L 40 40 1 1 B X (OC1A)PD5 19 800 -1200 200 L 40 40 1 1 B X (OC1B)PD4 18 800 -1300 200 L 40 40 1 1 B X (OC2)PD7 21 800 -1000 200 L 40 40 1 1 B X (RXD)PD0 14 800 -1700 200 L 40 40 1 1 B X (SCK)PB7 8 800 800 200 L 40 40 1 1 B X (SS)PB4 5 800 500 200 L 40 40 1 1 B X (T0)PB0 1 800 100 200 L 40 40 1 1 B X (T1)PB1 2 800 200 200 L 40 40 1 1 B X (TOSC1)PC6 28 800 -200 200 L 40 40 1 1 B X (TOSC2)PC7 29 800 -100 200 L 40 40 1 1 B X (TXD)PD1 15 800 -1600 200 L 40 40 1 1 B X AGND 31 -800 800 200 R 40 40 1 1 W X AREF 32 -800 1000 200 R 40 40 1 1 W X AVCC 30 -800 900 200 R 40 40 1 1 W X GND 11 -800 500 200 R 40 40 1 1 W X PC0 22 800 -800 200 L 40 40 1 1 B X PC1 23 800 -700 200 L 40 40 1 1 B X PC2 24 800 -600 200 L 40 40 1 1 B X PC3 25 800 -500 200 L 40 40 1 1 B X PC4 26 800 -400 200 L 40 40 1 1 B X PC5 27 800 -300 200 L 40 40 1 1 B X RESET 9 -800 1700 200 R 40 40 1 1 I I X VCC 10 -800 600 200 R 40 40 1 1 W X XTAL1 13 -800 1200 200 R 40 40 1 1 B X XTAL2 12 -800 1400 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S1200P # Package Name: DIL20 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF AT90S1200P IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 15-I/O-1 F0 "IC" -500 930 50 H V L B F1 "AT90S1200P" -500 -900 50 H V L B F2 "avr-1-DIL20" 0 150 50 H I C C DRAW P 2 1 0 0 -500 900 500 900 P 2 1 0 0 500 900 500 -800 P 2 1 0 0 500 -800 -500 -800 P 2 1 0 0 -500 -800 -500 900 X (AIN0)PB0 12 700 100 200 L 40 40 1 1 B X (AIN1)PB1 13 700 200 200 L 40 40 1 1 B X (INT0)PD2 6 700 -500 200 L 40 40 1 1 B X (MISO)PB6 18 700 700 200 L 40 40 1 1 B X (MOSI)PB5 17 700 600 200 L 40 40 1 1 B X (SCK)PB7 19 700 800 200 L 40 40 1 1 B X (T0)PD4 8 700 -300 200 L 40 40 1 1 B X GND 10 -700 0 200 R 40 40 1 1 W X PB2 14 700 300 200 L 40 40 1 1 B X PB3 15 700 400 200 L 40 40 1 1 B X PB4 16 700 500 200 L 40 40 1 1 B X PD0 2 700 -700 200 L 40 40 1 1 B X PD1 3 700 -600 200 L 40 40 1 1 B X PD3 7 700 -400 200 L 40 40 1 1 B X PD5 9 700 -200 200 L 40 40 1 1 B X PD6 11 700 -100 200 L 40 40 1 1 B X RESET 1 -700 800 200 R 40 40 1 1 B I X VCC 20 -700 100 200 R 40 40 1 1 W X XTAL1 5 -700 300 200 R 40 40 1 1 B X XTAL2 4 -700 500 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S1200S # Package Name: SO20L # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF AT90S1200S IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 15-I/O-1 F0 "IC" -500 930 50 H V L B F1 "AT90S1200S" -500 -900 50 H V L B F2 "avr-1-SO20L" 0 150 50 H I C C DRAW P 2 1 0 0 -500 900 500 900 P 2 1 0 0 500 900 500 -800 P 2 1 0 0 500 -800 -500 -800 P 2 1 0 0 -500 -800 -500 900 X (AIN0)PB0 12 700 100 200 L 40 40 1 1 B X (AIN1)PB1 13 700 200 200 L 40 40 1 1 B X (INT0)PD2 6 700 -500 200 L 40 40 1 1 B X (MISO)PB6 18 700 700 200 L 40 40 1 1 B X (MOSI)PB5 17 700 600 200 L 40 40 1 1 B X (SCK)PB7 19 700 800 200 L 40 40 1 1 B X (T0)PD4 8 700 -300 200 L 40 40 1 1 B X GND 10 -700 0 200 R 40 40 1 1 W X PB2 14 700 300 200 L 40 40 1 1 B X PB3 15 700 400 200 L 40 40 1 1 B X PB4 16 700 500 200 L 40 40 1 1 B X PD0 2 700 -700 200 L 40 40 1 1 B X PD1 3 700 -600 200 L 40 40 1 1 B X PD3 7 700 -400 200 L 40 40 1 1 B X PD5 9 700 -200 200 L 40 40 1 1 B X PD6 11 700 -100 200 L 40 40 1 1 B X RESET 1 -700 800 200 R 40 40 1 1 B I X VCC 20 -700 100 200 R 40 40 1 1 W X XTAL1 5 -700 300 200 R 40 40 1 1 B X XTAL2 4 -700 500 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S1200Y # Package Name: SSOP20D8 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF AT90S1200Y IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 15-I/O-1 F0 "IC" -500 930 50 H V L B F1 "AT90S1200Y" -500 -900 50 H V L B F2 "avr-1-SSOP20D8" 0 150 50 H I C C DRAW P 2 1 0 0 -500 900 500 900 P 2 1 0 0 500 900 500 -800 P 2 1 0 0 500 -800 -500 -800 P 2 1 0 0 -500 -800 -500 900 X (AIN0)PB0 12 700 100 200 L 40 40 1 1 B X (AIN1)PB1 13 700 200 200 L 40 40 1 1 B X (INT0)PD2 6 700 -500 200 L 40 40 1 1 B X (MISO)PB6 18 700 700 200 L 40 40 1 1 B X (MOSI)PB5 17 700 600 200 L 40 40 1 1 B X (SCK)PB7 19 700 800 200 L 40 40 1 1 B X (T0)PD4 8 700 -300 200 L 40 40 1 1 B X GND 10 -700 0 200 R 40 40 1 1 W X PB2 14 700 300 200 L 40 40 1 1 B X PB3 15 700 400 200 L 40 40 1 1 B X PB4 16 700 500 200 L 40 40 1 1 B X PD0 2 700 -700 200 L 40 40 1 1 B X PD1 3 700 -600 200 L 40 40 1 1 B X PD3 7 700 -400 200 L 40 40 1 1 B X PD5 9 700 -200 200 L 40 40 1 1 B X PD6 11 700 -100 200 L 40 40 1 1 B X RESET 1 -700 800 200 R 40 40 1 1 B I X VCC 20 -700 100 200 R 40 40 1 1 W X XTAL1 5 -700 300 200 R 40 40 1 1 B X XTAL2 4 -700 500 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S2313P # Package Name: DIL20 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF AT90S2313P IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 15-I/O-2 F0 "IC" -500 930 50 H V L B F1 "AT90S2313P" -500 -900 50 H V L B F2 "avr-1-DIL20" 0 150 50 H I C C DRAW P 2 1 0 0 -500 900 500 900 P 2 1 0 0 500 900 500 -800 P 2 1 0 0 500 -800 -500 -800 P 2 1 0 0 -500 -800 -500 900 X (AIN0)PB0 12 700 100 200 L 40 40 1 1 B X (AIN1)PB1 13 700 200 200 L 40 40 1 1 B X (ICP)PD6 11 700 -100 200 L 40 40 1 1 B X (INT0)PD2 6 700 -500 200 L 40 40 1 1 B X (INT1)PD3 7 700 -400 200 L 40 40 1 1 B X (MISO)PB6 18 700 700 200 L 40 40 1 1 B X (MOSI)PB5 17 700 600 200 L 40 40 1 1 B X (OCI)PB3 15 700 400 200 L 40 40 1 1 B X (RXD)PD0 2 700 -700 200 L 40 40 1 1 B X (SCK)PB7 19 700 800 200 L 40 40 1 1 B X (T0)PD4 8 700 -300 200 L 40 40 1 1 B X (T1)PD5 9 700 -200 200 L 40 40 1 1 B X (TXD)PD1 3 700 -600 200 L 40 40 1 1 B X GND 10 -700 0 200 R 40 40 1 1 W X PB2 14 700 300 200 L 40 40 1 1 B X PB4 16 700 500 200 L 40 40 1 1 B X RESET 1 -700 800 200 R 40 40 1 1 B I X VCC 20 -700 100 200 R 40 40 1 1 W X XTAL1 5 -700 300 200 R 40 40 1 1 B X XTAL2 4 -700 500 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S2313S # Package Name: SO20L # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF AT90S2313S IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 15-I/O-2 F0 "IC" -500 930 50 H V L B F1 "AT90S2313S" -500 -900 50 H V L B F2 "avr-1-SO20L" 0 150 50 H I C C DRAW P 2 1 0 0 -500 900 500 900 P 2 1 0 0 500 900 500 -800 P 2 1 0 0 500 -800 -500 -800 P 2 1 0 0 -500 -800 -500 900 X (AIN0)PB0 12 700 100 200 L 40 40 1 1 B X (AIN1)PB1 13 700 200 200 L 40 40 1 1 B X (ICP)PD6 11 700 -100 200 L 40 40 1 1 B X (INT0)PD2 6 700 -500 200 L 40 40 1 1 B X (INT1)PD3 7 700 -400 200 L 40 40 1 1 B X (MISO)PB6 18 700 700 200 L 40 40 1 1 B X (MOSI)PB5 17 700 600 200 L 40 40 1 1 B X (OCI)PB3 15 700 400 200 L 40 40 1 1 B X (RXD)PD0 2 700 -700 200 L 40 40 1 1 B X (SCK)PB7 19 700 800 200 L 40 40 1 1 B X (T0)PD4 8 700 -300 200 L 40 40 1 1 B X (T1)PD5 9 700 -200 200 L 40 40 1 1 B X (TXD)PD1 3 700 -600 200 L 40 40 1 1 B X GND 10 -700 0 200 R 40 40 1 1 W X PB2 14 700 300 200 L 40 40 1 1 B X PB4 16 700 500 200 L 40 40 1 1 B X RESET 1 -700 800 200 R 40 40 1 1 B I X VCC 20 -700 100 200 R 40 40 1 1 W X XTAL1 5 -700 300 200 R 40 40 1 1 B X XTAL2 4 -700 500 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S2323P # Package Name: DIL08 # Dev Tech: S # Dev Prefix: IC # Gate count = 1 # DEF AT90S2323P IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 3-I/O-1 F0 "IC" -500 430 50 H V L B F1 "AT90S2323P" -500 -600 50 H V L B F2 "avr-1-DIL08" 0 150 50 H I C C DRAW P 2 1 0 0 -500 -500 500 -500 P 2 1 0 0 500 -500 500 400 P 2 1 0 0 500 400 -500 400 P 2 1 0 0 -500 400 -500 -500 X (MISO)PB1 6 700 200 200 L 40 40 1 1 B X (MOSI)PB0 5 700 100 200 L 40 40 1 1 B X (SCK)PB2 7 700 300 200 L 40 40 1 1 B X GND 4 -700 -400 200 R 40 40 1 1 W X RESET 1 -700 300 200 R 40 40 1 1 I I X VCC 8 -700 -300 200 R 40 40 1 1 W X XTAL1 2 -700 -100 200 R 40 40 1 1 B X XTAL2 3 -700 100 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S2323S # Package Name: SOIC8 # Dev Tech: S # Dev Prefix: IC # Gate count = 1 # DEF AT90S2323S IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 3-I/O-1 F0 "IC" -500 430 50 H V L B F1 "AT90S2323S" -500 -600 50 H V L B F2 "avr-1-SOIC8" 0 150 50 H I C C DRAW P 2 1 0 0 -500 -500 500 -500 P 2 1 0 0 500 -500 500 400 P 2 1 0 0 500 400 -500 400 P 2 1 0 0 -500 400 -500 -500 X (MISO)PB1 6 700 200 200 L 40 40 1 1 B X (MOSI)PB0 5 700 100 200 L 40 40 1 1 B X (SCK)PB2 7 700 300 200 L 40 40 1 1 B X GND 4 -700 -400 200 R 40 40 1 1 W X RESET 1 -700 300 200 R 40 40 1 1 I I X VCC 8 -700 -300 200 R 40 40 1 1 W X XTAL1 2 -700 -100 200 R 40 40 1 1 B X XTAL2 3 -700 100 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S2333AA # Package Name: TQFP32-08 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF AT90S2333AA IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 20-I/O-1 F0 "IC" -600 1130 50 H V L B F1 "AT90S2333AA" -600 -1300 50 H V L B F2 "avr-1-TQFP32-08" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1100 500 1100 P 2 1 0 0 500 1100 500 -1200 P 2 1 0 0 500 -1200 -600 -1200 P 2 1 0 0 -600 -1200 -600 1100 X (ADC0)PC0 23 700 -200 200 L 40 40 1 1 B X (ADC1)PC1 24 700 -100 200 L 40 40 1 1 B X (ADC2)PC2 25 700 0 200 L 40 40 1 1 B X (ADC3)PC3 26 700 100 200 L 40 40 1 1 B X (ADC4)PC4 27 700 200 200 L 40 40 1 1 B X (ADC5)PC5 28 700 300 200 L 40 40 1 1 B X (AIN0)PD6 10 700 -500 200 L 40 40 1 1 B X (AIN1)PD7 11 700 -400 200 L 40 40 1 1 B X (ICP)PB0 12 700 500 200 L 40 40 1 1 B X (INT0)PD2 32 700 -900 200 L 40 40 1 1 B X (INT1)PD3 1 700 -800 200 L 40 40 1 1 B X (MISO)PB4 16 700 900 200 L 40 40 1 1 B X (MOSI)PB3 15 700 800 200 L 40 40 1 1 B X (OC1)PB1 13 700 600 200 L 40 40 1 1 B X (RXD)PD0 30 700 -1100 200 L 40 40 1 1 B X (SCK)PB5 17 700 1000 200 L 40 40 1 1 B X (SS)PB2 14 700 700 200 L 40 40 1 1 B X (T0)PD4 2 700 -700 200 L 40 40 1 1 B X (T1)PD5 9 700 -600 200 L 40 40 1 1 B X (TXD)PD1 31 700 -1000 200 L 40 40 1 1 B X AGND 21 -800 100 200 R 40 40 1 1 W X AREF 20 -800 300 200 R 40 40 1 1 W X AVCC 18 -800 200 200 R 40 40 1 1 W X GND 5 -800 -200 200 R 40 40 1 1 W X NC1 3 -600 -800 0 R 40 40 1 1 U X NC2 6 -600 -900 0 R 40 40 1 1 U X NC3 19 -600 -1000 0 R 40 40 1 1 U X NC4 22 -600 -1100 0 R 40 40 1 1 U X RESET 29 -800 1000 200 R 40 40 1 1 I I X VCC 4 -800 -100 200 R 40 40 1 1 W X XTAL1 7 -800 500 200 R 40 40 1 1 B X XTAL2 8 -800 700 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S2333P # Package Name: DIL28-3 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF AT90S2333P IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 20-I/O-2 F0 "IC" -600 1130 50 H V L B F1 "AT90S2333P" -600 -1300 50 H V L B F2 "avr-1-DIL28-3" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1100 500 1100 P 2 1 0 0 500 1100 500 -1200 P 2 1 0 0 500 -1200 -600 -1200 P 2 1 0 0 -600 -1200 -600 1100 X (ADC0)PC0) 23 700 -200 200 L 40 40 1 1 B X (ADC1)PC1 24 700 -100 200 L 40 40 1 1 B X (ADC2)PC2 25 700 0 200 L 40 40 1 1 B X (ADC3)PC3 26 700 100 200 L 40 40 1 1 B X (ADC4)PC4 27 700 200 200 L 40 40 1 1 B X (ADC5)PC5 28 700 300 200 L 40 40 1 1 B X (AIN0)PD6 12 700 -500 200 L 40 40 1 1 B X (AIN1)PD7 13 700 -400 200 L 40 40 1 1 B X (ICP)PB0 14 700 500 200 L 40 40 1 1 B X (INT0)PD2 4 700 -900 200 L 40 40 1 1 B X (INT1)PD3 5 700 -800 200 L 40 40 1 1 B X (MISO)PB4 18 700 900 200 L 40 40 1 1 B X (MOSI)PB3 17 700 800 200 L 40 40 1 1 B X (OC1)PB1 15 700 600 200 L 40 40 1 1 B X (RXD)PD0 2 700 -1100 200 L 40 40 1 1 B X (SCK)PB5 19 700 1000 200 L 40 40 1 1 B X (SS)PB2 16 700 700 200 L 40 40 1 1 B X (T0)PD4 6 700 -700 200 L 40 40 1 1 B X (T1)PD5 11 700 -600 200 L 40 40 1 1 B X (TXD)PD1 3 700 -1000 200 L 40 40 1 1 B X AGND 22 -800 100 200 R 40 40 1 1 W X AREF 21 -800 300 200 R 40 40 1 1 W X AVCC 20 -800 200 200 R 40 40 1 1 W X GND 8 -800 -200 200 R 40 40 1 1 W X RESET 1 -800 1000 200 R 40 40 1 1 I I X VCC 7 -800 -100 200 R 40 40 1 1 W X XTAL1 9 -800 500 200 R 40 40 1 1 B X XTAL2 10 -800 700 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S2343P # Package Name: DIL08 # Dev Tech: S # Dev Prefix: IC # Gate count = 1 # DEF AT90S2343P IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 5-I/O-1 F0 "IC" -500 330 50 H V L B F1 "AT90S2343P" -500 -400 50 H V L B F2 "avr-1-DIL08" 0 150 50 H I C C DRAW P 2 1 0 0 -500 -300 500 -300 P 2 1 0 0 500 -300 500 300 P 2 1 0 0 500 300 -500 300 P 2 1 0 0 -500 300 -500 -300 X (CLOCK)PB3 2 700 100 200 L 40 40 1 1 B X (MISO)PB1 6 700 -100 200 L 40 40 1 1 B X (MOSI)PB0 5 700 -200 200 L 40 40 1 1 B X (SCK)PB2 7 700 0 200 L 40 40 1 1 B X GND 4 -700 -200 200 R 40 40 1 1 W X PB4 3 700 200 200 L 40 40 1 1 B X RESET 1 -700 200 200 R 40 40 1 1 I I X VCC 8 -700 -100 200 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: AT90S2343S # Package Name: SOIC8 # Dev Tech: S # Dev Prefix: IC # Gate count = 1 # DEF AT90S2343S IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 5-I/O-1 F0 "IC" -500 330 50 H V L B F1 "AT90S2343S" -500 -400 50 H V L B F2 "avr-1-SOIC8" 0 150 50 H I C C DRAW P 2 1 0 0 -500 -300 500 -300 P 2 1 0 0 500 -300 500 300 P 2 1 0 0 500 300 -500 300 P 2 1 0 0 -500 300 -500 -300 X (CLOCK)PB3 2 700 100 200 L 40 40 1 1 B X (MISO)PB1 6 700 -100 200 L 40 40 1 1 B X (MOSI)PB0 5 700 -200 200 L 40 40 1 1 B X (SCK)PB2 7 700 0 200 L 40 40 1 1 B X GND 4 -700 -200 200 R 40 40 1 1 W X PB4 3 700 200 200 L 40 40 1 1 B X RESET 1 -700 200 200 R 40 40 1 1 I I X VCC 8 -700 -100 200 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: AT90S4414A # Package Name: TQFP44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF AT90S4414A IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-1 F0 "IC" -600 1430 50 H V L B F1 "AT90S4414A" -600 -2300 50 H V L B F2 "avr-1-TQFP44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1400 600 1400 P 2 1 0 0 600 1400 600 -2200 P 2 1 0 0 600 -2200 -600 -2200 P 2 1 0 0 -600 -2200 -600 1400 X (A8)PC0 18 800 -1200 200 L 40 40 1 1 B X (A9)PC1 19 800 -1100 200 L 40 40 1 1 B X (A10)PC2 20 800 -1000 200 L 40 40 1 1 B X (A11)PC3 21 800 -900 200 L 40 40 1 1 B X (A12)PC4 22 800 -800 200 L 40 40 1 1 B X (A13)PC5 23 800 -700 200 L 40 40 1 1 B X (A14)PC6 24 800 -600 200 L 40 40 1 1 B X (A15)PC7 25 800 -500 200 L 40 40 1 1 B X (AD0)PA0 37 800 600 200 L 40 40 1 1 B X (AD1)PA1 36 800 700 200 L 40 40 1 1 B X (AD2)PA2 35 800 800 200 L 40 40 1 1 B X (AD3)PA3 34 800 900 200 L 40 40 1 1 B X (AD4)PA4 33 800 1000 200 L 40 40 1 1 B X (AD5)PA5 32 800 1100 200 L 40 40 1 1 B X (AD6)PA6 31 800 1200 200 L 40 40 1 1 B X (AD7)PA7 30 800 1300 200 L 40 40 1 1 B X (AIN0)PB2 42 800 -100 200 L 40 40 1 1 B X (AIN1)PB3 43 800 0 200 L 40 40 1 1 B X (INT0)PD2 8 800 -1900 200 L 40 40 1 1 B X (INT1)PD3 9 800 -1800 200 L 40 40 1 1 B X (MISO)PB6 2 800 300 200 L 40 40 1 1 B X (MOSI)PB5 1 800 200 200 L 40 40 1 1 B X (OC1A)PD5 11 800 -1600 200 L 40 40 1 1 B X (RD)PD7 13 800 -1400 200 L 40 40 1 1 B X (RXD)PD0 5 800 -2100 200 L 40 40 1 1 B X (SCK)PB7 3 800 400 200 L 40 40 1 1 B X (SS)PB4 44 800 100 200 L 40 40 1 1 B X (T0)PB0 40 800 -300 200 L 40 40 1 1 B X (T1)PB1 41 800 -200 200 L 40 40 1 1 B X (TXD)PD1 7 800 -2000 200 L 40 40 1 1 B X (WR)PD6 12 800 -1500 200 L 40 40 1 1 B X ALE 27 -800 500 200 R 40 40 1 1 B X GND 16 -800 100 200 R 40 40 1 1 W X ICP 29 -800 600 200 R 40 40 1 1 B X OC1B 26 -800 400 200 R 40 40 1 1 B X PD4 10 800 -1700 200 L 40 40 1 1 B X RESET 4 -800 1300 200 R 40 40 1 1 I I X VCC 38 -800 200 200 R 40 40 1 1 W X XTAL1 15 -800 800 200 R 40 40 1 1 B X XTAL2 14 -800 1000 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S4414J1 # Package Name: S44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF AT90S4414J1 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-1 F0 "IC" -600 1430 50 H V L B F1 "AT90S4414J1" -600 -2300 50 H V L B F2 "avr-1-S44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1400 600 1400 P 2 1 0 0 600 1400 600 -2200 P 2 1 0 0 600 -2200 -600 -2200 P 2 1 0 0 -600 -2200 -600 1400 X (A8)PC0 24 800 -1200 200 L 40 40 1 1 B X (A9)PC1 25 800 -1100 200 L 40 40 1 1 B X (A10)PC2 26 800 -1000 200 L 40 40 1 1 B X (A11)PC3 27 800 -900 200 L 40 40 1 1 B X (A12)PC4 28 800 -800 200 L 40 40 1 1 B X (A13)PC5 29 800 -700 200 L 40 40 1 1 B X (A14)PC6 30 800 -600 200 L 40 40 1 1 B X (A15)PC7 31 800 -500 200 L 40 40 1 1 B X (AD0)PA0 43 800 600 200 L 40 40 1 1 B X (AD1)PA1 42 800 700 200 L 40 40 1 1 B X (AD2)PA2 41 800 800 200 L 40 40 1 1 B X (AD3)PA3 40 800 900 200 L 40 40 1 1 B X (AD4)PA4 39 800 1000 200 L 40 40 1 1 B X (AD5)PA5 38 800 1100 200 L 40 40 1 1 B X (AD6)PA6 37 800 1200 200 L 40 40 1 1 B X (AD7)PA7 36 800 1300 200 L 40 40 1 1 B X (AIN0)PB2 4 800 -100 200 L 40 40 1 1 B X (AIN1)PB3 5 800 0 200 L 40 40 1 1 B X (INT0)PD2 14 800 -1900 200 L 40 40 1 1 B X (INT1)PD3 15 800 -1800 200 L 40 40 1 1 B X (MISO)PB6 8 800 300 200 L 40 40 1 1 B X (MOSI)PB5 7 800 200 200 L 40 40 1 1 B X (OC1A)PD5 17 800 -1600 200 L 40 40 1 1 B X (RD)PD7 19 800 -1400 200 L 40 40 1 1 B X (RXD)PD0 11 800 -2100 200 L 40 40 1 1 B X (SCK)PB7 9 800 400 200 L 40 40 1 1 B X (SS)PB4 6 800 100 200 L 40 40 1 1 B X (T0)PB0 2 800 -300 200 L 40 40 1 1 B X (T1)PB1 3 800 -200 200 L 40 40 1 1 B X (TXD)PD1 13 800 -2000 200 L 40 40 1 1 B X (WR)PD6 18 800 -1500 200 L 40 40 1 1 B X ALE 33 -800 500 200 R 40 40 1 1 B X GND 22 -800 100 200 R 40 40 1 1 W X ICP 35 -800 600 200 R 40 40 1 1 B X OC1B 32 -800 400 200 R 40 40 1 1 B X PD4 16 800 -1700 200 L 40 40 1 1 B X RESET 10 -800 1300 200 R 40 40 1 1 I I X VCC 44 -800 200 200 R 40 40 1 1 W X XTAL1 21 -800 800 200 R 40 40 1 1 B X XTAL2 20 -800 1000 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S4414J2 # Package Name: PLCC44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF AT90S4414J2 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-1 F0 "IC" -600 1430 50 H V L B F1 "AT90S4414J2" -600 -2300 50 H V L B F2 "avr-1-PLCC44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1400 600 1400 P 2 1 0 0 600 1400 600 -2200 P 2 1 0 0 600 -2200 -600 -2200 P 2 1 0 0 -600 -2200 -600 1400 X (A8)PC0 24 800 -1200 200 L 40 40 1 1 B X (A9)PC1 25 800 -1100 200 L 40 40 1 1 B X (A10)PC2 26 800 -1000 200 L 40 40 1 1 B X (A11)PC3 27 800 -900 200 L 40 40 1 1 B X (A12)PC4 28 800 -800 200 L 40 40 1 1 B X (A13)PC5 29 800 -700 200 L 40 40 1 1 B X (A14)PC6 30 800 -600 200 L 40 40 1 1 B X (A15)PC7 31 800 -500 200 L 40 40 1 1 B X (AD0)PA0 43 800 600 200 L 40 40 1 1 B X (AD1)PA1 42 800 700 200 L 40 40 1 1 B X (AD2)PA2 41 800 800 200 L 40 40 1 1 B X (AD3)PA3 40 800 900 200 L 40 40 1 1 B X (AD4)PA4 39 800 1000 200 L 40 40 1 1 B X (AD5)PA5 38 800 1100 200 L 40 40 1 1 B X (AD6)PA6 37 800 1200 200 L 40 40 1 1 B X (AD7)PA7 36 800 1300 200 L 40 40 1 1 B X (AIN0)PB2 4 800 -100 200 L 40 40 1 1 B X (AIN1)PB3 5 800 0 200 L 40 40 1 1 B X (INT0)PD2 14 800 -1900 200 L 40 40 1 1 B X (INT1)PD3 15 800 -1800 200 L 40 40 1 1 B X (MISO)PB6 8 800 300 200 L 40 40 1 1 B X (MOSI)PB5 7 800 200 200 L 40 40 1 1 B X (OC1A)PD5 17 800 -1600 200 L 40 40 1 1 B X (RD)PD7 19 800 -1400 200 L 40 40 1 1 B X (RXD)PD0 11 800 -2100 200 L 40 40 1 1 B X (SCK)PB7 9 800 400 200 L 40 40 1 1 B X (SS)PB4 6 800 100 200 L 40 40 1 1 B X (T0)PB0 2 800 -300 200 L 40 40 1 1 B X (T1)PB1 3 800 -200 200 L 40 40 1 1 B X (TXD)PD1 13 800 -2000 200 L 40 40 1 1 B X (WR)PD6 18 800 -1500 200 L 40 40 1 1 B X ALE 33 -800 500 200 R 40 40 1 1 B X GND 22 -800 100 200 R 40 40 1 1 W X ICP 35 -800 600 200 R 40 40 1 1 B X OC1B 32 -800 400 200 R 40 40 1 1 B X PD4 16 800 -1700 200 L 40 40 1 1 B X RESET 10 -800 1300 200 R 40 40 1 1 I I X VCC 44 -800 200 200 R 40 40 1 1 W X XTAL1 21 -800 800 200 R 40 40 1 1 B X XTAL2 20 -800 1000 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S4414J3 # Package Name: PLCC-SM44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF AT90S4414J3 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-1 F0 "IC" -600 1430 50 H V L B F1 "AT90S4414J3" -600 -2300 50 H V L B F2 "avr-1-PLCC-SM44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1400 600 1400 P 2 1 0 0 600 1400 600 -2200 P 2 1 0 0 600 -2200 -600 -2200 P 2 1 0 0 -600 -2200 -600 1400 X (A8)PC0 24 800 -1200 200 L 40 40 1 1 B X (A9)PC1 25 800 -1100 200 L 40 40 1 1 B X (A10)PC2 26 800 -1000 200 L 40 40 1 1 B X (A11)PC3 27 800 -900 200 L 40 40 1 1 B X (A12)PC4 28 800 -800 200 L 40 40 1 1 B X (A13)PC5 29 800 -700 200 L 40 40 1 1 B X (A14)PC6 30 800 -600 200 L 40 40 1 1 B X (A15)PC7 31 800 -500 200 L 40 40 1 1 B X (AD0)PA0 43 800 600 200 L 40 40 1 1 B X (AD1)PA1 42 800 700 200 L 40 40 1 1 B X (AD2)PA2 41 800 800 200 L 40 40 1 1 B X (AD3)PA3 40 800 900 200 L 40 40 1 1 B X (AD4)PA4 39 800 1000 200 L 40 40 1 1 B X (AD5)PA5 38 800 1100 200 L 40 40 1 1 B X (AD6)PA6 37 800 1200 200 L 40 40 1 1 B X (AD7)PA7 36 800 1300 200 L 40 40 1 1 B X (AIN0)PB2 4 800 -100 200 L 40 40 1 1 B X (AIN1)PB3 5 800 0 200 L 40 40 1 1 B X (INT0)PD2 14 800 -1900 200 L 40 40 1 1 B X (INT1)PD3 15 800 -1800 200 L 40 40 1 1 B X (MISO)PB6 8 800 300 200 L 40 40 1 1 B X (MOSI)PB5 7 800 200 200 L 40 40 1 1 B X (OC1A)PD5 17 800 -1600 200 L 40 40 1 1 B X (RD)PD7 19 800 -1400 200 L 40 40 1 1 B X (RXD)PD0 11 800 -2100 200 L 40 40 1 1 B X (SCK)PB7 9 800 400 200 L 40 40 1 1 B X (SS)PB4 6 800 100 200 L 40 40 1 1 B X (T0)PB0 2 800 -300 200 L 40 40 1 1 B X (T1)PB1 3 800 -200 200 L 40 40 1 1 B X (TXD)PD1 13 800 -2000 200 L 40 40 1 1 B X (WR)PD6 18 800 -1500 200 L 40 40 1 1 B X ALE 33 -800 500 200 R 40 40 1 1 B X GND 22 -800 100 200 R 40 40 1 1 W X ICP 35 -800 600 200 R 40 40 1 1 B X OC1B 32 -800 400 200 R 40 40 1 1 B X PD4 16 800 -1700 200 L 40 40 1 1 B X RESET 10 -800 1300 200 R 40 40 1 1 I I X VCC 44 -800 200 200 R 40 40 1 1 W X XTAL1 21 -800 800 200 R 40 40 1 1 B X XTAL2 20 -800 1000 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S4414P # Package Name: DIL40 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF AT90S4414P IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-1 F0 "IC" -600 1430 50 H V L B F1 "AT90S4414P" -600 -2300 50 H V L B F2 "avr-1-DIL40" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1400 600 1400 P 2 1 0 0 600 1400 600 -2200 P 2 1 0 0 600 -2200 -600 -2200 P 2 1 0 0 -600 -2200 -600 1400 X (A8)PC0 21 800 -1200 200 L 40 40 1 1 B X (A9)PC1 22 800 -1100 200 L 40 40 1 1 B X (A10)PC2 23 800 -1000 200 L 40 40 1 1 B X (A11)PC3 24 800 -900 200 L 40 40 1 1 B X (A12)PC4 25 800 -800 200 L 40 40 1 1 B X (A13)PC5 26 800 -700 200 L 40 40 1 1 B X (A14)PC6 27 800 -600 200 L 40 40 1 1 B X (A15)PC7 28 800 -500 200 L 40 40 1 1 B X (AD0)PA0 39 800 600 200 L 40 40 1 1 B X (AD1)PA1 38 800 700 200 L 40 40 1 1 B X (AD2)PA2 37 800 800 200 L 40 40 1 1 B X (AD3)PA3 36 800 900 200 L 40 40 1 1 B X (AD4)PA4 35 800 1000 200 L 40 40 1 1 B X (AD5)PA5 34 800 1100 200 L 40 40 1 1 B X (AD6)PA6 33 800 1200 200 L 40 40 1 1 B X (AD7)PA7 32 800 1300 200 L 40 40 1 1 B X (AIN0)PB2 3 800 -100 200 L 40 40 1 1 B X (AIN1)PB3 4 800 0 200 L 40 40 1 1 B X (INT0)PD2 12 800 -1900 200 L 40 40 1 1 B X (INT1)PD3 13 800 -1800 200 L 40 40 1 1 B X (MISO)PB6 7 800 300 200 L 40 40 1 1 B X (MOSI)PB5 6 800 200 200 L 40 40 1 1 B X (OC1A)PD5 15 800 -1600 200 L 40 40 1 1 B X (RD)PD7 17 800 -1400 200 L 40 40 1 1 B X (RXD)PD0 10 800 -2100 200 L 40 40 1 1 B X (SCK)PB7 8 800 400 200 L 40 40 1 1 B X (SS)PB4 5 800 100 200 L 40 40 1 1 B X (T0)PB0 1 800 -300 200 L 40 40 1 1 B X (T1)PB1 2 800 -200 200 L 40 40 1 1 B X (TXD)PD1 11 800 -2000 200 L 40 40 1 1 B X (WR)PD6 16 800 -1500 200 L 40 40 1 1 B X ALE 30 -800 500 200 R 40 40 1 1 B X GND 20 -800 100 200 R 40 40 1 1 W X ICP 31 -800 600 200 R 40 40 1 1 B X OC1B 29 -800 400 200 R 40 40 1 1 B X PD4 14 800 -1700 200 L 40 40 1 1 B X RESET 9 -800 1300 200 R 40 40 1 1 I I X VCC 40 -800 200 200 R 40 40 1 1 W X XTAL1 19 -800 800 200 R 40 40 1 1 B X XTAL2 18 -800 1000 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S4433A # Package Name: TQFP32-08 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF AT90S4433A IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 20-I/O-2 F0 "IC" -600 1130 50 H V L B F1 "AT90S4433A" -600 -1300 50 H V L B F2 "avr-1-TQFP32-08" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1100 500 1100 P 2 1 0 0 500 1100 500 -1200 P 2 1 0 0 500 -1200 -600 -1200 P 2 1 0 0 -600 -1200 -600 1100 X (ADC0)PC0) 23 700 -200 200 L 40 40 1 1 B X (ADC1)PC1 24 700 -100 200 L 40 40 1 1 B X (ADC2)PC2 25 700 0 200 L 40 40 1 1 B X (ADC3)PC3 26 700 100 200 L 40 40 1 1 B X (ADC4)PC4 27 700 200 200 L 40 40 1 1 B X (ADC5)PC5 28 700 300 200 L 40 40 1 1 B X (AIN0)PD6 10 700 -500 200 L 40 40 1 1 B X (AIN1)PD7 11 700 -400 200 L 40 40 1 1 B X (ICP)PB0 12 700 500 200 L 40 40 1 1 B X (INT0)PD2 32 700 -900 200 L 40 40 1 1 B X (INT1)PD3 1 700 -800 200 L 40 40 1 1 B X (MISO)PB4 16 700 900 200 L 40 40 1 1 B X (MOSI)PB3 15 700 800 200 L 40 40 1 1 B X (OC1)PB1 13 700 600 200 L 40 40 1 1 B X (RXD)PD0 30 700 -1100 200 L 40 40 1 1 B X (SCK)PB5 17 700 1000 200 L 40 40 1 1 B X (SS)PB2 14 700 700 200 L 40 40 1 1 B X (T0)PD4 2 700 -700 200 L 40 40 1 1 B X (T1)PD5 9 700 -600 200 L 40 40 1 1 B X (TXD)PD1 31 700 -1000 200 L 40 40 1 1 B X AGND 21 -800 100 200 R 40 40 1 1 W X AREF 20 -800 300 200 R 40 40 1 1 W X AVCC 18 -800 200 200 R 40 40 1 1 W X GND 5 -800 -200 200 R 40 40 1 1 W X RESET 29 -800 1000 200 R 40 40 1 1 I I X VCC 4 -800 -100 200 R 40 40 1 1 W X XTAL1 7 -800 500 200 R 40 40 1 1 B X XTAL2 8 -800 700 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S4433P # Package Name: DIL28-3 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF AT90S4433P IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 20-I/O-2 F0 "IC" -600 1130 50 H V L B F1 "AT90S4433P" -600 -1300 50 H V L B F2 "avr-1-DIL28-3" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1100 500 1100 P 2 1 0 0 500 1100 500 -1200 P 2 1 0 0 500 -1200 -600 -1200 P 2 1 0 0 -600 -1200 -600 1100 X (ADC0)PC0) 23 700 -200 200 L 40 40 1 1 B X (ADC1)PC1 24 700 -100 200 L 40 40 1 1 B X (ADC2)PC2 25 700 0 200 L 40 40 1 1 B X (ADC3)PC3 26 700 100 200 L 40 40 1 1 B X (ADC4)PC4 27 700 200 200 L 40 40 1 1 B X (ADC5)PC5 28 700 300 200 L 40 40 1 1 B X (AIN0)PD6 12 700 -500 200 L 40 40 1 1 B X (AIN1)PD7 13 700 -400 200 L 40 40 1 1 B X (ICP)PB0 14 700 500 200 L 40 40 1 1 B X (INT0)PD2 4 700 -900 200 L 40 40 1 1 B X (INT1)PD3 5 700 -800 200 L 40 40 1 1 B X (MISO)PB4 18 700 900 200 L 40 40 1 1 B X (MOSI)PB3 17 700 800 200 L 40 40 1 1 B X (OC1)PB1 15 700 600 200 L 40 40 1 1 B X (RXD)PD0 2 700 -1100 200 L 40 40 1 1 B X (SCK)PB5 19 700 1000 200 L 40 40 1 1 B X (SS)PB2 16 700 700 200 L 40 40 1 1 B X (T0)PD4 6 700 -700 200 L 40 40 1 1 B X (T1)PD5 11 700 -600 200 L 40 40 1 1 B X (TXD)PD1 3 700 -1000 200 L 40 40 1 1 B X AGND 22 -800 100 200 R 40 40 1 1 W X AREF 21 -800 300 200 R 40 40 1 1 W X AVCC 20 -800 200 200 R 40 40 1 1 W X GND 8 -800 -200 200 R 40 40 1 1 W X RESET 1 -800 1000 200 R 40 40 1 1 I I X VCC 7 -800 -100 200 R 40 40 1 1 W X XTAL1 9 -800 500 200 R 40 40 1 1 B X XTAL2 10 -800 700 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S4434J # Package Name: PLCC44 # Dev Tech: S # Dev Prefix: IC # Gate count = 1 # DEF AT90S4434J IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-4 F0 "IC" -600 1730 50 H V L B F1 "AT90S4434J" -600 -2000 50 H V L B F2 "avr-1-PLCC44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -1900 P 2 1 0 0 600 -1900 -600 -1900 P 2 1 0 0 -600 -1900 -600 1700 X (ADC0)PA0 43 800 900 200 L 40 40 1 1 B X (ADC1)PA1 42 800 1000 200 L 40 40 1 1 B X (ADC2)PA2 41 800 1100 200 L 40 40 1 1 B X (ADC3)PA3 40 800 1200 200 L 40 40 1 1 B X (ADC4)PA4 39 800 1300 200 L 40 40 1 1 B X (ADC5)PA5 38 800 1400 200 L 40 40 1 1 B X (ADC6)PA6 37 800 1500 200 L 40 40 1 1 B X (ADC7)PA7 36 800 1600 200 L 40 40 1 1 B X (AIN0)PB2 4 800 200 200 L 40 40 1 1 B X (AIN1)PB3 5 800 300 200 L 40 40 1 1 B X (ICP)PD6 21 800 -1200 200 L 40 40 1 1 B X (INT0)PD2 17 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 18 800 -1500 200 L 40 40 1 1 B X (MISO)PB6 8 800 600 200 L 40 40 1 1 B X (MOSI)PB5 7 800 500 200 L 40 40 1 1 B X (OC1A)PD5 20 800 -1300 200 L 40 40 1 1 B X (OC1B)PD4 19 800 -1400 200 L 40 40 1 1 B X (OC2)PD7 22 800 -1100 200 L 40 40 1 1 B X (RXD)PD0 15 800 -1800 200 L 40 40 1 1 B X (SCK)PB7 9 800 700 200 L 40 40 1 1 B X (SS)PB4 6 800 400 200 L 40 40 1 1 B X (T0)PB0 2 800 0 200 L 40 40 1 1 B X (T1)PB1 3 800 100 200 L 40 40 1 1 B X (TOSC1)PC6 31 800 -300 200 L 40 40 1 1 B X (TOSC2)PC7 32 800 -200 200 L 40 40 1 1 B X (TXD)PD1 16 800 -1700 200 L 40 40 1 1 B X AGND 34 -800 700 200 R 40 40 1 1 W X AREF 35 -800 900 200 R 40 40 1 1 W X AVCC 33 -800 800 200 R 40 40 1 1 W X GND 24 -800 0 200 R 40 40 1 1 W X GND1 1 -800 100 200 R 40 40 1 1 W X GND2 12 -800 -100 200 R 40 40 1 1 W X PC0 25 800 -900 200 L 40 40 1 1 B X PC1 26 800 -800 200 L 40 40 1 1 B X PC2 27 800 -700 200 L 40 40 1 1 B X PC3 28 800 -600 200 L 40 40 1 1 B X PC4 29 800 -500 200 L 40 40 1 1 B X PC5 30 800 -400 200 L 40 40 1 1 B X RESET 10 -800 1600 200 R 40 40 1 1 I I X VCC 23 -800 400 200 R 40 40 1 1 W X VCC1 11 -800 500 200 R 40 40 1 1 W X VCC2 44 -800 300 200 R 40 40 1 1 W X XTAL1 14 -800 1100 200 R 40 40 1 1 B X XTAL2 13 -800 1300 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S4434J-S # Package Name: S44 # Dev Tech: S # Dev Prefix: IC # Gate count = 1 # DEF AT90S4434J-S IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-4 F0 "IC" -600 1730 50 H V L B F1 "AT90S4434J-S" -600 -2000 50 H V L B F2 "avr-1-S44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -1900 P 2 1 0 0 600 -1900 -600 -1900 P 2 1 0 0 -600 -1900 -600 1700 X (ADC0)PA0 43 800 900 200 L 40 40 1 1 B X (ADC1)PA1 42 800 1000 200 L 40 40 1 1 B X (ADC2)PA2 41 800 1100 200 L 40 40 1 1 B X (ADC3)PA3 40 800 1200 200 L 40 40 1 1 B X (ADC4)PA4 39 800 1300 200 L 40 40 1 1 B X (ADC5)PA5 38 800 1400 200 L 40 40 1 1 B X (ADC6)PA6 37 800 1500 200 L 40 40 1 1 B X (ADC7)PA7 36 800 1600 200 L 40 40 1 1 B X (AIN0)PB2 4 800 200 200 L 40 40 1 1 B X (AIN1)PB3 5 800 300 200 L 40 40 1 1 B X (ICP)PD6 21 800 -1200 200 L 40 40 1 1 B X (INT0)PD2 17 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 18 800 -1500 200 L 40 40 1 1 B X (MISO)PB6 8 800 600 200 L 40 40 1 1 B X (MOSI)PB5 7 800 500 200 L 40 40 1 1 B X (OC1A)PD5 20 800 -1300 200 L 40 40 1 1 B X (OC1B)PD4 19 800 -1400 200 L 40 40 1 1 B X (OC2)PD7 22 800 -1100 200 L 40 40 1 1 B X (RXD)PD0 15 800 -1800 200 L 40 40 1 1 B X (SCK)PB7 9 800 700 200 L 40 40 1 1 B X (SS)PB4 6 800 400 200 L 40 40 1 1 B X (T0)PB0 2 800 0 200 L 40 40 1 1 B X (T1)PB1 3 800 100 200 L 40 40 1 1 B X (TOSC1)PC6 31 800 -300 200 L 40 40 1 1 B X (TOSC2)PC7 32 800 -200 200 L 40 40 1 1 B X (TXD)PD1 16 800 -1700 200 L 40 40 1 1 B X AGND 34 -800 700 200 R 40 40 1 1 W X AREF 35 -800 900 200 R 40 40 1 1 W X AVCC 33 -800 800 200 R 40 40 1 1 W X GND 24 -800 0 200 R 40 40 1 1 W X GND1 1 -800 100 200 R 40 40 1 1 W X GND2 12 -800 -100 200 R 40 40 1 1 W X PC0 25 800 -900 200 L 40 40 1 1 B X PC1 26 800 -800 200 L 40 40 1 1 B X PC2 27 800 -700 200 L 40 40 1 1 B X PC3 28 800 -600 200 L 40 40 1 1 B X PC4 29 800 -500 200 L 40 40 1 1 B X PC5 30 800 -400 200 L 40 40 1 1 B X RESET 10 -800 1600 200 R 40 40 1 1 I I X VCC 23 -800 400 200 R 40 40 1 1 W X VCC1 44 -800 500 200 R 40 40 1 1 W X VCC2 11 -800 300 200 R 40 40 1 1 W X XTAL1 14 -800 1100 200 R 40 40 1 1 B X XTAL2 13 -800 1300 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S4434J-SM # Package Name: PLCC-SM44 # Dev Tech: S # Dev Prefix: IC # Gate count = 1 # DEF AT90S4434J-SM IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-4 F0 "IC" -600 1730 50 H V L B F1 "AT90S4434J-SM" -600 -2000 50 H V L B F2 "avr-1-PLCC-SM44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -1900 P 2 1 0 0 600 -1900 -600 -1900 P 2 1 0 0 -600 -1900 -600 1700 X (ADC0)PA0 43 800 900 200 L 40 40 1 1 B X (ADC1)PA1 42 800 1000 200 L 40 40 1 1 B X (ADC2)PA2 41 800 1100 200 L 40 40 1 1 B X (ADC3)PA3 40 800 1200 200 L 40 40 1 1 B X (ADC4)PA4 39 800 1300 200 L 40 40 1 1 B X (ADC5)PA5 38 800 1400 200 L 40 40 1 1 B X (ADC6)PA6 37 800 1500 200 L 40 40 1 1 B X (ADC7)PA7 36 800 1600 200 L 40 40 1 1 B X (AIN0)PB2 4 800 200 200 L 40 40 1 1 B X (AIN1)PB3 5 800 300 200 L 40 40 1 1 B X (ICP)PD6 21 800 -1200 200 L 40 40 1 1 B X (INT0)PD2 17 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 18 800 -1500 200 L 40 40 1 1 B X (MISO)PB6 8 800 600 200 L 40 40 1 1 B X (MOSI)PB5 7 800 500 200 L 40 40 1 1 B X (OC1A)PD5 20 800 -1300 200 L 40 40 1 1 B X (OC1B)PD4 19 800 -1400 200 L 40 40 1 1 B X (OC2)PD7 22 800 -1100 200 L 40 40 1 1 B X (RXD)PD0 15 800 -1800 200 L 40 40 1 1 B X (SCK)PB7 9 800 700 200 L 40 40 1 1 B X (SS)PB4 6 800 400 200 L 40 40 1 1 B X (T0)PB0 2 800 0 200 L 40 40 1 1 B X (T1)PB1 3 800 100 200 L 40 40 1 1 B X (TOSC1)PC6 31 800 -300 200 L 40 40 1 1 B X (TOSC2)PC7 32 800 -200 200 L 40 40 1 1 B X (TXD)PD1 16 800 -1700 200 L 40 40 1 1 B X AGND 34 -800 700 200 R 40 40 1 1 W X AREF 35 -800 900 200 R 40 40 1 1 W X AVCC 33 -800 800 200 R 40 40 1 1 W X GND 24 -800 0 200 R 40 40 1 1 W X GND1 1 -800 100 200 R 40 40 1 1 W X GND2 12 -800 -100 200 R 40 40 1 1 W X PC0 25 800 -900 200 L 40 40 1 1 B X PC1 26 800 -800 200 L 40 40 1 1 B X PC2 27 800 -700 200 L 40 40 1 1 B X PC3 28 800 -600 200 L 40 40 1 1 B X PC4 29 800 -500 200 L 40 40 1 1 B X PC5 30 800 -400 200 L 40 40 1 1 B X RESET 10 -800 1600 200 R 40 40 1 1 I I X VCC 23 -800 400 200 R 40 40 1 1 W X VCC1 11 -800 500 200 R 40 40 1 1 W X VCC2 44 -800 300 200 R 40 40 1 1 W X XTAL1 14 -800 1100 200 R 40 40 1 1 B X XTAL2 13 -800 1300 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S4434P # Package Name: DIL40 # Dev Tech: S # Dev Prefix: IC # Gate count = 1 # DEF AT90S4434P IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-3 F0 "IC" -600 1830 50 H V L B F1 "AT90S4434P" -600 -1900 50 H V L B F2 "avr-1-DIL40" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1800 600 1800 P 2 1 0 0 600 1800 600 -1800 P 2 1 0 0 600 -1800 -600 -1800 P 2 1 0 0 -600 -1800 -600 1800 X (ADC0)PA0 40 800 1000 200 L 40 40 1 1 B X (ADC1)PA1 39 800 1100 200 L 40 40 1 1 B X (ADC2)PA2 38 800 1200 200 L 40 40 1 1 B X (ADC3)PA3 37 800 1300 200 L 40 40 1 1 B X (ADC4)PA4 36 800 1400 200 L 40 40 1 1 B X (ADC5)PA5 35 800 1500 200 L 40 40 1 1 B X (ADC6)PA6 34 800 1600 200 L 40 40 1 1 B X (ADC7)PA7 33 800 1700 200 L 40 40 1 1 B X (AIN0)PB2 3 800 300 200 L 40 40 1 1 B X (AIN1)PB3 4 800 400 200 L 40 40 1 1 B X (ICP)PD6 20 800 -1100 200 L 40 40 1 1 B X (INT0)PD2 16 800 -1500 200 L 40 40 1 1 B X (INT1)PD3 17 800 -1400 200 L 40 40 1 1 B X (MISO)PB6 7 800 700 200 L 40 40 1 1 B X (MOSI)PB5 6 800 600 200 L 40 40 1 1 B X (OC1A)PD5 19 800 -1200 200 L 40 40 1 1 B X (OC1B)PD4 18 800 -1300 200 L 40 40 1 1 B X (OC2)PD7 21 800 -1000 200 L 40 40 1 1 B X (RXD)PD0 14 800 -1700 200 L 40 40 1 1 B X (SCK)PB7 8 800 800 200 L 40 40 1 1 B X (SS)PB4 5 800 500 200 L 40 40 1 1 B X (T0)PB0 1 800 100 200 L 40 40 1 1 B X (T1)PB1 2 800 200 200 L 40 40 1 1 B X (TOSC1)PC6 28 800 -200 200 L 40 40 1 1 B X (TOSC2)PC7 29 800 -100 200 L 40 40 1 1 B X (TXD)PD1 15 800 -1600 200 L 40 40 1 1 B X AGND 31 -800 800 200 R 40 40 1 1 W X AREF 32 -800 1000 200 R 40 40 1 1 W X AVCC 30 -800 900 200 R 40 40 1 1 W X GND 11 -800 500 200 R 40 40 1 1 W X PC0 22 800 -800 200 L 40 40 1 1 B X PC1 23 800 -700 200 L 40 40 1 1 B X PC2 24 800 -600 200 L 40 40 1 1 B X PC3 25 800 -500 200 L 40 40 1 1 B X PC4 26 800 -400 200 L 40 40 1 1 B X PC5 27 800 -300 200 L 40 40 1 1 B X RESET 9 -800 1700 200 R 40 40 1 1 I I X VCC 10 -800 600 200 R 40 40 1 1 W X XTAL1 13 -800 1200 200 R 40 40 1 1 B X XTAL2 12 -800 1400 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S8515A # Package Name: TQFP44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF AT90S8515A IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-2 F0 "IC" -600 1430 50 H V L B F1 "AT90S8515A" -600 -2300 50 H V L B F2 "avr-1-TQFP44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1400 600 1400 P 2 1 0 0 600 1400 600 -2200 P 2 1 0 0 600 -2200 -600 -2200 P 2 1 0 0 -600 -2200 -600 1400 X (A8)PC0 18 800 -1200 200 L 40 40 1 1 B X (A9)PC1 19 800 -1100 200 L 40 40 1 1 B X (A10)PC2 20 800 -1000 200 L 40 40 1 1 B X (A11)PC3 21 800 -900 200 L 40 40 1 1 B X (A12)PC4 22 800 -800 200 L 40 40 1 1 B X (A13)PC5 23 800 -700 200 L 40 40 1 1 B X (A14)PC6 24 800 -600 200 L 40 40 1 1 B X (A15)PC7 25 800 -500 200 L 40 40 1 1 B X (AD0)PA0 37 800 600 200 L 40 40 1 1 B X (AD1)PA1 36 800 700 200 L 40 40 1 1 B X (AD2)PA2 35 800 800 200 L 40 40 1 1 B X (AD3)PA3 34 800 900 200 L 40 40 1 1 B X (AD4)PA4 33 800 1000 200 L 40 40 1 1 B X (AD5)PA5 32 800 1100 200 L 40 40 1 1 B X (AD6)PA6 31 800 1200 200 L 40 40 1 1 B X (AD7)PA7 30 800 1300 200 L 40 40 1 1 B X (AIN0)PB2 42 800 -100 200 L 40 40 1 1 B X (AIN1)PB3 43 800 0 200 L 40 40 1 1 B X (INT0)PD2 8 800 -1900 200 L 40 40 1 1 B X (INT1)PD3 9 800 -1800 200 L 40 40 1 1 B X (MISO)PB6 2 800 300 200 L 40 40 1 1 B X (MOSI)PB5 1 800 200 200 L 40 40 1 1 B X (OC1A)PD5 11 800 -1600 200 L 40 40 1 1 B X (RD)PD7 13 800 -1400 200 L 40 40 1 1 B X (RXD)PD0 5 800 -2100 200 L 40 40 1 1 B X (SCK)PB7 3 800 400 200 L 40 40 1 1 B X (SS)PB4 44 800 100 200 L 40 40 1 1 B X (T0)PB0 40 800 -300 200 L 40 40 1 1 B X (T1)PB1 41 800 -200 200 L 40 40 1 1 B X (TXD)PD1 7 800 -2000 200 L 40 40 1 1 B X (WR)PD6 12 800 -1500 200 L 40 40 1 1 B X ALE 27 -800 500 200 R 40 40 1 1 B X GND 16 -800 100 200 R 40 40 1 1 W X ICP 29 -800 600 200 R 40 40 1 1 B X NC1 6 -600 -1800 0 R 40 40 1 1 U X NC2 17 -600 -1900 0 R 40 40 1 1 U X NC3 28 -600 -2000 0 R 40 40 1 1 U X NC4 39 -600 -2100 0 R 40 40 1 1 U X OC1B 26 -800 400 200 R 40 40 1 1 B X PD4 10 800 -1700 200 L 40 40 1 1 B X RESET 4 -800 1300 200 R 40 40 1 1 I I X VCC 38 -800 200 200 R 40 40 1 1 W X XTAL1 15 -800 800 200 R 40 40 1 1 B X XTAL2 14 -800 1000 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S8515J # Package Name: PLCC44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF AT90S8515J IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-2 F0 "IC" -600 1430 50 H V L B F1 "AT90S8515J" -600 -2300 50 H V L B F2 "avr-1-PLCC44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1400 600 1400 P 2 1 0 0 600 1400 600 -2200 P 2 1 0 0 600 -2200 -600 -2200 P 2 1 0 0 -600 -2200 -600 1400 X (A8)PC0 24 800 -1200 200 L 40 40 1 1 B X (A9)PC1 25 800 -1100 200 L 40 40 1 1 B X (A10)PC2 26 800 -1000 200 L 40 40 1 1 B X (A11)PC3 27 800 -900 200 L 40 40 1 1 B X (A12)PC4 28 800 -800 200 L 40 40 1 1 B X (A13)PC5 29 800 -700 200 L 40 40 1 1 B X (A14)PC6 30 800 -600 200 L 40 40 1 1 B X (A15)PC7 31 800 -500 200 L 40 40 1 1 B X (AD0)PA0 43 800 600 200 L 40 40 1 1 B X (AD1)PA1 42 800 700 200 L 40 40 1 1 B X (AD2)PA2 41 800 800 200 L 40 40 1 1 B X (AD3)PA3 40 800 900 200 L 40 40 1 1 B X (AD4)PA4 39 800 1000 200 L 40 40 1 1 B X (AD5)PA5 38 800 1100 200 L 40 40 1 1 B X (AD6)PA6 37 800 1200 200 L 40 40 1 1 B X (AD7)PA7 36 800 1300 200 L 40 40 1 1 B X (AIN0)PB2 4 800 -100 200 L 40 40 1 1 B X (AIN1)PB3 5 800 0 200 L 40 40 1 1 B X (INT0)PD2 14 800 -1900 200 L 40 40 1 1 B X (INT1)PD3 15 800 -1800 200 L 40 40 1 1 B X (MISO)PB6 8 800 300 200 L 40 40 1 1 B X (MOSI)PB5 7 800 200 200 L 40 40 1 1 B X (OC1A)PD5 17 800 -1600 200 L 40 40 1 1 B X (RD)PD7 19 800 -1400 200 L 40 40 1 1 B X (RXD)PD0 11 800 -2100 200 L 40 40 1 1 B X (SCK)PB7 9 800 400 200 L 40 40 1 1 B X (SS)PB4 6 800 100 200 L 40 40 1 1 B X (T0)PB0 2 800 -300 200 L 40 40 1 1 B X (T1)PB1 3 800 -200 200 L 40 40 1 1 B X (TXD)PD1 13 800 -2000 200 L 40 40 1 1 B X (WR)PD6 18 800 -1500 200 L 40 40 1 1 B X ALE 33 -800 500 200 R 40 40 1 1 B X GND 22 -800 100 200 R 40 40 1 1 W X ICP 35 -800 600 200 R 40 40 1 1 B X NC1 34 -600 -1800 0 R 40 40 1 1 U X NC2 23 -600 -1900 0 R 40 40 1 1 U X NC3 12 -600 -2000 0 R 40 40 1 1 U X NC4 1 -600 -2100 0 R 40 40 1 1 U X OC1B 32 -800 400 200 R 40 40 1 1 B X PD4 16 800 -1700 200 L 40 40 1 1 B X RESET 10 -800 1300 200 R 40 40 1 1 I I X VCC 44 -800 200 200 R 40 40 1 1 W X XTAL1 21 -800 800 200 R 40 40 1 1 B X XTAL2 20 -800 1000 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S8515J-S # Package Name: S44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF AT90S8515J-S IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-2 F0 "IC" -600 1430 50 H V L B F1 "AT90S8515J-S" -600 -2300 50 H V L B F2 "avr-1-S44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1400 600 1400 P 2 1 0 0 600 1400 600 -2200 P 2 1 0 0 600 -2200 -600 -2200 P 2 1 0 0 -600 -2200 -600 1400 X (A8)PC0 24 800 -1200 200 L 40 40 1 1 B X (A9)PC1 25 800 -1100 200 L 40 40 1 1 B X (A10)PC2 26 800 -1000 200 L 40 40 1 1 B X (A11)PC3 27 800 -900 200 L 40 40 1 1 B X (A12)PC4 28 800 -800 200 L 40 40 1 1 B X (A13)PC5 29 800 -700 200 L 40 40 1 1 B X (A14)PC6 30 800 -600 200 L 40 40 1 1 B X (A15)PC7 31 800 -500 200 L 40 40 1 1 B X (AD0)PA0 43 800 600 200 L 40 40 1 1 B X (AD1)PA1 42 800 700 200 L 40 40 1 1 B X (AD2)PA2 41 800 800 200 L 40 40 1 1 B X (AD3)PA3 40 800 900 200 L 40 40 1 1 B X (AD4)PA4 39 800 1000 200 L 40 40 1 1 B X (AD5)PA5 38 800 1100 200 L 40 40 1 1 B X (AD6)PA6 37 800 1200 200 L 40 40 1 1 B X (AD7)PA7 36 800 1300 200 L 40 40 1 1 B X (AIN0)PB2 4 800 -100 200 L 40 40 1 1 B X (AIN1)PB3 5 800 0 200 L 40 40 1 1 B X (INT0)PD2 14 800 -1900 200 L 40 40 1 1 B X (INT1)PD3 15 800 -1800 200 L 40 40 1 1 B X (MISO)PB6 8 800 300 200 L 40 40 1 1 B X (MOSI)PB5 7 800 200 200 L 40 40 1 1 B X (OC1A)PD5 17 800 -1600 200 L 40 40 1 1 B X (RD)PD7 19 800 -1400 200 L 40 40 1 1 B X (RXD)PD0 11 800 -2100 200 L 40 40 1 1 B X (SCK)PB7 9 800 400 200 L 40 40 1 1 B X (SS)PB4 6 800 100 200 L 40 40 1 1 B X (T0)PB0 2 800 -300 200 L 40 40 1 1 B X (T1)PB1 3 800 -200 200 L 40 40 1 1 B X (TXD)PD1 13 800 -2000 200 L 40 40 1 1 B X (WR)PD6 18 800 -1500 200 L 40 40 1 1 B X ALE 33 -800 500 200 R 40 40 1 1 B X GND 22 -800 100 200 R 40 40 1 1 W X ICP 35 -800 600 200 R 40 40 1 1 B X NC1 34 -600 -1800 0 R 40 40 1 1 U X NC2 23 -600 -1900 0 R 40 40 1 1 U X NC3 12 -600 -2000 0 R 40 40 1 1 U X NC4 1 -600 -2100 0 R 40 40 1 1 U X OC1B 32 -800 400 200 R 40 40 1 1 B X PD4 16 800 -1700 200 L 40 40 1 1 B X RESET 10 -800 1300 200 R 40 40 1 1 I I X VCC 44 -800 200 200 R 40 40 1 1 W X XTAL1 21 -800 800 200 R 40 40 1 1 B X XTAL2 20 -800 1000 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S8515J-SM # Package Name: PLCC-SM44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF AT90S8515J-SM IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-2 F0 "IC" -600 1430 50 H V L B F1 "AT90S8515J-SM" -600 -2300 50 H V L B F2 "avr-1-PLCC-SM44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1400 600 1400 P 2 1 0 0 600 1400 600 -2200 P 2 1 0 0 600 -2200 -600 -2200 P 2 1 0 0 -600 -2200 -600 1400 X (A8)PC0 24 800 -1200 200 L 40 40 1 1 B X (A9)PC1 25 800 -1100 200 L 40 40 1 1 B X (A10)PC2 26 800 -1000 200 L 40 40 1 1 B X (A11)PC3 27 800 -900 200 L 40 40 1 1 B X (A12)PC4 28 800 -800 200 L 40 40 1 1 B X (A13)PC5 29 800 -700 200 L 40 40 1 1 B X (A14)PC6 30 800 -600 200 L 40 40 1 1 B X (A15)PC7 31 800 -500 200 L 40 40 1 1 B X (AD0)PA0 43 800 600 200 L 40 40 1 1 B X (AD1)PA1 42 800 700 200 L 40 40 1 1 B X (AD2)PA2 41 800 800 200 L 40 40 1 1 B X (AD3)PA3 40 800 900 200 L 40 40 1 1 B X (AD4)PA4 39 800 1000 200 L 40 40 1 1 B X (AD5)PA5 38 800 1100 200 L 40 40 1 1 B X (AD6)PA6 37 800 1200 200 L 40 40 1 1 B X (AD7)PA7 36 800 1300 200 L 40 40 1 1 B X (AIN0)PB2 4 800 -100 200 L 40 40 1 1 B X (AIN1)PB3 5 800 0 200 L 40 40 1 1 B X (INT0)PD2 14 800 -1900 200 L 40 40 1 1 B X (INT1)PD3 15 800 -1800 200 L 40 40 1 1 B X (MISO)PB6 8 800 300 200 L 40 40 1 1 B X (MOSI)PB5 7 800 200 200 L 40 40 1 1 B X (OC1A)PD5 17 800 -1600 200 L 40 40 1 1 B X (RD)PD7 19 800 -1400 200 L 40 40 1 1 B X (RXD)PD0 11 800 -2100 200 L 40 40 1 1 B X (SCK)PB7 9 800 400 200 L 40 40 1 1 B X (SS)PB4 6 800 100 200 L 40 40 1 1 B X (T0)PB0 2 800 -300 200 L 40 40 1 1 B X (T1)PB1 3 800 -200 200 L 40 40 1 1 B X (TXD)PD1 13 800 -2000 200 L 40 40 1 1 B X (WR)PD6 18 800 -1500 200 L 40 40 1 1 B X ALE 33 -800 500 200 R 40 40 1 1 B X GND 22 -800 100 200 R 40 40 1 1 W X ICP 35 -800 600 200 R 40 40 1 1 B X NC1 34 -600 -1800 0 R 40 40 1 1 U X NC2 23 -600 -1900 0 R 40 40 1 1 U X NC3 12 -600 -2000 0 R 40 40 1 1 U X NC4 1 -600 -2100 0 R 40 40 1 1 U X OC1B 32 -800 400 200 R 40 40 1 1 B X PD4 16 800 -1700 200 L 40 40 1 1 B X RESET 10 -800 1300 200 R 40 40 1 1 I I X VCC 44 -800 200 200 R 40 40 1 1 W X XTAL1 21 -800 800 200 R 40 40 1 1 B X XTAL2 20 -800 1000 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S8515-AA # Package Name: TQFP44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF AT90S8515-AA IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-2 F0 "IC" -600 1430 50 H V L B F1 "AT90S8515-AA" -600 -2300 50 H V L B F2 "avr-1-TQFP44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1400 600 1400 P 2 1 0 0 600 1400 600 -2200 P 2 1 0 0 600 -2200 -600 -2200 P 2 1 0 0 -600 -2200 -600 1400 X (A8)PC0 18 800 -1200 200 L 40 40 1 1 B X (A9)PC1 19 800 -1100 200 L 40 40 1 1 B X (A10)PC2 20 800 -1000 200 L 40 40 1 1 B X (A11)PC3 21 800 -900 200 L 40 40 1 1 B X (A12)PC4 22 800 -800 200 L 40 40 1 1 B X (A13)PC5 23 800 -700 200 L 40 40 1 1 B X (A14)PC6 24 800 -600 200 L 40 40 1 1 B X (A15)PC7 25 800 -500 200 L 40 40 1 1 B X (AD0)PA0 37 800 600 200 L 40 40 1 1 B X (AD1)PA1 36 800 700 200 L 40 40 1 1 B X (AD2)PA2 35 800 800 200 L 40 40 1 1 B X (AD3)PA3 34 800 900 200 L 40 40 1 1 B X (AD4)PA4 33 800 1000 200 L 40 40 1 1 B X (AD5)PA5 32 800 1100 200 L 40 40 1 1 B X (AD6)PA6 31 800 1200 200 L 40 40 1 1 B X (AD7)PA7 30 800 1300 200 L 40 40 1 1 B X (AIN0)PB2 42 800 -100 200 L 40 40 1 1 B X (AIN1)PB3 43 800 0 200 L 40 40 1 1 B X (INT0)PD2 8 800 -1900 200 L 40 40 1 1 B X (INT1)PD3 9 800 -1800 200 L 40 40 1 1 B X (MISO)PB6 2 800 300 200 L 40 40 1 1 B X (MOSI)PB5 1 800 200 200 L 40 40 1 1 B X (OC1A)PD5 11 800 -1600 200 L 40 40 1 1 B X (RD)PD7 13 800 -1400 200 L 40 40 1 1 B X (RXD)PD0 5 800 -2100 200 L 40 40 1 1 B X (SCK)PB7 3 800 400 200 L 40 40 1 1 B X (SS)PB4 44 800 100 200 L 40 40 1 1 B X (T0)PB0 40 800 -300 200 L 40 40 1 1 B X (T1)PB1 41 800 -200 200 L 40 40 1 1 B X (TXD)PD1 7 800 -2000 200 L 40 40 1 1 B X (WR)PD6 12 800 -1500 200 L 40 40 1 1 B X ALE 27 -800 500 200 R 40 40 1 1 B X GND 16 -800 100 200 R 40 40 1 1 W X ICP 29 -800 600 200 R 40 40 1 1 B X NC1 6 -600 -1800 0 R 40 40 1 1 U X NC2 17 -600 -1900 0 R 40 40 1 1 U X NC3 28 -600 -2000 0 R 40 40 1 1 U X NC4 39 -600 -2100 0 R 40 40 1 1 U X OC1B 26 -800 400 200 R 40 40 1 1 B X PD4 10 800 -1700 200 L 40 40 1 1 B X RESET 4 -800 1300 200 R 40 40 1 1 I I X VCC 38 -800 200 200 R 40 40 1 1 W X XTAL1 15 -800 800 200 R 40 40 1 1 B X XTAL2 14 -800 1000 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S8515P # Package Name: DIL40 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF AT90S8515P IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-1 F0 "IC" -600 1430 50 H V L B F1 "AT90S8515P" -600 -2300 50 H V L B F2 "avr-1-DIL40" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1400 600 1400 P 2 1 0 0 600 1400 600 -2200 P 2 1 0 0 600 -2200 -600 -2200 P 2 1 0 0 -600 -2200 -600 1400 X (A8)PC0 21 800 -1200 200 L 40 40 1 1 B X (A9)PC1 22 800 -1100 200 L 40 40 1 1 B X (A10)PC2 23 800 -1000 200 L 40 40 1 1 B X (A11)PC3 24 800 -900 200 L 40 40 1 1 B X (A12)PC4 25 800 -800 200 L 40 40 1 1 B X (A13)PC5 26 800 -700 200 L 40 40 1 1 B X (A14)PC6 27 800 -600 200 L 40 40 1 1 B X (A15)PC7 28 800 -500 200 L 40 40 1 1 B X (AD0)PA0 39 800 600 200 L 40 40 1 1 B X (AD1)PA1 38 800 700 200 L 40 40 1 1 B X (AD2)PA2 37 800 800 200 L 40 40 1 1 B X (AD3)PA3 36 800 900 200 L 40 40 1 1 B X (AD4)PA4 35 800 1000 200 L 40 40 1 1 B X (AD5)PA5 34 800 1100 200 L 40 40 1 1 B X (AD6)PA6 33 800 1200 200 L 40 40 1 1 B X (AD7)PA7 32 800 1300 200 L 40 40 1 1 B X (AIN0)PB2 3 800 -100 200 L 40 40 1 1 B X (AIN1)PB3 4 800 0 200 L 40 40 1 1 B X (INT0)PD2 12 800 -1900 200 L 40 40 1 1 B X (INT1)PD3 13 800 -1800 200 L 40 40 1 1 B X (MISO)PB6 7 800 300 200 L 40 40 1 1 B X (MOSI)PB5 6 800 200 200 L 40 40 1 1 B X (OC1A)PD5 15 800 -1600 200 L 40 40 1 1 B X (RD)PD7 17 800 -1400 200 L 40 40 1 1 B X (RXD)PD0 10 800 -2100 200 L 40 40 1 1 B X (SCK)PB7 8 800 400 200 L 40 40 1 1 B X (SS)PB4 5 800 100 200 L 40 40 1 1 B X (T0)PB0 1 800 -300 200 L 40 40 1 1 B X (T1)PB1 2 800 -200 200 L 40 40 1 1 B X (TXD)PD1 11 800 -2000 200 L 40 40 1 1 B X (WR)PD6 16 800 -1500 200 L 40 40 1 1 B X ALE 30 -800 500 200 R 40 40 1 1 B X GND 20 -800 100 200 R 40 40 1 1 W X ICP 31 -800 600 200 R 40 40 1 1 B X OC1B 29 -800 400 200 R 40 40 1 1 B X PD4 14 800 -1700 200 L 40 40 1 1 B X RESET 9 -800 1300 200 R 40 40 1 1 I I X VCC 40 -800 200 200 R 40 40 1 1 W X XTAL1 19 -800 800 200 R 40 40 1 1 B X XTAL2 18 -800 1000 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S8535J # Package Name: PLCC44 # Dev Tech: S # Dev Prefix: IC # Gate count = 1 # DEF AT90S8535J IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-4 F0 "IC" -600 1730 50 H V L B F1 "AT90S8535J" -600 -2000 50 H V L B F2 "avr-1-PLCC44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -1900 P 2 1 0 0 600 -1900 -600 -1900 P 2 1 0 0 -600 -1900 -600 1700 X (ADC0)PA0 43 800 900 200 L 40 40 1 1 B X (ADC1)PA1 42 800 1000 200 L 40 40 1 1 B X (ADC2)PA2 41 800 1100 200 L 40 40 1 1 B X (ADC3)PA3 40 800 1200 200 L 40 40 1 1 B X (ADC4)PA4 39 800 1300 200 L 40 40 1 1 B X (ADC5)PA5 38 800 1400 200 L 40 40 1 1 B X (ADC6)PA6 37 800 1500 200 L 40 40 1 1 B X (ADC7)PA7 36 800 1600 200 L 40 40 1 1 B X (AIN0)PB2 4 800 200 200 L 40 40 1 1 B X (AIN1)PB3 5 800 300 200 L 40 40 1 1 B X (ICP)PD6 21 800 -1200 200 L 40 40 1 1 B X (INT0)PD2 17 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 18 800 -1500 200 L 40 40 1 1 B X (MISO)PB6 8 800 600 200 L 40 40 1 1 B X (MOSI)PB5 7 800 500 200 L 40 40 1 1 B X (OC1A)PD5 20 800 -1300 200 L 40 40 1 1 B X (OC1B)PD4 19 800 -1400 200 L 40 40 1 1 B X (OC2)PD7 22 800 -1100 200 L 40 40 1 1 B X (RXD)PD0 15 800 -1800 200 L 40 40 1 1 B X (SCK)PB7 9 800 700 200 L 40 40 1 1 B X (SS)PB4 6 800 400 200 L 40 40 1 1 B X (T0)PB0 2 800 0 200 L 40 40 1 1 B X (T1)PB1 3 800 100 200 L 40 40 1 1 B X (TOSC1)PC6 31 800 -300 200 L 40 40 1 1 B X (TOSC2)PC7 32 800 -200 200 L 40 40 1 1 B X (TXD)PD1 16 800 -1700 200 L 40 40 1 1 B X AGND 34 -800 700 200 R 40 40 1 1 W X AREF 35 -800 900 200 R 40 40 1 1 W X AVCC 33 -800 800 200 R 40 40 1 1 W X GND 24 -800 0 200 R 40 40 1 1 W X GND1 1 -800 100 200 R 40 40 1 1 W X GND2 12 -800 -100 200 R 40 40 1 1 W X PC0 25 800 -900 200 L 40 40 1 1 B X PC1 26 800 -800 200 L 40 40 1 1 B X PC2 27 800 -700 200 L 40 40 1 1 B X PC3 28 800 -600 200 L 40 40 1 1 B X PC4 29 800 -500 200 L 40 40 1 1 B X PC5 30 800 -400 200 L 40 40 1 1 B X RESET 10 -800 1600 200 R 40 40 1 1 I I X VCC 23 -800 400 200 R 40 40 1 1 W X VCC1 11 -800 500 200 R 40 40 1 1 W X VCC2 44 -800 300 200 R 40 40 1 1 W X XTAL1 14 -800 1100 200 R 40 40 1 1 B X XTAL2 13 -800 1300 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S8535J-S # Package Name: S44 # Dev Tech: S # Dev Prefix: IC # Gate count = 1 # DEF AT90S8535J-S IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-4 F0 "IC" -600 1730 50 H V L B F1 "AT90S8535J-S" -600 -2000 50 H V L B F2 "avr-1-S44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -1900 P 2 1 0 0 600 -1900 -600 -1900 P 2 1 0 0 -600 -1900 -600 1700 X (ADC0)PA0 43 800 900 200 L 40 40 1 1 B X (ADC1)PA1 42 800 1000 200 L 40 40 1 1 B X (ADC2)PA2 41 800 1100 200 L 40 40 1 1 B X (ADC3)PA3 40 800 1200 200 L 40 40 1 1 B X (ADC4)PA4 39 800 1300 200 L 40 40 1 1 B X (ADC5)PA5 38 800 1400 200 L 40 40 1 1 B X (ADC6)PA6 37 800 1500 200 L 40 40 1 1 B X (ADC7)PA7 36 800 1600 200 L 40 40 1 1 B X (AIN0)PB2 4 800 200 200 L 40 40 1 1 B X (AIN1)PB3 5 800 300 200 L 40 40 1 1 B X (ICP)PD6 21 800 -1200 200 L 40 40 1 1 B X (INT0)PD2 17 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 18 800 -1500 200 L 40 40 1 1 B X (MISO)PB6 8 800 600 200 L 40 40 1 1 B X (MOSI)PB5 7 800 500 200 L 40 40 1 1 B X (OC1A)PD5 20 800 -1300 200 L 40 40 1 1 B X (OC1B)PD4 19 800 -1400 200 L 40 40 1 1 B X (OC2)PD7 22 800 -1100 200 L 40 40 1 1 B X (RXD)PD0 15 800 -1800 200 L 40 40 1 1 B X (SCK)PB7 9 800 700 200 L 40 40 1 1 B X (SS)PB4 6 800 400 200 L 40 40 1 1 B X (T0)PB0 2 800 0 200 L 40 40 1 1 B X (T1)PB1 3 800 100 200 L 40 40 1 1 B X (TOSC1)PC6 31 800 -300 200 L 40 40 1 1 B X (TOSC2)PC7 32 800 -200 200 L 40 40 1 1 B X (TXD)PD1 16 800 -1700 200 L 40 40 1 1 B X AGND 34 -800 700 200 R 40 40 1 1 W X AREF 35 -800 900 200 R 40 40 1 1 W X AVCC 33 -800 800 200 R 40 40 1 1 W X GND 24 -800 0 200 R 40 40 1 1 W X GND1 1 -800 100 200 R 40 40 1 1 W X GND2 12 -800 -100 200 R 40 40 1 1 W X PC0 25 800 -900 200 L 40 40 1 1 B X PC1 26 800 -800 200 L 40 40 1 1 B X PC2 27 800 -700 200 L 40 40 1 1 B X PC3 28 800 -600 200 L 40 40 1 1 B X PC4 29 800 -500 200 L 40 40 1 1 B X PC5 30 800 -400 200 L 40 40 1 1 B X RESET 10 -800 1600 200 R 40 40 1 1 I I X VCC 23 -800 400 200 R 40 40 1 1 W X VCC1 11 -800 500 200 R 40 40 1 1 W X VCC2 44 -800 300 200 R 40 40 1 1 W X XTAL1 14 -800 1100 200 R 40 40 1 1 B X XTAL2 13 -800 1300 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S8535J-SM # Package Name: PLCC-SM44 # Dev Tech: S # Dev Prefix: IC # Gate count = 1 # DEF AT90S8535J-SM IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-4 F0 "IC" -600 1730 50 H V L B F1 "AT90S8535J-SM" -600 -2000 50 H V L B F2 "avr-1-PLCC-SM44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -1900 P 2 1 0 0 600 -1900 -600 -1900 P 2 1 0 0 -600 -1900 -600 1700 X (ADC0)PA0 43 800 900 200 L 40 40 1 1 B X (ADC1)PA1 42 800 1000 200 L 40 40 1 1 B X (ADC2)PA2 41 800 1100 200 L 40 40 1 1 B X (ADC3)PA3 40 800 1200 200 L 40 40 1 1 B X (ADC4)PA4 39 800 1300 200 L 40 40 1 1 B X (ADC5)PA5 38 800 1400 200 L 40 40 1 1 B X (ADC6)PA6 37 800 1500 200 L 40 40 1 1 B X (ADC7)PA7 36 800 1600 200 L 40 40 1 1 B X (AIN0)PB2 4 800 200 200 L 40 40 1 1 B X (AIN1)PB3 5 800 300 200 L 40 40 1 1 B X (ICP)PD6 21 800 -1200 200 L 40 40 1 1 B X (INT0)PD2 17 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 18 800 -1500 200 L 40 40 1 1 B X (MISO)PB6 8 800 600 200 L 40 40 1 1 B X (MOSI)PB5 7 800 500 200 L 40 40 1 1 B X (OC1A)PD5 20 800 -1300 200 L 40 40 1 1 B X (OC1B)PD4 19 800 -1400 200 L 40 40 1 1 B X (OC2)PD7 22 800 -1100 200 L 40 40 1 1 B X (RXD)PD0 15 800 -1800 200 L 40 40 1 1 B X (SCK)PB7 9 800 700 200 L 40 40 1 1 B X (SS)PB4 6 800 400 200 L 40 40 1 1 B X (T0)PB0 2 800 0 200 L 40 40 1 1 B X (T1)PB1 3 800 100 200 L 40 40 1 1 B X (TOSC1)PC6 31 800 -300 200 L 40 40 1 1 B X (TOSC2)PC7 32 800 -200 200 L 40 40 1 1 B X (TXD)PD1 16 800 -1700 200 L 40 40 1 1 B X AGND 34 -800 700 200 R 40 40 1 1 W X AREF 35 -800 900 200 R 40 40 1 1 W X AVCC 33 -800 800 200 R 40 40 1 1 W X GND 24 -800 0 200 R 40 40 1 1 W X GND1 1 -800 100 200 R 40 40 1 1 W X GND2 12 -800 -100 200 R 40 40 1 1 W X PC0 25 800 -900 200 L 40 40 1 1 B X PC1 26 800 -800 200 L 40 40 1 1 B X PC2 27 800 -700 200 L 40 40 1 1 B X PC3 28 800 -600 200 L 40 40 1 1 B X PC4 29 800 -500 200 L 40 40 1 1 B X PC5 30 800 -400 200 L 40 40 1 1 B X RESET 10 -800 1600 200 R 40 40 1 1 I I X VCC 23 -800 400 200 R 40 40 1 1 W X VCC1 11 -800 500 200 R 40 40 1 1 W X VCC2 44 -800 300 200 R 40 40 1 1 W X XTAL1 14 -800 1100 200 R 40 40 1 1 B X XTAL2 13 -800 1300 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: AT90S8535P # Package Name: DIL40 # Dev Tech: S # Dev Prefix: IC # Gate count = 1 # DEF AT90S8535P IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-3 F0 "IC" -600 1830 50 H V L B F1 "AT90S8535P" -600 -1900 50 H V L B F2 "avr-1-DIL40" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1800 600 1800 P 2 1 0 0 600 1800 600 -1800 P 2 1 0 0 600 -1800 -600 -1800 P 2 1 0 0 -600 -1800 -600 1800 X (ADC0)PA0 40 800 1000 200 L 40 40 1 1 B X (ADC1)PA1 39 800 1100 200 L 40 40 1 1 B X (ADC2)PA2 38 800 1200 200 L 40 40 1 1 B X (ADC3)PA3 37 800 1300 200 L 40 40 1 1 B X (ADC4)PA4 36 800 1400 200 L 40 40 1 1 B X (ADC5)PA5 35 800 1500 200 L 40 40 1 1 B X (ADC6)PA6 34 800 1600 200 L 40 40 1 1 B X (ADC7)PA7 33 800 1700 200 L 40 40 1 1 B X (AIN0)PB2 3 800 300 200 L 40 40 1 1 B X (AIN1)PB3 4 800 400 200 L 40 40 1 1 B X (ICP)PD6 20 800 -1100 200 L 40 40 1 1 B X (INT0)PD2 16 800 -1500 200 L 40 40 1 1 B X (INT1)PD3 17 800 -1400 200 L 40 40 1 1 B X (MISO)PB6 7 800 700 200 L 40 40 1 1 B X (MOSI)PB5 6 800 600 200 L 40 40 1 1 B X (OC1A)PD5 19 800 -1200 200 L 40 40 1 1 B X (OC1B)PD4 18 800 -1300 200 L 40 40 1 1 B X (OC2)PD7 21 800 -1000 200 L 40 40 1 1 B X (RXD)PD0 14 800 -1700 200 L 40 40 1 1 B X (SCK)PB7 8 800 800 200 L 40 40 1 1 B X (SS)PB4 5 800 500 200 L 40 40 1 1 B X (T0)PB0 1 800 100 200 L 40 40 1 1 B X (T1)PB1 2 800 200 200 L 40 40 1 1 B X (TOSC1)PC6 28 800 -200 200 L 40 40 1 1 B X (TOSC2)PC7 29 800 -100 200 L 40 40 1 1 B X (TXD)PD1 15 800 -1600 200 L 40 40 1 1 B X AGND 31 -800 800 200 R 40 40 1 1 W X AREF 32 -800 1000 200 R 40 40 1 1 W X AVCC 30 -800 900 200 R 40 40 1 1 W X GND 11 -800 500 200 R 40 40 1 1 W X PC0 22 800 -800 200 L 40 40 1 1 B X PC1 23 800 -700 200 L 40 40 1 1 B X PC2 24 800 -600 200 L 40 40 1 1 B X PC3 25 800 -500 200 L 40 40 1 1 B X PC4 26 800 -400 200 L 40 40 1 1 B X PC5 27 800 -300 200 L 40 40 1 1 B X RESET 9 -800 1700 200 R 40 40 1 1 I I X VCC 10 -800 600 200 R 40 40 1 1 W X XTAL1 13 -800 1200 200 R 40 40 1 1 B X XTAL2 12 -800 1400 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: ATMEGA103 # Package Name: TQFP64 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF ATMEGA103 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 48-I/O-2 F0 "IC" -700 2025 50 H V L B F1 "ATMEGA103" -700 -2200 50 H V L B F2 "avr-1-TQFP64" 0 150 50 H I C C DRAW P 2 1 0 0 -700 2000 600 2000 P 2 1 0 0 600 2000 600 -2100 P 2 1 0 0 600 -2100 -700 -2100 P 2 1 0 0 -700 -2100 -700 2000 T 0 259 1928 56 0 1 0 VCC T 0 259 -2047 56 0 1 0 GND X 01 21 200 2100 100 D 40 40 1 1 W X 02 22 300 -2200 100 U 40 40 1 1 W X A8-PC0 35 700 600 100 L 40 40 1 1 B X A9-PC1 36 700 500 100 L 40 40 1 1 B X A10-PC2 37 700 400 100 L 40 40 1 1 B X A11-PC3 38 700 300 100 L 40 40 1 1 B X A12-PC4 39 700 200 100 L 40 40 1 1 B X A13-PC5 40 700 100 100 L 40 40 1 1 B X A14-PC6 41 700 0 100 L 40 40 1 1 B X A15-PC7 42 700 -100 100 L 40 40 1 1 B X AC+_PE2 4 -800 900 100 R 40 40 1 1 O X AC-_PE3 5 -800 800 100 R 40 40 1 1 O X AD0-PA0 51 700 1500 100 L 40 40 1 1 B X AD1-PA1 50 700 1400 100 L 40 40 1 1 B X AD2-PA2 49 700 1300 100 L 40 40 1 1 B X AD3-PA3 48 700 1200 100 L 40 40 1 1 B X AD4-PA4 47 700 1100 100 L 40 40 1 1 B X AD5-PA5 46 700 1000 100 L 40 40 1 1 B X AD6-PA6 45 700 900 100 L 40 40 1 1 B X AD7-PA7 44 700 800 100 L 40 40 1 1 B X ADC0-PF0 61 -800 -700 100 R 40 40 1 1 I X ADC1-PF1 60 -800 -800 100 R 40 40 1 1 I X ADC2-PF2 59 -800 -900 100 R 40 40 1 1 I X ADC3-PF3 58 -800 -1000 100 R 40 40 1 1 I X ADC4-PF4 57 -800 -1100 100 R 40 40 1 1 I X ADC5-PF5 56 -800 -1200 100 R 40 40 1 1 I X ADC6-PF6 55 -800 -1300 100 R 40 40 1 1 I X ADC7-PF7 54 -800 -1400 100 R 40 40 1 1 I X AGND 63 -800 -2000 100 R 40 40 1 1 B X ALE 43 700 -1400 100 L 40 40 1 1 B X AVCC 64 -800 -1600 100 R 40 40 1 1 B X AVREF 62 -800 -1800 100 R 40 40 1 1 B X GND 53 200 -2200 100 U 40 40 1 1 W X INT4-PE4 6 -800 700 100 R 40 40 1 1 O X INT5-PE5 7 -800 600 100 R 40 40 1 1 O X INT6-PE6 8 -800 500 100 R 40 40 1 1 O X INT7-PE7 9 -800 400 100 R 40 40 1 1 O X MISO-PB3 13 700 -800 100 L 40 40 1 1 B X MOSI-PB2 12 700 -900 100 L 40 40 1 1 B X OC0-PB4 14 700 -700 100 L 40 40 1 1 B X OC1A-PB5 15 700 -600 100 L 40 40 1 1 B X OC1B-PB6 16 700 -500 100 L 40 40 1 1 B X OC2-PB7 17 700 -400 100 L 40 40 1 1 B X PD0-INT0 25 -800 200 100 R 40 40 1 1 B X PD1-INT1 26 -800 100 100 R 40 40 1 1 B X PD2-INT2 27 -800 0 100 R 40 40 1 1 B X PD3-INT3 28 -800 -100 100 R 40 40 1 1 B X PD4-IC1 29 -800 -200 100 R 40 40 1 1 B X PD5 30 -800 -300 100 R 40 40 1 1 B X PD6-T1 31 -800 -400 100 R 40 40 1 1 B X PD7-T2 32 -800 -500 100 R 40 40 1 1 B X PEN/ 1 700 -1700 100 L 40 40 1 1 I X RD/ 34 700 -1500 100 L 40 40 1 1 B X RESET/ 20 -800 1900 100 R 40 40 1 1 I X RXD-PE0 2 -800 1100 100 R 40 40 1 1 O X SCK-PB1 11 700 -1000 100 L 40 40 1 1 B X SS-PB0 10 700 -1100 100 L 40 40 1 1 B X TOSC1 19 -800 1400 100 R 40 40 1 1 B X TOSC2 18 -800 1300 100 R 40 40 1 1 B X TXD-PE1 3 -800 1000 100 R 40 40 1 1 O X VCC 52 300 2100 100 D 40 40 1 1 W X WR/ 33 700 -1600 100 L 40 40 1 1 B X XTAL1 24 -800 1700 100 R 40 40 1 1 B X XTAL2 23 -800 1600 100 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: ATMEGA103L # Package Name: TQFP64 # Dev Tech: L # Dev Prefix: IC # Gate count = 1 # DEF ATMEGA103L IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 48-I/O-2 F0 "IC" -700 2025 50 H V L B F1 "ATMEGA103L" -700 -2200 50 H V L B F2 "avr-1-TQFP64" 0 150 50 H I C C DRAW P 2 1 0 0 -700 2000 600 2000 P 2 1 0 0 600 2000 600 -2100 P 2 1 0 0 600 -2100 -700 -2100 P 2 1 0 0 -700 -2100 -700 2000 T 0 259 1928 56 0 1 0 VCC T 0 259 -2047 56 0 1 0 GND X 01 21 200 2100 100 D 40 40 1 1 W X 02 22 300 -2200 100 U 40 40 1 1 W X A8-PC0 35 700 600 100 L 40 40 1 1 B X A9-PC1 36 700 500 100 L 40 40 1 1 B X A10-PC2 37 700 400 100 L 40 40 1 1 B X A11-PC3 38 700 300 100 L 40 40 1 1 B X A12-PC4 39 700 200 100 L 40 40 1 1 B X A13-PC5 40 700 100 100 L 40 40 1 1 B X A14-PC6 41 700 0 100 L 40 40 1 1 B X A15-PC7 42 700 -100 100 L 40 40 1 1 B X AC+_PE2 4 -800 900 100 R 40 40 1 1 O X AC-_PE3 5 -800 800 100 R 40 40 1 1 O X AD0-PA0 51 700 1500 100 L 40 40 1 1 B X AD1-PA1 50 700 1400 100 L 40 40 1 1 B X AD2-PA2 49 700 1300 100 L 40 40 1 1 B X AD3-PA3 48 700 1200 100 L 40 40 1 1 B X AD4-PA4 47 700 1100 100 L 40 40 1 1 B X AD5-PA5 46 700 1000 100 L 40 40 1 1 B X AD6-PA6 45 700 900 100 L 40 40 1 1 B X AD7-PA7 44 700 800 100 L 40 40 1 1 B X ADC0-PF0 61 -800 -700 100 R 40 40 1 1 I X ADC1-PF1 60 -800 -800 100 R 40 40 1 1 I X ADC2-PF2 59 -800 -900 100 R 40 40 1 1 I X ADC3-PF3 58 -800 -1000 100 R 40 40 1 1 I X ADC4-PF4 57 -800 -1100 100 R 40 40 1 1 I X ADC5-PF5 56 -800 -1200 100 R 40 40 1 1 I X ADC6-PF6 55 -800 -1300 100 R 40 40 1 1 I X ADC7-PF7 54 -800 -1400 100 R 40 40 1 1 I X AGND 63 -800 -2000 100 R 40 40 1 1 B X ALE 43 700 -1400 100 L 40 40 1 1 B X AVCC 64 -800 -1600 100 R 40 40 1 1 B X AVREF 62 -800 -1800 100 R 40 40 1 1 B X GND 53 200 -2200 100 U 40 40 1 1 W X INT4-PE4 6 -800 700 100 R 40 40 1 1 O X INT5-PE5 7 -800 600 100 R 40 40 1 1 O X INT6-PE6 8 -800 500 100 R 40 40 1 1 O X INT7-PE7 9 -800 400 100 R 40 40 1 1 O X MISO-PB3 13 700 -800 100 L 40 40 1 1 B X MOSI-PB2 12 700 -900 100 L 40 40 1 1 B X OC0-PB4 14 700 -700 100 L 40 40 1 1 B X OC1A-PB5 15 700 -600 100 L 40 40 1 1 B X OC1B-PB6 16 700 -500 100 L 40 40 1 1 B X OC2-PB7 17 700 -400 100 L 40 40 1 1 B X PD0-INT0 25 -800 200 100 R 40 40 1 1 B X PD1-INT1 26 -800 100 100 R 40 40 1 1 B X PD2-INT2 27 -800 0 100 R 40 40 1 1 B X PD3-INT3 28 -800 -100 100 R 40 40 1 1 B X PD4-IC1 29 -800 -200 100 R 40 40 1 1 B X PD5 30 -800 -300 100 R 40 40 1 1 B X PD6-T1 31 -800 -400 100 R 40 40 1 1 B X PD7-T2 32 -800 -500 100 R 40 40 1 1 B X PEN/ 1 700 -1700 100 L 40 40 1 1 I X RD/ 34 700 -1500 100 L 40 40 1 1 B X RESET/ 20 -800 1900 100 R 40 40 1 1 I X RXD-PE0 2 -800 1100 100 R 40 40 1 1 O X SCK-PB1 11 700 -1000 100 L 40 40 1 1 B X SS-PB0 10 700 -1100 100 L 40 40 1 1 B X TOSC1 19 -800 1400 100 R 40 40 1 1 B X TOSC2 18 -800 1300 100 R 40 40 1 1 B X TXD-PE1 3 -800 1000 100 R 40 40 1 1 O X VCC 52 300 2100 100 D 40 40 1 1 W X WR/ 33 700 -1600 100 L 40 40 1 1 B X XTAL1 24 -800 1700 100 R 40 40 1 1 B X XTAL2 23 -800 1600 100 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA8-AI # Package Name: TQFP32-08 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA8-AI IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 23-I/O F0 "IC" -700 -1600 50 H V L B F1 "MEGA8-AI" -200 1200 50 H V L B F2 "avr-1-TQFP32-08" 0 150 50 H I C C DRAW P 2 1 0 0 -700 1100 800 1100 P 2 1 0 0 800 1100 800 -1400 P 2 1 0 0 800 -1400 -700 -1400 P 2 1 0 0 -700 -1400 -700 1100 X ADC6 19 1000 400 200 L 40 40 1 1 B X ADC7 22 1000 300 200 L 40 40 1 1 B X AGND 21 -900 800 200 R 40 40 1 1 B X AREF 20 -900 700 200 R 40 40 1 1 B X AVCC 18 -900 600 200 R 40 40 1 1 B X GND@1 3 -900 -200 200 R 40 40 1 1 B X GND@2 5 -900 -300 200 R 40 40 1 1 B X PB0(ICP) 12 1000 -800 200 L 40 40 1 1 B X PB1(OC1A) 13 1000 -900 200 L 40 40 1 1 B X PB2(SS/OC1B) 14 1000 -1000 200 L 40 40 1 1 B X PB3(MOSI/OC2) 15 1000 -1100 200 L 40 40 1 1 B X PB4(MISO) 16 1000 -1200 200 L 40 40 1 1 B X PB5(SCK) 17 1000 -1300 200 L 40 40 1 1 B X PB6(XTAL1/TOSC1) 7 -900 300 200 R 40 40 1 1 B X PB7(XTAL2/TOSC2) 8 -900 100 200 R 40 40 1 1 B X PC0(ADC0) 23 1000 1000 200 L 40 40 1 1 B X PC1(ADC1) 24 1000 900 200 L 40 40 1 1 B X PC2(ADC2) 25 1000 800 200 L 40 40 1 1 B X PC3(ADC3) 26 1000 700 200 L 40 40 1 1 B X PC4(ADC4/SDA) 27 1000 600 200 L 40 40 1 1 B X PC5(ADC5/SCL) 28 1000 500 200 L 40 40 1 1 B X PC6(/RESET) 29 -900 1000 200 R 40 40 1 1 B I X PD0(RXD) 30 1000 100 200 L 40 40 1 1 B X PD1(TXD) 31 1000 0 200 L 40 40 1 1 B X PD2(INT0) 32 1000 -100 200 L 40 40 1 1 B X PD3(INT1) 1 1000 -200 200 L 40 40 1 1 B X PD4(XCK/T0) 2 1000 -300 200 L 40 40 1 1 B X PD5(T1) 9 1000 -400 200 L 40 40 1 1 B X PD6(AIN0) 10 1000 -500 200 L 40 40 1 1 B X PD7(AIN1) 11 1000 -600 200 L 40 40 1 1 B X VCC@1 4 -900 -400 200 R 40 40 1 1 B X VCC@2 6 -900 -500 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA8-MI # Package Name: MLF32 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA8-MI IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 23-I/O F0 "IC" -700 -1600 50 H V L B F1 "MEGA8-MI" -200 1200 50 H V L B F2 "avr-1-MLF32" 0 150 50 H I C C DRAW P 2 1 0 0 -700 1100 800 1100 P 2 1 0 0 800 1100 800 -1400 P 2 1 0 0 800 -1400 -700 -1400 P 2 1 0 0 -700 -1400 -700 1100 X ADC6 19 1000 400 200 L 40 40 1 1 B X ADC7 22 1000 300 200 L 40 40 1 1 B X AGND 21 -900 800 200 R 40 40 1 1 B X AREF 20 -900 700 200 R 40 40 1 1 B X AVCC 18 -900 600 200 R 40 40 1 1 B X GND@1 3 -900 -200 200 R 40 40 1 1 B X GND@2 5 -900 -300 200 R 40 40 1 1 B X PB0(ICP) 12 1000 -800 200 L 40 40 1 1 B X PB1(OC1A) 13 1000 -900 200 L 40 40 1 1 B X PB2(SS/OC1B) 14 1000 -1000 200 L 40 40 1 1 B X PB3(MOSI/OC2) 15 1000 -1100 200 L 40 40 1 1 B X PB4(MISO) 16 1000 -1200 200 L 40 40 1 1 B X PB5(SCK) 17 1000 -1300 200 L 40 40 1 1 B X PB6(XTAL1/TOSC1) 7 -900 300 200 R 40 40 1 1 B X PB7(XTAL2/TOSC2) 8 -900 100 200 R 40 40 1 1 B X PC0(ADC0) 23 1000 1000 200 L 40 40 1 1 B X PC1(ADC1) 24 1000 900 200 L 40 40 1 1 B X PC2(ADC2) 25 1000 800 200 L 40 40 1 1 B X PC3(ADC3) 26 1000 700 200 L 40 40 1 1 B X PC4(ADC4/SDA) 27 1000 600 200 L 40 40 1 1 B X PC5(ADC5/SCL) 28 1000 500 200 L 40 40 1 1 B X PC6(/RESET) 29 -900 1000 200 R 40 40 1 1 B I X PD0(RXD) 30 1000 100 200 L 40 40 1 1 B X PD1(TXD) 31 1000 0 200 L 40 40 1 1 B X PD2(INT0) 32 1000 -100 200 L 40 40 1 1 B X PD3(INT1) 1 1000 -200 200 L 40 40 1 1 B X PD4(XCK/T0) 2 1000 -300 200 L 40 40 1 1 B X PD5(T1) 9 1000 -400 200 L 40 40 1 1 B X PD6(AIN0) 10 1000 -500 200 L 40 40 1 1 B X PD7(AIN1) 11 1000 -600 200 L 40 40 1 1 B X VCC@1 4 -900 -400 200 R 40 40 1 1 B X VCC@2 6 -900 -500 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA8-P # Package Name: DIL28-3 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA8-P IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 23-I/O-2 F0 "IC" -700 -1500 50 H V L B F1 "MEGA8-P" -200 1300 50 H V L B F2 "avr-1-DIL28-3" 0 150 50 H I C C DRAW P 2 1 0 0 -700 1200 800 1200 P 2 1 0 0 800 1200 800 -1300 P 2 1 0 0 800 -1300 -700 -1300 P 2 1 0 0 -700 -1300 -700 1200 X AGND 22 -900 900 200 R 40 40 1 1 B X AREF 21 -900 800 200 R 40 40 1 1 B X AVCC 20 -900 700 200 R 40 40 1 1 B X GND@1 8 -900 -100 200 R 40 40 1 1 B X PB0(ICP) 14 1000 -700 200 L 40 40 1 1 B X PB1(OC1A) 15 1000 -800 200 L 40 40 1 1 B X PB2(SS/OC1B) 16 1000 -900 200 L 40 40 1 1 B X PB3(MOSI/OC2) 17 1000 -1000 200 L 40 40 1 1 B X PB4(MISO) 18 1000 -1100 200 L 40 40 1 1 B X PB5(SCK) 19 1000 -1200 200 L 40 40 1 1 B X PB6(XTAL1/TOSC1) 9 -900 400 200 R 40 40 1 1 B X PB7(XTAL2/TOSC2) 10 -900 200 200 R 40 40 1 1 B X PC0(ADC0) 23 1000 1100 200 L 40 40 1 1 B X PC1(ADC1) 24 1000 1000 200 L 40 40 1 1 B X PC2(ADC2) 25 1000 900 200 L 40 40 1 1 B X PC3(ADC3) 26 1000 800 200 L 40 40 1 1 B X PC4(ADC4/SDA) 27 1000 700 200 L 40 40 1 1 B X PC5(ADC5/SCL) 28 1000 600 200 L 40 40 1 1 B X PC6(/RESET) 1 -900 1100 200 R 40 40 1 1 B I X PD0(RXD) 2 1000 200 200 L 40 40 1 1 B X PD1(TXD) 3 1000 100 200 L 40 40 1 1 B X PD2(INT0) 4 1000 0 200 L 40 40 1 1 B X PD3(INT1) 5 1000 -100 200 L 40 40 1 1 B X PD4(XCK/T0) 6 1000 -200 200 L 40 40 1 1 B X PD5(T1) 11 1000 -300 200 L 40 40 1 1 B X PD6(AIN0) 12 1000 -400 200 L 40 40 1 1 B X PD7(AIN1) 13 1000 -500 200 L 40 40 1 1 B X VCC@1 7 -900 -300 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA16-A # Package Name: TQFP44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA16-A IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-M16-A F0 "IC" -600 1830 50 H V L B F1 "MEGA16-A" -600 -1900 50 H V L B F2 "avr-1-TQFP44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1800 600 1800 P 2 1 0 0 600 1800 600 -1800 P 2 1 0 0 600 -1800 -600 -1800 P 2 1 0 0 -600 -1800 -600 1800 X (ADC0)PA0 37 800 1000 200 L 40 40 1 1 B X (ADC1)PA1 36 800 1100 200 L 40 40 1 1 B X (ADC2)PA2 35 800 1200 200 L 40 40 1 1 B X (ADC3)PA3 34 800 1300 200 L 40 40 1 1 B X (ADC4)PA4 33 800 1400 200 L 40 40 1 1 B X (ADC5)PA5 32 800 1500 200 L 40 40 1 1 B X (ADC6)PA6 31 800 1600 200 L 40 40 1 1 B X (ADC7)PA7 30 800 1700 200 L 40 40 1 1 B X (AIN0/INT2)PB2 42 800 300 200 L 40 40 1 1 B X (AIN1/OC0)PB3 43 800 400 200 L 40 40 1 1 B X (ICP)PD6 15 800 -1100 200 L 40 40 1 1 B X (INT0)PD2 11 800 -1500 200 L 40 40 1 1 B X (INT1)PD3 12 800 -1400 200 L 40 40 1 1 B X (MISO)PB6 2 800 700 200 L 40 40 1 1 B X (MOSI)PB5 1 800 600 200 L 40 40 1 1 B X (OC1A)PD5 14 800 -1200 200 L 40 40 1 1 B X (OC1B)PD4 13 800 -1300 200 L 40 40 1 1 B X (OC2)PD7 16 800 -1000 200 L 40 40 1 1 B X (RXD)PD0 9 800 -1700 200 L 40 40 1 1 B X (SCK)PB7 3 800 800 200 L 40 40 1 1 B X (SS)PB4 44 800 500 200 L 40 40 1 1 B X (T0/XCK)PB0 40 800 100 200 L 40 40 1 1 B X (T1)PB1 41 800 200 200 L 40 40 1 1 B X (TCK)PC2 21 800 -600 200 L 40 40 1 1 B X (TDI)PC5 24 800 -300 200 L 40 40 1 1 B X (TDO)PC4 23 800 -400 200 L 40 40 1 1 B X (TMS)PC3 22 800 -500 200 L 40 40 1 1 B X (TOSC1)PC6 25 800 -200 200 L 40 40 1 1 B X (TOSC2)PC7 26 800 -100 200 L 40 40 1 1 B X (TXD)PD1 10 800 -1600 200 L 40 40 1 1 B X AGND 28 -800 800 200 R 40 40 1 1 W X AREF 29 -800 1000 200 R 40 40 1 1 W X AVCC 27 -800 900 200 R 40 40 1 1 W X GND 6 -800 100 200 R 40 40 1 1 W X GND1 18 -800 200 200 R 40 40 1 1 W X GND2 39 -800 0 200 R 40 40 1 1 W X PC0(SCL) 19 800 -800 200 L 40 40 1 1 B X PC1(SDA) 20 800 -700 200 L 40 40 1 1 B X RESET 4 -800 1700 200 R 40 40 1 1 I I X VCC 5 -800 500 200 R 40 40 1 1 W X VCC1 17 -800 600 200 R 40 40 1 1 W X VCC2 38 -800 400 200 R 40 40 1 1 W X XTAL1 8 -800 1200 200 R 40 40 1 1 B X XTAL2 7 -800 1400 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA16-M # Package Name: MLF44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA16-M IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-M16-A F0 "IC" -600 1830 50 H V L B F1 "MEGA16-M" -600 -1900 50 H V L B F2 "avr-1-MLF44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1800 600 1800 P 2 1 0 0 600 1800 600 -1800 P 2 1 0 0 600 -1800 -600 -1800 P 2 1 0 0 -600 -1800 -600 1800 X (ADC0)PA0 37 800 1000 200 L 40 40 1 1 B X (ADC1)PA1 36 800 1100 200 L 40 40 1 1 B X (ADC2)PA2 35 800 1200 200 L 40 40 1 1 B X (ADC3)PA3 34 800 1300 200 L 40 40 1 1 B X (ADC4)PA4 33 800 1400 200 L 40 40 1 1 B X (ADC5)PA5 32 800 1500 200 L 40 40 1 1 B X (ADC6)PA6 31 800 1600 200 L 40 40 1 1 B X (ADC7)PA7 30 800 1700 200 L 40 40 1 1 B X (AIN0/INT2)PB2 42 800 300 200 L 40 40 1 1 B X (AIN1/OC0)PB3 43 800 400 200 L 40 40 1 1 B X (ICP)PD6 15 800 -1100 200 L 40 40 1 1 B X (INT0)PD2 11 800 -1500 200 L 40 40 1 1 B X (INT1)PD3 12 800 -1400 200 L 40 40 1 1 B X (MISO)PB6 2 800 700 200 L 40 40 1 1 B X (MOSI)PB5 1 800 600 200 L 40 40 1 1 B X (OC1A)PD5 14 800 -1200 200 L 40 40 1 1 B X (OC1B)PD4 13 800 -1300 200 L 40 40 1 1 B X (OC2)PD7 16 800 -1000 200 L 40 40 1 1 B X (RXD)PD0 9 800 -1700 200 L 40 40 1 1 B X (SCK)PB7 3 800 800 200 L 40 40 1 1 B X (SS)PB4 44 800 500 200 L 40 40 1 1 B X (T0/XCK)PB0 40 800 100 200 L 40 40 1 1 B X (T1)PB1 41 800 200 200 L 40 40 1 1 B X (TCK)PC2 21 800 -600 200 L 40 40 1 1 B X (TDI)PC5 24 800 -300 200 L 40 40 1 1 B X (TDO)PC4 23 800 -400 200 L 40 40 1 1 B X (TMS)PC3 22 800 -500 200 L 40 40 1 1 B X (TOSC1)PC6 25 800 -200 200 L 40 40 1 1 B X (TOSC2)PC7 26 800 -100 200 L 40 40 1 1 B X (TXD)PD1 10 800 -1600 200 L 40 40 1 1 B X AGND 28 -800 800 200 R 40 40 1 1 W X AREF 29 -800 1000 200 R 40 40 1 1 W X AVCC 27 -800 900 200 R 40 40 1 1 W X GND 6 -800 100 200 R 40 40 1 1 W X GND1 18 -800 200 200 R 40 40 1 1 W X GND2 39 -800 0 200 R 40 40 1 1 W X PC0(SCL) 19 800 -800 200 L 40 40 1 1 B X PC1(SDA) 20 800 -700 200 L 40 40 1 1 B X RESET 4 -800 1700 200 R 40 40 1 1 I I X VCC 5 -800 500 200 R 40 40 1 1 W X VCC1 17 -800 600 200 R 40 40 1 1 W X VCC2 38 -800 400 200 R 40 40 1 1 W X XTAL1 8 -800 1200 200 R 40 40 1 1 B X XTAL2 7 -800 1400 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA16-P # Package Name: DIL40 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA16-P IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-M16-P F0 "IC" -600 1730 50 H V L B F1 "MEGA16-P" -600 -2000 50 H V L B F2 "avr-1-DIL40" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -1900 P 2 1 0 0 600 -1900 -600 -1900 P 2 1 0 0 -600 -1900 -600 1700 X (ADC0)PA0 40 800 900 200 L 40 40 1 1 B X (ADC1)PA1 39 800 1000 200 L 40 40 1 1 B X (ADC2)PA2 38 800 1100 200 L 40 40 1 1 B X (ADC3)PA3 37 800 1200 200 L 40 40 1 1 B X (ADC4)PA4 36 800 1300 200 L 40 40 1 1 B X (ADC5)PA5 35 800 1400 200 L 40 40 1 1 B X (ADC6)PA6 34 800 1500 200 L 40 40 1 1 B X (ADC7)PA7 33 800 1600 200 L 40 40 1 1 B X (AIN0/INT2)PB2 3 800 200 200 L 40 40 1 1 B X (AIN1/OC0)PB3 4 800 300 200 L 40 40 1 1 B X (ICP)PD6 20 800 -1200 200 L 40 40 1 1 B X (INT0)PD2 16 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 17 800 -1500 200 L 40 40 1 1 B X (MISO)PB6 7 800 600 200 L 40 40 1 1 B X (MOSI)PB5 6 800 500 200 L 40 40 1 1 B X (OC1A)PD5 19 800 -1300 200 L 40 40 1 1 B X (OC1B)PD4 18 800 -1400 200 L 40 40 1 1 B X (OC2)PD7 21 800 -1100 200 L 40 40 1 1 B X (RXD)PD0 14 800 -1800 200 L 40 40 1 1 B X (SCK)PB7 8 800 700 200 L 40 40 1 1 B X (SCL)PC0 22 800 -900 200 L 40 40 1 1 B X (SDA)PC1 23 800 -800 200 L 40 40 1 1 B X (SS)PB4 5 800 400 200 L 40 40 1 1 B X (T0/XCK)PB0 1 800 0 200 L 40 40 1 1 B X (T1)PB1 2 800 100 200 L 40 40 1 1 B X (TCK)PC2 24 800 -700 200 L 40 40 1 1 B X (TDI)PC5 27 800 -400 200 L 40 40 1 1 B X (TDO)PC4 26 800 -500 200 L 40 40 1 1 B X (TMS)PC3 25 800 -600 200 L 40 40 1 1 B X (TOSC1)PC6 28 800 -300 200 L 40 40 1 1 B X (TOSC2)PC7 29 800 -200 200 L 40 40 1 1 B X (TXD)PD1 15 800 -1700 200 L 40 40 1 1 B X AGND 31 -800 700 200 R 40 40 1 1 W X AREF 32 -800 900 200 R 40 40 1 1 W X AVCC 30 -800 800 200 R 40 40 1 1 W X GND 11 -800 400 200 R 40 40 1 1 W X RESET 9 -800 1600 200 R 40 40 1 1 I I X VCC 10 -800 500 200 R 40 40 1 1 W X XTAL1 13 -800 1100 200 R 40 40 1 1 B X XTAL2 12 -800 1300 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA32-A # Package Name: TQFP44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA32-A IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-M32-A F0 "IC" -600 1830 50 H V L B F1 "MEGA32-A" -600 -1900 50 H V L B F2 "avr-1-TQFP44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1800 600 1800 P 2 1 0 0 600 1800 600 -1800 P 2 1 0 0 600 -1800 -600 -1800 P 2 1 0 0 -600 -1800 -600 1800 X (ADC0)PA0 37 800 1000 200 L 40 40 1 1 B X (ADC1)PA1 36 800 1100 200 L 40 40 1 1 B X (ADC2)PA2 35 800 1200 200 L 40 40 1 1 B X (ADC3)PA3 34 800 1300 200 L 40 40 1 1 B X (ADC4)PA4 33 800 1400 200 L 40 40 1 1 B X (ADC5)PA5 32 800 1500 200 L 40 40 1 1 B X (ADC6)PA6 31 800 1600 200 L 40 40 1 1 B X (ADC7)PA7 30 800 1700 200 L 40 40 1 1 B X (AIN0/INT2)PB2 42 800 300 200 L 40 40 1 1 B X (AIN1/OC0)PB3 43 800 400 200 L 40 40 1 1 B X (ICP)PD6 15 800 -1100 200 L 40 40 1 1 B X (INT0)PD2 11 800 -1500 200 L 40 40 1 1 B X (INT1)PD3 12 800 -1400 200 L 40 40 1 1 B X (MISO)PB6 2 800 700 200 L 40 40 1 1 B X (MOSI)PB5 1 800 600 200 L 40 40 1 1 B X (OC1A)PD5 14 800 -1200 200 L 40 40 1 1 B X (OC1B)PD4 13 800 -1300 200 L 40 40 1 1 B X (OC2)PD7 16 800 -1000 200 L 40 40 1 1 B X (RXD)PD0 9 800 -1700 200 L 40 40 1 1 B X (SCK)PB7 3 800 800 200 L 40 40 1 1 B X (SS)PB4 44 800 500 200 L 40 40 1 1 B X (T0/XCK)PB0 40 800 100 200 L 40 40 1 1 B X (T1)PB1 41 800 200 200 L 40 40 1 1 B X (TCK)PC2 21 800 -600 200 L 40 40 1 1 B X (TDI)PC5 24 800 -300 200 L 40 40 1 1 B X (TDO)PC4 23 800 -400 200 L 40 40 1 1 B X (TMS)PC3 22 800 -500 200 L 40 40 1 1 B X (TOSC1)PC6 25 800 -200 200 L 40 40 1 1 B X (TOSC2)PC7 26 800 -100 200 L 40 40 1 1 B X (TXD)PD1 10 800 -1600 200 L 40 40 1 1 B X AGND 28 -800 800 200 R 40 40 1 1 W X AREF 29 -800 1000 200 R 40 40 1 1 W X AVCC 27 -800 900 200 R 40 40 1 1 W X GND 6 -800 100 200 R 40 40 1 1 W X GND1 18 -800 200 200 R 40 40 1 1 W X GND2 39 -800 0 200 R 40 40 1 1 W X PC0(SCL) 19 800 -800 200 L 40 40 1 1 B X PC1(SDA) 20 800 -700 200 L 40 40 1 1 B X RESET 4 -800 1700 200 R 40 40 1 1 I I X VCC 5 -800 500 200 R 40 40 1 1 W X VCC1 17 -800 600 200 R 40 40 1 1 W X VCC2 38 -800 400 200 R 40 40 1 1 W X XTAL1 8 -800 1200 200 R 40 40 1 1 B X XTAL2 7 -800 1400 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA32-M # Package Name: MLF44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA32-M IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-M32-A F0 "IC" -600 1830 50 H V L B F1 "MEGA32-M" -600 -1900 50 H V L B F2 "avr-1-MLF44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1800 600 1800 P 2 1 0 0 600 1800 600 -1800 P 2 1 0 0 600 -1800 -600 -1800 P 2 1 0 0 -600 -1800 -600 1800 X (ADC0)PA0 37 800 1000 200 L 40 40 1 1 B X (ADC1)PA1 36 800 1100 200 L 40 40 1 1 B X (ADC2)PA2 35 800 1200 200 L 40 40 1 1 B X (ADC3)PA3 34 800 1300 200 L 40 40 1 1 B X (ADC4)PA4 33 800 1400 200 L 40 40 1 1 B X (ADC5)PA5 32 800 1500 200 L 40 40 1 1 B X (ADC6)PA6 31 800 1600 200 L 40 40 1 1 B X (ADC7)PA7 30 800 1700 200 L 40 40 1 1 B X (AIN0/INT2)PB2 42 800 300 200 L 40 40 1 1 B X (AIN1/OC0)PB3 43 800 400 200 L 40 40 1 1 B X (ICP)PD6 15 800 -1100 200 L 40 40 1 1 B X (INT0)PD2 11 800 -1500 200 L 40 40 1 1 B X (INT1)PD3 12 800 -1400 200 L 40 40 1 1 B X (MISO)PB6 2 800 700 200 L 40 40 1 1 B X (MOSI)PB5 1 800 600 200 L 40 40 1 1 B X (OC1A)PD5 14 800 -1200 200 L 40 40 1 1 B X (OC1B)PD4 13 800 -1300 200 L 40 40 1 1 B X (OC2)PD7 16 800 -1000 200 L 40 40 1 1 B X (RXD)PD0 9 800 -1700 200 L 40 40 1 1 B X (SCK)PB7 3 800 800 200 L 40 40 1 1 B X (SS)PB4 44 800 500 200 L 40 40 1 1 B X (T0/XCK)PB0 40 800 100 200 L 40 40 1 1 B X (T1)PB1 41 800 200 200 L 40 40 1 1 B X (TCK)PC2 21 800 -600 200 L 40 40 1 1 B X (TDI)PC5 24 800 -300 200 L 40 40 1 1 B X (TDO)PC4 23 800 -400 200 L 40 40 1 1 B X (TMS)PC3 22 800 -500 200 L 40 40 1 1 B X (TOSC1)PC6 25 800 -200 200 L 40 40 1 1 B X (TOSC2)PC7 26 800 -100 200 L 40 40 1 1 B X (TXD)PD1 10 800 -1600 200 L 40 40 1 1 B X AGND 28 -800 800 200 R 40 40 1 1 W X AREF 29 -800 1000 200 R 40 40 1 1 W X AVCC 27 -800 900 200 R 40 40 1 1 W X GND 6 -800 100 200 R 40 40 1 1 W X GND1 18 -800 200 200 R 40 40 1 1 W X GND2 39 -800 0 200 R 40 40 1 1 W X PC0(SCL) 19 800 -800 200 L 40 40 1 1 B X PC1(SDA) 20 800 -700 200 L 40 40 1 1 B X RESET 4 -800 1700 200 R 40 40 1 1 I I X VCC 5 -800 500 200 R 40 40 1 1 W X VCC1 17 -800 600 200 R 40 40 1 1 W X VCC2 38 -800 400 200 R 40 40 1 1 W X XTAL1 8 -800 1200 200 R 40 40 1 1 B X XTAL2 7 -800 1400 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA32-P # Package Name: DIL40 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA32-P IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-M32-P F0 "IC" -600 1830 50 H V L B F1 "MEGA32-P" -600 -1900 50 H V L B F2 "avr-1-DIL40" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1800 600 1800 P 2 1 0 0 600 1800 600 -1800 P 2 1 0 0 600 -1800 -600 -1800 P 2 1 0 0 -600 -1800 -600 1800 X (ADC0)PA0 40 800 1000 200 L 40 40 1 1 B X (ADC1)PA1 39 800 1100 200 L 40 40 1 1 B X (ADC2)PA2 38 800 1200 200 L 40 40 1 1 B X (ADC3)PA3 37 800 1300 200 L 40 40 1 1 B X (ADC4)PA4 36 800 1400 200 L 40 40 1 1 B X (ADC5)PA5 35 800 1500 200 L 40 40 1 1 B X (ADC6)PA6 34 800 1600 200 L 40 40 1 1 B X (ADC7)PA7 33 800 1700 200 L 40 40 1 1 B X (AIN0/INT2)PB2 3 800 300 200 L 40 40 1 1 B X (AIN1/OC0)PB3 4 800 400 200 L 40 40 1 1 B X (ICP)PD6 20 800 -1100 200 L 40 40 1 1 B X (INT0)PD2 16 800 -1500 200 L 40 40 1 1 B X (INT1)PD3 17 800 -1400 200 L 40 40 1 1 B X (MISO)PB6 7 800 700 200 L 40 40 1 1 B X (MOSI)PB5 6 800 600 200 L 40 40 1 1 B X (OC1A)PD5 19 800 -1200 200 L 40 40 1 1 B X (OC1B)PD4 18 800 -1300 200 L 40 40 1 1 B X (OC2)PD7 21 800 -1000 200 L 40 40 1 1 B X (RXD)PD0 14 800 -1700 200 L 40 40 1 1 B X (SCK)PB7 8 800 800 200 L 40 40 1 1 B X (SCL)PC0 22 800 -800 200 L 40 40 1 1 B X (SDA)PC1 23 800 -700 200 L 40 40 1 1 B X (SS)PB4 5 800 500 200 L 40 40 1 1 B X (T0/XCK)PB0 1 800 100 200 L 40 40 1 1 B X (T1)PB1 2 800 200 200 L 40 40 1 1 B X (TCK)PC2 24 800 -600 200 L 40 40 1 1 B X (TDI)PC5 27 800 -300 200 L 40 40 1 1 B X (TDO)PC4 26 800 -400 200 L 40 40 1 1 B X (TMS)PC3 25 800 -500 200 L 40 40 1 1 B X (TOSC1)PC6 28 800 -200 200 L 40 40 1 1 B X (TOSC2)PC7 29 800 -100 200 L 40 40 1 1 B X (TXD)PD1 15 800 -1600 200 L 40 40 1 1 B X AGND 31 -800 800 200 R 40 40 1 1 W X AREF 32 -800 1000 200 R 40 40 1 1 W X AVCC 30 -800 900 200 R 40 40 1 1 W X GND 11 -800 500 200 R 40 40 1 1 W X RESET 9 -800 1700 200 R 40 40 1 1 I I X VCC 10 -800 600 200 R 40 40 1 1 W X XTAL1 13 -800 1200 200 R 40 40 1 1 B X XTAL2 12 -800 1400 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA64-A # Package Name: TQFP64 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA64-A IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: MEGA64 F0 "IC" -800 2150 50 H V L B F1 "MEGA64-A" -800 -2500 50 H V L B F2 "avr-1-TQFP64" 0 150 50 H I C C DRAW P 2 1 0 0 -800 2100 900 2100 P 2 1 0 0 900 2100 900 -2400 P 2 1 0 0 900 -2400 -800 -2400 P 2 1 0 0 -800 -2400 -800 2100 X (A8)PC0 35 1100 -500 200 L 40 40 1 1 O X (A9)PC1 36 1100 -400 200 L 40 40 1 1 O X (A10)PC2 37 1100 -300 200 L 40 40 1 1 O X (A11)PC3 38 1100 -200 200 L 40 40 1 1 O X (A12)PC4 39 1100 -100 200 L 40 40 1 1 O X (A13)PC5 40 1100 0 200 L 40 40 1 1 O X (A14)PC6 41 1100 100 200 L 40 40 1 1 O X (A15)PC7 42 1100 200 200 L 40 40 1 1 O X (AD0)PA0 51 1100 1300 200 L 40 40 1 1 B X (AD1)PA1 50 1100 1400 200 L 40 40 1 1 B X (AD2)PA2 49 1100 1500 200 L 40 40 1 1 B X (AD3)PA3 48 1100 1600 200 L 40 40 1 1 B X (AD4)PA4 47 1100 1700 200 L 40 40 1 1 B X (AD5)PA5 46 1100 1800 200 L 40 40 1 1 B X (AD6)PA6 45 1100 1900 200 L 40 40 1 1 B X (AD7)PA7 44 1100 2000 200 L 40 40 1 1 B X (IC1)PD4 29 1100 -1000 200 L 40 40 1 1 B X (IC3/INT7)PE7 9 1100 -1600 200 L 40 40 1 1 B X (MISO)PB3 13 1100 700 200 L 40 40 1 1 B X (MOSI)PB2 12 1100 600 200 L 40 40 1 1 B X (OC0)PB4 14 1100 800 200 L 40 40 1 1 B X (OC1A)PB5 15 1100 900 200 L 40 40 1 1 B X (OC1B)PB6 16 1100 1000 200 L 40 40 1 1 B X (OC2/OC1C)PB7 17 1100 1100 200 L 40 40 1 1 B X (OC3A/AIN1)PE3 5 1100 -2000 200 L 40 40 1 1 B X (OC3B/INT4)PE4 6 1100 -1900 200 L 40 40 1 1 B X (OC3C/INT5)PE5 7 1100 -1800 200 L 40 40 1 1 B X (RXD/PDI)PE0 2 1100 -2300 200 L 40 40 1 1 B X (RXD1/INT2)PD2 27 1100 -1200 200 L 40 40 1 1 B X (SCK)PB1 11 1100 500 200 L 40 40 1 1 B X (SCL/INT0)PD0 25 1100 -1400 200 L 40 40 1 1 B X (SDA/INT1)PD1 26 1100 -1300 200 L 40 40 1 1 B X (SS)PB0 10 1100 400 200 L 40 40 1 1 B X (T1)PD6 31 1100 -800 200 L 40 40 1 1 B X (T2)PD7 32 1100 -700 200 L 40 40 1 1 B X (T3/INT6)PE6 8 1100 -1700 200 L 40 40 1 1 B X (TXD/PDO)PE1 3 1100 -2200 200 L 40 40 1 1 B X (TXD1/INT3)PD3 28 1100 -1100 200 L 40 40 1 1 B X (XCK0/AIN0)PE2 4 1100 -2100 200 L 40 40 1 1 B X (XCK1)PD5 30 1100 -900 200 L 40 40 1 1 B X AGND 63 -1000 1200 200 R 40 40 1 1 B X AREF 62 -1000 1400 200 R 40 40 1 1 B X AVCC 64 -1000 1300 200 R 40 40 1 1 B X GND 22 -1000 800 200 R 40 40 1 1 W X GND1 53 -1000 700 200 R 40 40 1 1 W X PEN 1 -1000 -200 200 R 40 40 1 1 I I X PF0(ADC0) 61 -1000 -2300 200 R 40 40 1 1 I X PF1(ADC1) 60 -1000 -2200 200 R 40 40 1 1 I X PF2(ADC2) 59 -1000 -2100 200 R 40 40 1 1 I X PF3(ADC3) 58 -1000 -2000 200 R 40 40 1 1 I X PF4(ADC4/TCK) 57 -1000 -1900 200 R 40 40 1 1 I X PF5(ADC5/TMS) 56 -1000 -1800 200 R 40 40 1 1 I X PF6(ADC6/TDO) 55 -1000 -1700 200 R 40 40 1 1 I X PF7(ADC7/TDI) 54 -1000 -1600 200 R 40 40 1 1 I X PG0(WR) 33 -1000 -100 200 R 40 40 1 1 B I X PG1(RD) 34 -1000 0 200 R 40 40 1 1 B I X PG2(ALE) 43 -1000 100 200 R 40 40 1 1 B X PG3(TOSC2) 18 -1000 500 200 R 40 40 1 1 B X PG4(TOSC1) 19 -1000 300 200 R 40 40 1 1 B X RESET 20 -1000 2000 200 R 40 40 1 1 I I X VCC 21 -1000 900 200 R 40 40 1 1 W X VCC1 52 -1000 1000 200 R 40 40 1 1 W X XTAL1 24 -1000 1600 200 R 40 40 1 1 B X XTAL2 23 -1000 1800 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA64-M # Package Name: MLF64 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA64-M IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: MEGA64 F0 "IC" -800 2150 50 H V L B F1 "MEGA64-M" -800 -2500 50 H V L B F2 "avr-1-MLF64" 0 150 50 H I C C DRAW P 2 1 0 0 -800 2100 900 2100 P 2 1 0 0 900 2100 900 -2400 P 2 1 0 0 900 -2400 -800 -2400 P 2 1 0 0 -800 -2400 -800 2100 X (A8)PC0 35 1100 -500 200 L 40 40 1 1 O X (A9)PC1 36 1100 -400 200 L 40 40 1 1 O X (A10)PC2 37 1100 -300 200 L 40 40 1 1 O X (A11)PC3 38 1100 -200 200 L 40 40 1 1 O X (A12)PC4 39 1100 -100 200 L 40 40 1 1 O X (A13)PC5 40 1100 0 200 L 40 40 1 1 O X (A14)PC6 41 1100 100 200 L 40 40 1 1 O X (A15)PC7 42 1100 200 200 L 40 40 1 1 O X (AD0)PA0 51 1100 1300 200 L 40 40 1 1 B X (AD1)PA1 50 1100 1400 200 L 40 40 1 1 B X (AD2)PA2 49 1100 1500 200 L 40 40 1 1 B X (AD3)PA3 48 1100 1600 200 L 40 40 1 1 B X (AD4)PA4 47 1100 1700 200 L 40 40 1 1 B X (AD5)PA5 46 1100 1800 200 L 40 40 1 1 B X (AD6)PA6 45 1100 1900 200 L 40 40 1 1 B X (AD7)PA7 44 1100 2000 200 L 40 40 1 1 B X (IC1)PD4 29 1100 -1000 200 L 40 40 1 1 B X (IC3/INT7)PE7 9 1100 -1600 200 L 40 40 1 1 B X (MISO)PB3 13 1100 700 200 L 40 40 1 1 B X (MOSI)PB2 12 1100 600 200 L 40 40 1 1 B X (OC0)PB4 14 1100 800 200 L 40 40 1 1 B X (OC1A)PB5 15 1100 900 200 L 40 40 1 1 B X (OC1B)PB6 16 1100 1000 200 L 40 40 1 1 B X (OC2/OC1C)PB7 17 1100 1100 200 L 40 40 1 1 B X (OC3A/AIN1)PE3 5 1100 -2000 200 L 40 40 1 1 B X (OC3B/INT4)PE4 6 1100 -1900 200 L 40 40 1 1 B X (OC3C/INT5)PE5 7 1100 -1800 200 L 40 40 1 1 B X (RXD/PDI)PE0 2 1100 -2300 200 L 40 40 1 1 B X (RXD1/INT2)PD2 27 1100 -1200 200 L 40 40 1 1 B X (SCK)PB1 11 1100 500 200 L 40 40 1 1 B X (SCL/INT0)PD0 25 1100 -1400 200 L 40 40 1 1 B X (SDA/INT1)PD1 26 1100 -1300 200 L 40 40 1 1 B X (SS)PB0 10 1100 400 200 L 40 40 1 1 B X (T1)PD6 31 1100 -800 200 L 40 40 1 1 B X (T2)PD7 32 1100 -700 200 L 40 40 1 1 B X (T3/INT6)PE6 8 1100 -1700 200 L 40 40 1 1 B X (TXD/PDO)PE1 3 1100 -2200 200 L 40 40 1 1 B X (TXD1/INT3)PD3 28 1100 -1100 200 L 40 40 1 1 B X (XCK0/AIN0)PE2 4 1100 -2100 200 L 40 40 1 1 B X (XCK1)PD5 30 1100 -900 200 L 40 40 1 1 B X AGND 63 -1000 1200 200 R 40 40 1 1 B X AREF 62 -1000 1400 200 R 40 40 1 1 B X AVCC 64 -1000 1300 200 R 40 40 1 1 B X GND 22 -1000 800 200 R 40 40 1 1 W X GND1 53 -1000 700 200 R 40 40 1 1 W X PEN 1 -1000 -200 200 R 40 40 1 1 I I X PF0(ADC0) 61 -1000 -2300 200 R 40 40 1 1 I X PF1(ADC1) 60 -1000 -2200 200 R 40 40 1 1 I X PF2(ADC2) 59 -1000 -2100 200 R 40 40 1 1 I X PF3(ADC3) 58 -1000 -2000 200 R 40 40 1 1 I X PF4(ADC4/TCK) 57 -1000 -1900 200 R 40 40 1 1 I X PF5(ADC5/TMS) 56 -1000 -1800 200 R 40 40 1 1 I X PF6(ADC6/TDO) 55 -1000 -1700 200 R 40 40 1 1 I X PF7(ADC7/TDI) 54 -1000 -1600 200 R 40 40 1 1 I X PG0(WR) 33 -1000 -100 200 R 40 40 1 1 B I X PG1(RD) 34 -1000 0 200 R 40 40 1 1 B I X PG2(ALE) 43 -1000 100 200 R 40 40 1 1 B X PG3(TOSC2) 18 -1000 500 200 R 40 40 1 1 B X PG4(TOSC1) 19 -1000 300 200 R 40 40 1 1 B X RESET 20 -1000 2000 200 R 40 40 1 1 I I X VCC 21 -1000 900 200 R 40 40 1 1 W X VCC1 52 -1000 1000 200 R 40 40 1 1 W X XTAL1 24 -1000 1600 200 R 40 40 1 1 B X XTAL2 23 -1000 1800 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA103 # Package Name: TQFP64 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA103 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 48-I/O-1 F0 "IC" -600 2150 50 H V L B F1 "MEGA103" -600 -2500 50 H V L B F2 "avr-1-TQFP64" 0 150 50 H I C C DRAW P 2 1 0 0 -600 2100 600 2100 P 2 1 0 0 600 2100 600 -2400 P 2 1 0 0 600 -2400 -600 -2400 P 2 1 0 0 -600 -2400 -600 2100 X (A8)PC0 35 800 -500 200 L 40 40 1 1 O X (A9)PC1 36 800 -400 200 L 40 40 1 1 O X (A10)PC2 37 800 -300 200 L 40 40 1 1 O X (A11)PC3 38 800 -200 200 L 40 40 1 1 O X (A12)PC4 39 800 -100 200 L 40 40 1 1 O X (A13)PC5 40 800 0 200 L 40 40 1 1 O X (A14)PC6 41 800 100 200 L 40 40 1 1 O X (A15)PC7 42 800 200 200 L 40 40 1 1 O X (AC+)PE2 4 800 -2100 200 L 40 40 1 1 B X (AC-)PE3 5 800 -2000 200 L 40 40 1 1 B X (AD0)PA0 51 800 1300 200 L 40 40 1 1 B X (AD1)PA1 50 800 1400 200 L 40 40 1 1 B X (AD2)PA2 49 800 1500 200 L 40 40 1 1 B X (AD3)PA3 48 800 1600 200 L 40 40 1 1 B X (AD4)PA4 47 800 1700 200 L 40 40 1 1 B X (AD5)PA5 46 800 1800 200 L 40 40 1 1 B X (AD6)PA6 45 800 1900 200 L 40 40 1 1 B X (AD7)PA7 44 800 2000 200 L 40 40 1 1 B X (IC1)PD4 29 800 -1000 200 L 40 40 1 1 B X (INT0)PD0 25 800 -1400 200 L 40 40 1 1 B X (INT1)PD1 26 800 -1300 200 L 40 40 1 1 B X (INT2)PD2 27 800 -1200 200 L 40 40 1 1 B X (INT3)PD3 28 800 -1100 200 L 40 40 1 1 B X (INT4)PE4 6 800 -1900 200 L 40 40 1 1 B X (INT5)PE5 7 800 -1800 200 L 40 40 1 1 B X (INT6)PE6 8 800 -1700 200 L 40 40 1 1 B X (INT7)PE7 9 800 -1600 200 L 40 40 1 1 B X (MISO)PB3 13 800 700 200 L 40 40 1 1 B X (MOSI)PB2 12 800 600 200 L 40 40 1 1 B X (OC0)PB4 14 800 800 200 L 40 40 1 1 B X (OC1A)PB5 15 800 900 200 L 40 40 1 1 B X (OC1B)PB6 16 800 1000 200 L 40 40 1 1 B X (OC2)PB7 17 800 1100 200 L 40 40 1 1 B X (RXD)PE0 2 800 -2300 200 L 40 40 1 1 B X (SCK)PB1 11 800 500 200 L 40 40 1 1 B X (SS)PB0 10 800 400 200 L 40 40 1 1 B X (T1)PD6 31 800 -800 200 L 40 40 1 1 B X (T2)PD7 32 800 -700 200 L 40 40 1 1 B X (TXD)PE1 3 800 -2200 200 L 40 40 1 1 B X AGND 63 -800 1200 200 R 40 40 1 1 B X ALE 43 -800 100 200 R 40 40 1 1 B X AREF 62 -800 1400 200 R 40 40 1 1 B X AVCC 64 -800 1300 200 R 40 40 1 1 B X GND 22 -800 800 200 R 40 40 1 1 W X GND1 53 -800 700 200 R 40 40 1 1 W X PD5 30 800 -900 200 L 40 40 1 1 B X PEN 1 -800 -200 200 R 40 40 1 1 I I X PF0(ADC0) 61 -800 -2300 200 R 40 40 1 1 I X PF1(ADC1) 60 -800 -2200 200 R 40 40 1 1 I X PF2(ADC2) 59 -800 -2100 200 R 40 40 1 1 I X PF3(ADC3) 58 -800 -2000 200 R 40 40 1 1 I X PF4(ADC4) 57 -800 -1900 200 R 40 40 1 1 I X PF5(ADC5) 56 -800 -1800 200 R 40 40 1 1 I X PF6(ADC6) 55 -800 -1700 200 R 40 40 1 1 I X PF7(ADC7) 54 -800 -1600 200 R 40 40 1 1 I X RD 34 -800 0 200 R 40 40 1 1 B I X RESET 20 -800 2000 200 R 40 40 1 1 I I X TOSC1 19 -800 300 200 R 40 40 1 1 B X TOSC2 18 -800 500 200 R 40 40 1 1 B X VCC 21 -800 900 200 R 40 40 1 1 W X VCC1 52 -800 1000 200 R 40 40 1 1 W X WR 33 -800 -100 200 R 40 40 1 1 B I X XTAL1 24 -800 1600 200 R 40 40 1 1 B X XTAL2 23 -800 1800 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA103L # Package Name: TQFP64 # Dev Tech: L # Dev Prefix: IC # Gate count = 1 # DEF MEGA103L IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 48-I/O-1 F0 "IC" -600 2150 50 H V L B F1 "MEGA103L" -600 -2500 50 H V L B F2 "avr-1-TQFP64" 0 150 50 H I C C DRAW P 2 1 0 0 -600 2100 600 2100 P 2 1 0 0 600 2100 600 -2400 P 2 1 0 0 600 -2400 -600 -2400 P 2 1 0 0 -600 -2400 -600 2100 X (A8)PC0 35 800 -500 200 L 40 40 1 1 O X (A9)PC1 36 800 -400 200 L 40 40 1 1 O X (A10)PC2 37 800 -300 200 L 40 40 1 1 O X (A11)PC3 38 800 -200 200 L 40 40 1 1 O X (A12)PC4 39 800 -100 200 L 40 40 1 1 O X (A13)PC5 40 800 0 200 L 40 40 1 1 O X (A14)PC6 41 800 100 200 L 40 40 1 1 O X (A15)PC7 42 800 200 200 L 40 40 1 1 O X (AC+)PE2 4 800 -2100 200 L 40 40 1 1 B X (AC-)PE3 5 800 -2000 200 L 40 40 1 1 B X (AD0)PA0 51 800 1300 200 L 40 40 1 1 B X (AD1)PA1 50 800 1400 200 L 40 40 1 1 B X (AD2)PA2 49 800 1500 200 L 40 40 1 1 B X (AD3)PA3 48 800 1600 200 L 40 40 1 1 B X (AD4)PA4 47 800 1700 200 L 40 40 1 1 B X (AD5)PA5 46 800 1800 200 L 40 40 1 1 B X (AD6)PA6 45 800 1900 200 L 40 40 1 1 B X (AD7)PA7 44 800 2000 200 L 40 40 1 1 B X (IC1)PD4 29 800 -1000 200 L 40 40 1 1 B X (INT0)PD0 25 800 -1400 200 L 40 40 1 1 B X (INT1)PD1 26 800 -1300 200 L 40 40 1 1 B X (INT2)PD2 27 800 -1200 200 L 40 40 1 1 B X (INT3)PD3 28 800 -1100 200 L 40 40 1 1 B X (INT4)PE4 6 800 -1900 200 L 40 40 1 1 B X (INT5)PE5 7 800 -1800 200 L 40 40 1 1 B X (INT6)PE6 8 800 -1700 200 L 40 40 1 1 B X (INT7)PE7 9 800 -1600 200 L 40 40 1 1 B X (MISO)PB3 13 800 700 200 L 40 40 1 1 B X (MOSI)PB2 12 800 600 200 L 40 40 1 1 B X (OC0)PB4 14 800 800 200 L 40 40 1 1 B X (OC1A)PB5 15 800 900 200 L 40 40 1 1 B X (OC1B)PB6 16 800 1000 200 L 40 40 1 1 B X (OC2)PB7 17 800 1100 200 L 40 40 1 1 B X (RXD)PE0 2 800 -2300 200 L 40 40 1 1 B X (SCK)PB1 11 800 500 200 L 40 40 1 1 B X (SS)PB0 10 800 400 200 L 40 40 1 1 B X (T1)PD6 31 800 -800 200 L 40 40 1 1 B X (T2)PD7 32 800 -700 200 L 40 40 1 1 B X (TXD)PE1 3 800 -2200 200 L 40 40 1 1 B X AGND 63 -800 1200 200 R 40 40 1 1 B X ALE 43 -800 100 200 R 40 40 1 1 B X AREF 62 -800 1400 200 R 40 40 1 1 B X AVCC 64 -800 1300 200 R 40 40 1 1 B X GND 22 -800 800 200 R 40 40 1 1 W X GND1 53 -800 700 200 R 40 40 1 1 W X PD5 30 800 -900 200 L 40 40 1 1 B X PEN 1 -800 -200 200 R 40 40 1 1 I I X PF0(ADC0) 61 -800 -2300 200 R 40 40 1 1 I X PF1(ADC1) 60 -800 -2200 200 R 40 40 1 1 I X PF2(ADC2) 59 -800 -2100 200 R 40 40 1 1 I X PF3(ADC3) 58 -800 -2000 200 R 40 40 1 1 I X PF4(ADC4) 57 -800 -1900 200 R 40 40 1 1 I X PF5(ADC5) 56 -800 -1800 200 R 40 40 1 1 I X PF6(ADC6) 55 -800 -1700 200 R 40 40 1 1 I X PF7(ADC7) 54 -800 -1600 200 R 40 40 1 1 I X RD 34 -800 0 200 R 40 40 1 1 B I X RESET 20 -800 2000 200 R 40 40 1 1 I I X TOSC1 19 -800 300 200 R 40 40 1 1 B X TOSC2 18 -800 500 200 R 40 40 1 1 B X VCC 21 -800 900 200 R 40 40 1 1 W X VCC1 52 -800 1000 200 R 40 40 1 1 W X WR 33 -800 -100 200 R 40 40 1 1 B I X XTAL1 24 -800 1600 200 R 40 40 1 1 B X XTAL2 23 -800 1800 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA128-A # Package Name: TQFP64 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA128-A IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: MEGA128 F0 "IC" -900 2250 50 H V L B F1 "MEGA128-A" -900 -2400 50 H V L B F2 "avr-1-TQFP64" 0 150 50 H I C C DRAW P 2 1 0 0 -900 2200 800 2200 P 2 1 0 0 800 2200 800 -2300 P 2 1 0 0 800 -2300 -900 -2300 P 2 1 0 0 -900 -2300 -900 2200 X (A8)PC0 35 1000 -400 200 L 40 40 1 1 O X (A9)PC1 36 1000 -300 200 L 40 40 1 1 O X (A10)PC2 37 1000 -200 200 L 40 40 1 1 O X (A11)PC3 38 1000 -100 200 L 40 40 1 1 O X (A12)PC4 39 1000 0 200 L 40 40 1 1 O X (A13)PC5 40 1000 100 200 L 40 40 1 1 O X (A14)PC6 41 1000 200 200 L 40 40 1 1 O X (A15)PC7 42 1000 300 200 L 40 40 1 1 O X (AD0)PA0 51 1000 1400 200 L 40 40 1 1 B X (AD1)PA1 50 1000 1500 200 L 40 40 1 1 B X (AD2)PA2 49 1000 1600 200 L 40 40 1 1 B X (AD3)PA3 48 1000 1700 200 L 40 40 1 1 B X (AD4)PA4 47 1000 1800 200 L 40 40 1 1 B X (AD5)PA5 46 1000 1900 200 L 40 40 1 1 B X (AD6)PA6 45 1000 2000 200 L 40 40 1 1 B X (AD7)PA7 44 1000 2100 200 L 40 40 1 1 B X (IC1)PD4 29 1000 -900 200 L 40 40 1 1 B X (IC3/INT7)PE7 9 1000 -1500 200 L 40 40 1 1 B X (MISO)PB3 13 1000 800 200 L 40 40 1 1 B X (MOSI)PB2 12 1000 700 200 L 40 40 1 1 B X (OC0)PB4 14 1000 900 200 L 40 40 1 1 B X (OC1A)PB5 15 1000 1000 200 L 40 40 1 1 B X (OC1B)PB6 16 1000 1100 200 L 40 40 1 1 B X (OC2/OC1C)PB7 17 1000 1200 200 L 40 40 1 1 B X (OC3A/AIN1)PE3 5 1000 -1900 200 L 40 40 1 1 B X (OC3B/INT4)PE4 6 1000 -1800 200 L 40 40 1 1 B X (OC3C/INT5)PE5 7 1000 -1700 200 L 40 40 1 1 B X (RXD/PDI)PE0 2 1000 -2200 200 L 40 40 1 1 B X (RXD1/INT2)PD2 27 1000 -1100 200 L 40 40 1 1 B X (SCK)PB1 11 1000 600 200 L 40 40 1 1 B X (SCL/INT0)PD0 25 1000 -1300 200 L 40 40 1 1 B X (SDA/INT1)PD1 26 1000 -1200 200 L 40 40 1 1 B X (SS)PB0 10 1000 500 200 L 40 40 1 1 B X (T1)PD6 31 1000 -700 200 L 40 40 1 1 B X (T2)PD7 32 1000 -600 200 L 40 40 1 1 B X (T3/INT6)PE6 8 1000 -1600 200 L 40 40 1 1 B X (TXD/PDO)PE1 3 1000 -2100 200 L 40 40 1 1 B X (TXD1/INT3)PD3 28 1000 -1000 200 L 40 40 1 1 B X (XCK0/AIN0)PE2 4 1000 -2000 200 L 40 40 1 1 B X (XCK1)PD5 30 1000 -800 200 L 40 40 1 1 B X AGND 63 -1100 1300 200 R 40 40 1 1 B X AREF 62 -1100 1500 200 R 40 40 1 1 B X AVCC 64 -1100 1400 200 R 40 40 1 1 B X GND 22 -1100 900 200 R 40 40 1 1 W X GND1 53 -1100 800 200 R 40 40 1 1 W X PEN 1 -1100 -100 200 R 40 40 1 1 I I X PF0(ADC0) 61 -1100 -2200 200 R 40 40 1 1 I X PF1(ADC1) 60 -1100 -2100 200 R 40 40 1 1 I X PF2(ADC2) 59 -1100 -2000 200 R 40 40 1 1 I X PF3(ADC3) 58 -1100 -1900 200 R 40 40 1 1 I X PF4(ADC4/TCK) 57 -1100 -1800 200 R 40 40 1 1 I X PF5(ADC5/TMS) 56 -1100 -1700 200 R 40 40 1 1 I X PF6(ADC6/TDO) 55 -1100 -1600 200 R 40 40 1 1 I X PF7(ADC7/TDI) 54 -1100 -1500 200 R 40 40 1 1 I X PG0(WR) 33 -1100 0 200 R 40 40 1 1 B I X PG1(RD) 34 -1100 100 200 R 40 40 1 1 B I X PG2(ALE) 43 -1100 200 200 R 40 40 1 1 B X PG3(TOSC2) 18 -1100 600 200 R 40 40 1 1 B X PG4(TOSC1) 19 -1100 400 200 R 40 40 1 1 B X RESET 20 -1100 2100 200 R 40 40 1 1 I I X VCC 21 -1100 1000 200 R 40 40 1 1 W X VCC1 52 -1100 1100 200 R 40 40 1 1 W X XTAL1 24 -1100 1700 200 R 40 40 1 1 B X XTAL2 23 -1100 1900 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA128-M # Package Name: MLF64 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA128-M IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: MEGA128 F0 "IC" -900 2250 50 H V L B F1 "MEGA128-M" -900 -2400 50 H V L B F2 "avr-1-MLF64" 0 150 50 H I C C DRAW P 2 1 0 0 -900 2200 800 2200 P 2 1 0 0 800 2200 800 -2300 P 2 1 0 0 800 -2300 -900 -2300 P 2 1 0 0 -900 -2300 -900 2200 X (A8)PC0 35 1000 -400 200 L 40 40 1 1 O X (A9)PC1 36 1000 -300 200 L 40 40 1 1 O X (A10)PC2 37 1000 -200 200 L 40 40 1 1 O X (A11)PC3 38 1000 -100 200 L 40 40 1 1 O X (A12)PC4 39 1000 0 200 L 40 40 1 1 O X (A13)PC5 40 1000 100 200 L 40 40 1 1 O X (A14)PC6 41 1000 200 200 L 40 40 1 1 O X (A15)PC7 42 1000 300 200 L 40 40 1 1 O X (AD0)PA0 51 1000 1400 200 L 40 40 1 1 B X (AD1)PA1 50 1000 1500 200 L 40 40 1 1 B X (AD2)PA2 49 1000 1600 200 L 40 40 1 1 B X (AD3)PA3 48 1000 1700 200 L 40 40 1 1 B X (AD4)PA4 47 1000 1800 200 L 40 40 1 1 B X (AD5)PA5 46 1000 1900 200 L 40 40 1 1 B X (AD6)PA6 45 1000 2000 200 L 40 40 1 1 B X (AD7)PA7 44 1000 2100 200 L 40 40 1 1 B X (IC1)PD4 29 1000 -900 200 L 40 40 1 1 B X (IC3/INT7)PE7 9 1000 -1500 200 L 40 40 1 1 B X (MISO)PB3 13 1000 800 200 L 40 40 1 1 B X (MOSI)PB2 12 1000 700 200 L 40 40 1 1 B X (OC0)PB4 14 1000 900 200 L 40 40 1 1 B X (OC1A)PB5 15 1000 1000 200 L 40 40 1 1 B X (OC1B)PB6 16 1000 1100 200 L 40 40 1 1 B X (OC2/OC1C)PB7 17 1000 1200 200 L 40 40 1 1 B X (OC3A/AIN1)PE3 5 1000 -1900 200 L 40 40 1 1 B X (OC3B/INT4)PE4 6 1000 -1800 200 L 40 40 1 1 B X (OC3C/INT5)PE5 7 1000 -1700 200 L 40 40 1 1 B X (RXD/PDI)PE0 2 1000 -2200 200 L 40 40 1 1 B X (RXD1/INT2)PD2 27 1000 -1100 200 L 40 40 1 1 B X (SCK)PB1 11 1000 600 200 L 40 40 1 1 B X (SCL/INT0)PD0 25 1000 -1300 200 L 40 40 1 1 B X (SDA/INT1)PD1 26 1000 -1200 200 L 40 40 1 1 B X (SS)PB0 10 1000 500 200 L 40 40 1 1 B X (T1)PD6 31 1000 -700 200 L 40 40 1 1 B X (T2)PD7 32 1000 -600 200 L 40 40 1 1 B X (T3/INT6)PE6 8 1000 -1600 200 L 40 40 1 1 B X (TXD/PDO)PE1 3 1000 -2100 200 L 40 40 1 1 B X (TXD1/INT3)PD3 28 1000 -1000 200 L 40 40 1 1 B X (XCK0/AIN0)PE2 4 1000 -2000 200 L 40 40 1 1 B X (XCK1)PD5 30 1000 -800 200 L 40 40 1 1 B X AGND 63 -1100 1300 200 R 40 40 1 1 B X AREF 62 -1100 1500 200 R 40 40 1 1 B X AVCC 64 -1100 1400 200 R 40 40 1 1 B X GND 22 -1100 900 200 R 40 40 1 1 W X GND1 53 -1100 800 200 R 40 40 1 1 W X PEN 1 -1100 -100 200 R 40 40 1 1 I I X PF0(ADC0) 61 -1100 -2200 200 R 40 40 1 1 I X PF1(ADC1) 60 -1100 -2100 200 R 40 40 1 1 I X PF2(ADC2) 59 -1100 -2000 200 R 40 40 1 1 I X PF3(ADC3) 58 -1100 -1900 200 R 40 40 1 1 I X PF4(ADC4/TCK) 57 -1100 -1800 200 R 40 40 1 1 I X PF5(ADC5/TMS) 56 -1100 -1700 200 R 40 40 1 1 I X PF6(ADC6/TDO) 55 -1100 -1600 200 R 40 40 1 1 I X PF7(ADC7/TDI) 54 -1100 -1500 200 R 40 40 1 1 I X PG0(WR) 33 -1100 0 200 R 40 40 1 1 B I X PG1(RD) 34 -1100 100 200 R 40 40 1 1 B I X PG2(ALE) 43 -1100 200 200 R 40 40 1 1 B X PG3(TOSC2) 18 -1100 600 200 R 40 40 1 1 B X PG4(TOSC1) 19 -1100 400 200 R 40 40 1 1 B X RESET 20 -1100 2100 200 R 40 40 1 1 I I X VCC 21 -1100 1000 200 R 40 40 1 1 W X VCC1 52 -1100 1100 200 R 40 40 1 1 W X XTAL1 24 -1100 1700 200 R 40 40 1 1 B X XTAL2 23 -1100 1900 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA161A # Package Name: TQFP44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA161A IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 35-I/O-2 F0 "IC" -600 1730 50 H V L B F1 "MEGA161A" -600 -2400 50 H V L B F2 "avr-1-TQFP44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -2300 P 2 1 0 0 600 -2300 -600 -2300 P 2 1 0 0 -600 -2300 -600 1700 X (A8)PC0 18 800 -900 200 L 40 40 1 1 B X (A9)PC1 19 800 -800 200 L 40 40 1 1 B X (A10)PC2 20 800 -700 200 L 40 40 1 1 B X (A11)PC3 21 800 -600 200 L 40 40 1 1 B X (A12)PC4 22 800 -500 200 L 40 40 1 1 B X (A13)PC5 23 800 -400 200 L 40 40 1 1 B X (A14)PC6 24 800 -300 200 L 40 40 1 1 B X (A15)PC7 25 800 -200 200 L 40 40 1 1 B X (AD0)PA0 37 800 900 200 L 40 40 1 1 B X (AD1)PA1 36 800 1000 200 L 40 40 1 1 B X (AD2)PA2 35 800 1100 200 L 40 40 1 1 B X (AD3)PA3 34 800 1200 200 L 40 40 1 1 B X (AD4)PA4 33 800 1300 200 L 40 40 1 1 B X (AD5)PA5 32 800 1400 200 L 40 40 1 1 B X (AD6)PA6 31 800 1500 200 L 40 40 1 1 B X (AD7)PA7 30 800 1600 200 L 40 40 1 1 B X (ALE)PE1 27 800 -2100 200 L 40 40 1 1 B X (INT0)PD2 8 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 9 800 -1500 200 L 40 40 1 1 B X (INT2)PE0 29 800 -2200 200 L 40 40 1 1 B X (MISO)PB6 2 800 600 200 L 40 40 1 1 B X (MOSI)PB5 1 800 500 200 L 40 40 1 1 B X (OC1B)PE2 26 800 -2000 200 L 40 40 1 1 B X (RD)PD7 13 800 -1100 200 L 40 40 1 1 B X (RXD0)PD0 5 800 -1800 200 L 40 40 1 1 B X (RXD1)PB2 42 800 200 200 L 40 40 1 1 B X (SCK)PB7 3 800 700 200 L 40 40 1 1 B X (SS)PB4 44 800 400 200 L 40 40 1 1 B X (T0)PB0 40 800 0 200 L 40 40 1 1 B X (T1)PB1 41 800 100 200 L 40 40 1 1 B X (TOSC1)PD4 10 800 -1400 200 L 40 40 1 1 B X (TOSC2)PD5 11 800 -1300 200 L 40 40 1 1 B X (TXD0)PD1 7 800 -1700 200 L 40 40 1 1 B X (TXD1)PB3 43 800 300 200 L 40 40 1 1 B X (WR)PD6 12 800 -1200 200 L 40 40 1 1 B X GND 16 -800 800 200 R 40 40 1 1 W X NC1 6 -600 -1900 0 R 40 40 1 1 U X NC2 17 -600 -2000 0 R 40 40 1 1 U X NC3 28 -600 -2100 0 R 40 40 1 1 U X NC4 39 -600 -2200 0 R 40 40 1 1 U X RESET 4 -800 1600 200 R 40 40 1 1 I I X VCC 38 -800 900 200 R 40 40 1 1 W X XTAL1 15 -800 1100 200 R 40 40 1 1 I X XTAL2 14 -800 1300 200 R 40 40 1 1 I ENDDRAW ENDDEF # # Dev Name: MEGA161J # Package Name: PLCC44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA161J IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 35-I/O-2 F0 "IC" -600 1730 50 H V L B F1 "MEGA161J" -600 -2400 50 H V L B F2 "avr-1-PLCC44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -2300 P 2 1 0 0 600 -2300 -600 -2300 P 2 1 0 0 -600 -2300 -600 1700 X (A8)PC0 24 800 -900 200 L 40 40 1 1 B X (A9)PC1 25 800 -800 200 L 40 40 1 1 B X (A10)PC2 26 800 -700 200 L 40 40 1 1 B X (A11)PC3 27 800 -600 200 L 40 40 1 1 B X (A12)PC4 28 800 -500 200 L 40 40 1 1 B X (A13)PC5 29 800 -400 200 L 40 40 1 1 B X (A14)PC6 30 800 -300 200 L 40 40 1 1 B X (A15)PC7 31 800 -200 200 L 40 40 1 1 B X (AD0)PA0 43 800 900 200 L 40 40 1 1 B X (AD1)PA1 42 800 1000 200 L 40 40 1 1 B X (AD2)PA2 41 800 1100 200 L 40 40 1 1 B X (AD3)PA3 40 800 1200 200 L 40 40 1 1 B X (AD4)PA4 39 800 1300 200 L 40 40 1 1 B X (AD5)PA5 38 800 1400 200 L 40 40 1 1 B X (AD6)PA6 37 800 1500 200 L 40 40 1 1 B X (AD7)PA7 36 800 1600 200 L 40 40 1 1 B X (ALE)PE1 33 800 -2100 200 L 40 40 1 1 B X (INT0)PD2 14 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 15 800 -1500 200 L 40 40 1 1 B X (INT2)PE0 35 800 -2200 200 L 40 40 1 1 B X (MISO)PB6 8 800 600 200 L 40 40 1 1 B X (MOSI)PB5 7 800 500 200 L 40 40 1 1 B X (OC1B)PE2 32 800 -2000 200 L 40 40 1 1 B X (RD)PD7 19 800 -1100 200 L 40 40 1 1 B X (RXD0)PD0 11 800 -1800 200 L 40 40 1 1 B X (RXD1)PB2 4 800 200 200 L 40 40 1 1 B X (SCK)PB7 9 800 700 200 L 40 40 1 1 B X (SS)PB4 6 800 400 200 L 40 40 1 1 B X (T0)PB0 2 800 0 200 L 40 40 1 1 B X (T1)PB1 3 800 100 200 L 40 40 1 1 B X (TOSC1)PD4 16 800 -1400 200 L 40 40 1 1 B X (TOSC2)PD5 17 800 -1300 200 L 40 40 1 1 B X (TXD0)PD1 13 800 -1700 200 L 40 40 1 1 B X (TXD1)PB3 5 800 300 200 L 40 40 1 1 B X (WR)PD6 18 800 -1200 200 L 40 40 1 1 B X GND 22 -800 800 200 R 40 40 1 1 W X NC1 1 -600 -1900 0 R 40 40 1 1 U X NC2 12 -600 -2000 0 R 40 40 1 1 U X NC3 23 -600 -2100 0 R 40 40 1 1 U X NC4 34 -600 -2200 0 R 40 40 1 1 U X RESET 10 -800 1600 200 R 40 40 1 1 I I X VCC 44 -800 900 200 R 40 40 1 1 W X XTAL1 21 -800 1100 200 R 40 40 1 1 I X XTAL2 20 -800 1300 200 R 40 40 1 1 I ENDDRAW ENDDEF # # Dev Name: MEGA161J-S # Package Name: S44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA161J-S IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 35-I/O-2 F0 "IC" -600 1730 50 H V L B F1 "MEGA161J-S" -600 -2400 50 H V L B F2 "avr-1-S44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -2300 P 2 1 0 0 600 -2300 -600 -2300 P 2 1 0 0 -600 -2300 -600 1700 X (A8)PC0 24 800 -900 200 L 40 40 1 1 B X (A9)PC1 25 800 -800 200 L 40 40 1 1 B X (A10)PC2 26 800 -700 200 L 40 40 1 1 B X (A11)PC3 27 800 -600 200 L 40 40 1 1 B X (A12)PC4 28 800 -500 200 L 40 40 1 1 B X (A13)PC5 29 800 -400 200 L 40 40 1 1 B X (A14)PC6 30 800 -300 200 L 40 40 1 1 B X (A15)PC7 31 800 -200 200 L 40 40 1 1 B X (AD0)PA0 43 800 900 200 L 40 40 1 1 B X (AD1)PA1 42 800 1000 200 L 40 40 1 1 B X (AD2)PA2 41 800 1100 200 L 40 40 1 1 B X (AD3)PA3 40 800 1200 200 L 40 40 1 1 B X (AD4)PA4 39 800 1300 200 L 40 40 1 1 B X (AD5)PA5 38 800 1400 200 L 40 40 1 1 B X (AD6)PA6 37 800 1500 200 L 40 40 1 1 B X (AD7)PA7 36 800 1600 200 L 40 40 1 1 B X (ALE)PE1 33 800 -2100 200 L 40 40 1 1 B X (INT0)PD2 14 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 15 800 -1500 200 L 40 40 1 1 B X (INT2)PE0 35 800 -2200 200 L 40 40 1 1 B X (MISO)PB6 8 800 600 200 L 40 40 1 1 B X (MOSI)PB5 7 800 500 200 L 40 40 1 1 B X (OC1B)PE2 32 800 -2000 200 L 40 40 1 1 B X (RD)PD7 19 800 -1100 200 L 40 40 1 1 B X (RXD0)PD0 11 800 -1800 200 L 40 40 1 1 B X (RXD1)PB2 4 800 200 200 L 40 40 1 1 B X (SCK)PB7 9 800 700 200 L 40 40 1 1 B X (SS)PB4 6 800 400 200 L 40 40 1 1 B X (T0)PB0 2 800 0 200 L 40 40 1 1 B X (T1)PB1 3 800 100 200 L 40 40 1 1 B X (TOSC1)PD4 16 800 -1400 200 L 40 40 1 1 B X (TOSC2)PD5 17 800 -1300 200 L 40 40 1 1 B X (TXD0)PD1 13 800 -1700 200 L 40 40 1 1 B X (TXD1)PB3 5 800 300 200 L 40 40 1 1 B X (WR)PD6 18 800 -1200 200 L 40 40 1 1 B X GND 22 -800 800 200 R 40 40 1 1 W X NC1 1 -600 -1900 0 R 40 40 1 1 U X NC2 12 -600 -2000 0 R 40 40 1 1 U X NC3 23 -600 -2100 0 R 40 40 1 1 U X NC4 34 -600 -2200 0 R 40 40 1 1 U X RESET 10 -800 1600 200 R 40 40 1 1 I I X VCC 44 -800 900 200 R 40 40 1 1 W X XTAL1 21 -800 1100 200 R 40 40 1 1 I X XTAL2 20 -800 1300 200 R 40 40 1 1 I ENDDRAW ENDDEF # # Dev Name: MEGA161J-SM # Package Name: PLCC-SM44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA161J-SM IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 35-I/O-2 F0 "IC" -600 1730 50 H V L B F1 "MEGA161J-SM" -600 -2400 50 H V L B F2 "avr-1-PLCC-SM44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -2300 P 2 1 0 0 600 -2300 -600 -2300 P 2 1 0 0 -600 -2300 -600 1700 X (A8)PC0 24 800 -900 200 L 40 40 1 1 B X (A9)PC1 25 800 -800 200 L 40 40 1 1 B X (A10)PC2 26 800 -700 200 L 40 40 1 1 B X (A11)PC3 27 800 -600 200 L 40 40 1 1 B X (A12)PC4 28 800 -500 200 L 40 40 1 1 B X (A13)PC5 29 800 -400 200 L 40 40 1 1 B X (A14)PC6 30 800 -300 200 L 40 40 1 1 B X (A15)PC7 31 800 -200 200 L 40 40 1 1 B X (AD0)PA0 43 800 900 200 L 40 40 1 1 B X (AD1)PA1 42 800 1000 200 L 40 40 1 1 B X (AD2)PA2 41 800 1100 200 L 40 40 1 1 B X (AD3)PA3 40 800 1200 200 L 40 40 1 1 B X (AD4)PA4 39 800 1300 200 L 40 40 1 1 B X (AD5)PA5 38 800 1400 200 L 40 40 1 1 B X (AD6)PA6 37 800 1500 200 L 40 40 1 1 B X (AD7)PA7 36 800 1600 200 L 40 40 1 1 B X (ALE)PE1 33 800 -2100 200 L 40 40 1 1 B X (INT0)PD2 14 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 15 800 -1500 200 L 40 40 1 1 B X (INT2)PE0 35 800 -2200 200 L 40 40 1 1 B X (MISO)PB6 8 800 600 200 L 40 40 1 1 B X (MOSI)PB5 7 800 500 200 L 40 40 1 1 B X (OC1B)PE2 32 800 -2000 200 L 40 40 1 1 B X (RD)PD7 19 800 -1100 200 L 40 40 1 1 B X (RXD0)PD0 11 800 -1800 200 L 40 40 1 1 B X (RXD1)PB2 4 800 200 200 L 40 40 1 1 B X (SCK)PB7 9 800 700 200 L 40 40 1 1 B X (SS)PB4 6 800 400 200 L 40 40 1 1 B X (T0)PB0 2 800 0 200 L 40 40 1 1 B X (T1)PB1 3 800 100 200 L 40 40 1 1 B X (TOSC1)PD4 16 800 -1400 200 L 40 40 1 1 B X (TOSC2)PD5 17 800 -1300 200 L 40 40 1 1 B X (TXD0)PD1 13 800 -1700 200 L 40 40 1 1 B X (TXD1)PB3 5 800 300 200 L 40 40 1 1 B X (WR)PD6 18 800 -1200 200 L 40 40 1 1 B X GND 22 -800 800 200 R 40 40 1 1 W X NC1 1 -600 -1900 0 R 40 40 1 1 U X NC2 12 -600 -2000 0 R 40 40 1 1 U X NC3 23 -600 -2100 0 R 40 40 1 1 U X NC4 34 -600 -2200 0 R 40 40 1 1 U X RESET 10 -800 1600 200 R 40 40 1 1 I I X VCC 44 -800 900 200 R 40 40 1 1 W X XTAL1 21 -800 1100 200 R 40 40 1 1 I X XTAL2 20 -800 1300 200 R 40 40 1 1 I ENDDRAW ENDDEF # # Dev Name: MEGA161P # Package Name: DIL40 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA161P IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 35-I/O-1 F0 "IC" -600 1730 50 H V L B F1 "MEGA161P" -600 -2400 50 H V L B F2 "avr-1-DIL40" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -2300 P 2 1 0 0 600 -2300 -600 -2300 P 2 1 0 0 -600 -2300 -600 1700 X (A8)PC0 21 800 -900 200 L 40 40 1 1 B X (A9)PC1 22 800 -800 200 L 40 40 1 1 B X (A10)PC2 23 800 -700 200 L 40 40 1 1 B X (A11)PC3 24 800 -600 200 L 40 40 1 1 B X (A12)PC4 25 800 -500 200 L 40 40 1 1 B X (A13)PC5 26 800 -400 200 L 40 40 1 1 B X (A14)PC6 27 800 -300 200 L 40 40 1 1 B X (A15)PC7 28 800 -200 200 L 40 40 1 1 B X (AD0)PA0 39 800 900 200 L 40 40 1 1 B X (AD1)PA1 38 800 1000 200 L 40 40 1 1 B X (AD2)PA2 37 800 1100 200 L 40 40 1 1 B X (AD3)PA3 36 800 1200 200 L 40 40 1 1 B X (AD4)PA4 35 800 1300 200 L 40 40 1 1 B X (AD5)PA5 34 800 1400 200 L 40 40 1 1 B X (AD6)PA6 33 800 1500 200 L 40 40 1 1 B X (AD7)PA7 32 800 1600 200 L 40 40 1 1 B X (ALE)PE1 30 800 -2100 200 L 40 40 1 1 B X (INT0)PD2 12 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 13 800 -1500 200 L 40 40 1 1 B X (INT2)PE0 31 800 -2200 200 L 40 40 1 1 B X (MISO)PB6 7 800 600 200 L 40 40 1 1 B X (MOSI)PB5 6 800 500 200 L 40 40 1 1 B X (OC1B)PE2 29 800 -2000 200 L 40 40 1 1 B X (RD)PD7 17 800 -1100 200 L 40 40 1 1 B X (RXD0)PD0 10 800 -1800 200 L 40 40 1 1 B X (RXD1)PB2 3 800 200 200 L 40 40 1 1 B X (SCK)PB7 8 800 700 200 L 40 40 1 1 B X (SS)PB4 5 800 400 200 L 40 40 1 1 B X (T0)PB0 1 800 0 200 L 40 40 1 1 B X (T1)PB1 2 800 100 200 L 40 40 1 1 B X (TOSC1)PD4 14 800 -1400 200 L 40 40 1 1 B X (TOSC2)PD5 15 800 -1300 200 L 40 40 1 1 B X (TXD0)PD1 11 800 -1700 200 L 40 40 1 1 B X (TXD1)PB3 4 800 300 200 L 40 40 1 1 B X (WR)PD6 16 800 -1200 200 L 40 40 1 1 B X GND 20 -800 800 200 R 40 40 1 1 W X RESET 9 -800 1600 200 R 40 40 1 1 I I X VCC 40 -800 900 200 R 40 40 1 1 W X XTAL1 19 -800 1100 200 R 40 40 1 1 I X XTAL2 18 -800 1300 200 R 40 40 1 1 I ENDDRAW ENDDEF # # Dev Name: MEGA161LJ # Package Name: PLCC44 # Dev Tech: L # Dev Prefix: IC # Gate count = 1 # DEF MEGA161LJ IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 35-I/O-2 F0 "IC" -600 1730 50 H V L B F1 "MEGA161LJ" -600 -2400 50 H V L B F2 "avr-1-PLCC44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -2300 P 2 1 0 0 600 -2300 -600 -2300 P 2 1 0 0 -600 -2300 -600 1700 X (A8)PC0 24 800 -900 200 L 40 40 1 1 B X (A9)PC1 25 800 -800 200 L 40 40 1 1 B X (A10)PC2 26 800 -700 200 L 40 40 1 1 B X (A11)PC3 27 800 -600 200 L 40 40 1 1 B X (A12)PC4 28 800 -500 200 L 40 40 1 1 B X (A13)PC5 29 800 -400 200 L 40 40 1 1 B X (A14)PC6 30 800 -300 200 L 40 40 1 1 B X (A15)PC7 31 800 -200 200 L 40 40 1 1 B X (AD0)PA0 43 800 900 200 L 40 40 1 1 B X (AD1)PA1 42 800 1000 200 L 40 40 1 1 B X (AD2)PA2 41 800 1100 200 L 40 40 1 1 B X (AD3)PA3 40 800 1200 200 L 40 40 1 1 B X (AD4)PA4 39 800 1300 200 L 40 40 1 1 B X (AD5)PA5 38 800 1400 200 L 40 40 1 1 B X (AD6)PA6 37 800 1500 200 L 40 40 1 1 B X (AD7)PA7 36 800 1600 200 L 40 40 1 1 B X (ALE)PE1 33 800 -2100 200 L 40 40 1 1 B X (INT0)PD2 14 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 15 800 -1500 200 L 40 40 1 1 B X (INT2)PE0 35 800 -2200 200 L 40 40 1 1 B X (MISO)PB6 8 800 600 200 L 40 40 1 1 B X (MOSI)PB5 7 800 500 200 L 40 40 1 1 B X (OC1B)PE2 32 800 -2000 200 L 40 40 1 1 B X (RD)PD7 19 800 -1100 200 L 40 40 1 1 B X (RXD0)PD0 11 800 -1800 200 L 40 40 1 1 B X (RXD1)PB2 4 800 200 200 L 40 40 1 1 B X (SCK)PB7 9 800 700 200 L 40 40 1 1 B X (SS)PB4 6 800 400 200 L 40 40 1 1 B X (T0)PB0 2 800 0 200 L 40 40 1 1 B X (T1)PB1 3 800 100 200 L 40 40 1 1 B X (TOSC1)PD4 16 800 -1400 200 L 40 40 1 1 B X (TOSC2)PD5 17 800 -1300 200 L 40 40 1 1 B X (TXD0)PD1 13 800 -1700 200 L 40 40 1 1 B X (TXD1)PB3 5 800 300 200 L 40 40 1 1 B X (WR)PD6 18 800 -1200 200 L 40 40 1 1 B X GND 22 -800 800 200 R 40 40 1 1 W X NC1 1 -600 -1900 0 R 40 40 1 1 U X NC2 12 -600 -2000 0 R 40 40 1 1 U X NC3 23 -600 -2100 0 R 40 40 1 1 U X NC4 34 -600 -2200 0 R 40 40 1 1 U X RESET 10 -800 1600 200 R 40 40 1 1 I I X VCC 44 -800 900 200 R 40 40 1 1 W X XTAL1 21 -800 1100 200 R 40 40 1 1 I X XTAL2 20 -800 1300 200 R 40 40 1 1 I ENDDRAW ENDDEF # # Dev Name: MEGA161LP # Package Name: DIL40 # Dev Tech: L # Dev Prefix: IC # Gate count = 1 # DEF MEGA161LP IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 35-I/O-1 F0 "IC" -600 1730 50 H V L B F1 "MEGA161LP" -600 -2400 50 H V L B F2 "avr-1-DIL40" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -2300 P 2 1 0 0 600 -2300 -600 -2300 P 2 1 0 0 -600 -2300 -600 1700 X (A8)PC0 21 800 -900 200 L 40 40 1 1 B X (A9)PC1 22 800 -800 200 L 40 40 1 1 B X (A10)PC2 23 800 -700 200 L 40 40 1 1 B X (A11)PC3 24 800 -600 200 L 40 40 1 1 B X (A12)PC4 25 800 -500 200 L 40 40 1 1 B X (A13)PC5 26 800 -400 200 L 40 40 1 1 B X (A14)PC6 27 800 -300 200 L 40 40 1 1 B X (A15)PC7 28 800 -200 200 L 40 40 1 1 B X (AD0)PA0 39 800 900 200 L 40 40 1 1 B X (AD1)PA1 38 800 1000 200 L 40 40 1 1 B X (AD2)PA2 37 800 1100 200 L 40 40 1 1 B X (AD3)PA3 36 800 1200 200 L 40 40 1 1 B X (AD4)PA4 35 800 1300 200 L 40 40 1 1 B X (AD5)PA5 34 800 1400 200 L 40 40 1 1 B X (AD6)PA6 33 800 1500 200 L 40 40 1 1 B X (AD7)PA7 32 800 1600 200 L 40 40 1 1 B X (ALE)PE1 30 800 -2100 200 L 40 40 1 1 B X (INT0)PD2 12 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 13 800 -1500 200 L 40 40 1 1 B X (INT2)PE0 31 800 -2200 200 L 40 40 1 1 B X (MISO)PB6 7 800 600 200 L 40 40 1 1 B X (MOSI)PB5 6 800 500 200 L 40 40 1 1 B X (OC1B)PE2 29 800 -2000 200 L 40 40 1 1 B X (RD)PD7 17 800 -1100 200 L 40 40 1 1 B X (RXD0)PD0 10 800 -1800 200 L 40 40 1 1 B X (RXD1)PB2 3 800 200 200 L 40 40 1 1 B X (SCK)PB7 8 800 700 200 L 40 40 1 1 B X (SS)PB4 5 800 400 200 L 40 40 1 1 B X (T0)PB0 1 800 0 200 L 40 40 1 1 B X (T1)PB1 2 800 100 200 L 40 40 1 1 B X (TOSC1)PD4 14 800 -1400 200 L 40 40 1 1 B X (TOSC2)PD5 15 800 -1300 200 L 40 40 1 1 B X (TXD0)PD1 11 800 -1700 200 L 40 40 1 1 B X (TXD1)PB3 4 800 300 200 L 40 40 1 1 B X (WR)PD6 16 800 -1200 200 L 40 40 1 1 B X GND 20 -800 800 200 R 40 40 1 1 W X RESET 9 -800 1600 200 R 40 40 1 1 I I X VCC 40 -800 900 200 R 40 40 1 1 W X XTAL1 19 -800 1100 200 R 40 40 1 1 I X XTAL2 18 -800 1300 200 R 40 40 1 1 I ENDDRAW ENDDEF # # Dev Name: MEGA163A # Package Name: TQFP44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA163A IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-6 F0 "IC" -600 1730 50 H V L B F1 "MEGA163A" -600 -2000 50 H V L B F2 "avr-1-TQFP44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -1900 P 2 1 0 0 600 -1900 -600 -1900 P 2 1 0 0 -600 -1900 -600 1700 X (ADC0)PA0 37 800 900 200 L 40 40 1 1 B X (ADC1)PA1 36 800 1000 200 L 40 40 1 1 B X (ADC2)PA2 35 800 1100 200 L 40 40 1 1 B X (ADC3)PA3 34 800 1200 200 L 40 40 1 1 B X (ADC4)PA4 33 800 1300 200 L 40 40 1 1 B X (ADC5)PA5 32 800 1400 200 L 40 40 1 1 B X (ADC6)PA6 31 800 1500 200 L 40 40 1 1 B X (ADC7)PA7 30 800 1600 200 L 40 40 1 1 B X (AIN0)PB2 42 800 200 200 L 40 40 1 1 B X (AIN1)PB3 43 800 300 200 L 40 40 1 1 B X (ICP)PD6 15 800 -1200 200 L 40 40 1 1 B X (INT0)PD2 11 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 12 800 -1500 200 L 40 40 1 1 B X (MISO)PB6 2 800 600 200 L 40 40 1 1 B X (MOSI)PB5 1 800 500 200 L 40 40 1 1 B X (OC1A)PD5 14 800 -1300 200 L 40 40 1 1 B X (OC1B)PD4 13 800 -1400 200 L 40 40 1 1 B X (OC2)PD7 16 800 -1100 200 L 40 40 1 1 B X (RXD)PD0 9 800 -1800 200 L 40 40 1 1 B X (SCK)PB7 3 800 700 200 L 40 40 1 1 B X (SCL)PC0 19 800 -900 200 L 40 40 1 1 B X (SDA)PC1 20 800 -800 200 L 40 40 1 1 B X (SS)PB4 44 800 400 200 L 40 40 1 1 B X (T0)PB0 40 800 0 200 L 40 40 1 1 B X (T1)PB1 41 800 100 200 L 40 40 1 1 B X (TOSC1)PC6 25 800 -300 200 L 40 40 1 1 B X (TOSC2)PC7 26 800 -200 200 L 40 40 1 1 B X (TXD)PD1 10 800 -1700 200 L 40 40 1 1 B X AGND 28 -800 700 200 R 40 40 1 1 W X AREF 29 -800 900 200 R 40 40 1 1 W X AVCC 27 -800 800 200 R 40 40 1 1 W X GND 6 -800 0 200 R 40 40 1 1 W X GND1 18 -800 100 200 R 40 40 1 1 W X GND2 39 -800 -100 200 R 40 40 1 1 W X PC2 21 800 -700 200 L 40 40 1 1 B X PC3 22 800 -600 200 L 40 40 1 1 B X PC4 23 800 -500 200 L 40 40 1 1 B X PC5 24 800 -400 200 L 40 40 1 1 B X RESET 4 -800 1600 200 R 40 40 1 1 I I X VCC 5 -800 400 200 R 40 40 1 1 W X VCC1 17 -800 500 200 R 40 40 1 1 W X VCC2 38 -800 300 200 R 40 40 1 1 W X XTAL1 8 -800 1100 200 R 40 40 1 1 B X XTAL2 7 -800 1300 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA163P # Package Name: DIL40 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA163P IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-5 F0 "IC" -600 1830 50 H V L B F1 "MEGA163P" -600 -1900 50 H V L B F2 "avr-1-DIL40" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1800 600 1800 P 2 1 0 0 600 1800 600 -1800 P 2 1 0 0 600 -1800 -600 -1800 P 2 1 0 0 -600 -1800 -600 1800 X (ADC0)PA0 40 800 1000 200 L 40 40 1 1 B X (ADC1)PA1 39 800 1100 200 L 40 40 1 1 B X (ADC2)PA2 38 800 1200 200 L 40 40 1 1 B X (ADC3)PA3 37 800 1300 200 L 40 40 1 1 B X (ADC4)PA4 36 800 1400 200 L 40 40 1 1 B X (ADC5)PA5 35 800 1500 200 L 40 40 1 1 B X (ADC6)PA6 34 800 1600 200 L 40 40 1 1 B X (ADC7)PA7 33 800 1700 200 L 40 40 1 1 B X (AIN0)PB2 3 800 300 200 L 40 40 1 1 B X (AIN1)PB3 4 800 400 200 L 40 40 1 1 B X (ICP)PD6 20 800 -1100 200 L 40 40 1 1 B X (INT0)PD2 16 800 -1500 200 L 40 40 1 1 B X (INT1)PD3 17 800 -1400 200 L 40 40 1 1 B X (MISO)PB6 7 800 700 200 L 40 40 1 1 B X (MOSI)PB5 6 800 600 200 L 40 40 1 1 B X (OC1A)PD5 19 800 -1200 200 L 40 40 1 1 B X (OC1B)PD4 18 800 -1300 200 L 40 40 1 1 B X (OC2)PD7 21 800 -1000 200 L 40 40 1 1 B X (RXD)PD0 14 800 -1700 200 L 40 40 1 1 B X (SCK)PB7 8 800 800 200 L 40 40 1 1 B X (SCL)PC0 22 800 -800 200 L 40 40 1 1 B X (SDA)PC1 23 800 -700 200 L 40 40 1 1 B X (SS)PB4 5 800 500 200 L 40 40 1 1 B X (T0)PB0 1 800 100 200 L 40 40 1 1 B X (T1)PB1 2 800 200 200 L 40 40 1 1 B X (TOSC1)PC6 28 800 -200 200 L 40 40 1 1 B X (TOSC2)PC7 29 800 -100 200 L 40 40 1 1 B X (TXD)PD1 15 800 -1600 200 L 40 40 1 1 B X AGND 31 -800 800 200 R 40 40 1 1 W X AREF 32 -800 1000 200 R 40 40 1 1 W X AVCC 30 -800 900 200 R 40 40 1 1 W X GND 11 -800 500 200 R 40 40 1 1 W X PC2 24 800 -600 200 L 40 40 1 1 B X PC3 25 800 -500 200 L 40 40 1 1 B X PC4 26 800 -400 200 L 40 40 1 1 B X PC5 27 800 -300 200 L 40 40 1 1 B X RESET 9 -800 1700 200 R 40 40 1 1 I I X VCC 10 -800 600 200 R 40 40 1 1 W X XTAL1 13 -800 1200 200 R 40 40 1 1 B X XTAL2 12 -800 1400 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA163LP # Package Name: DIL40 # Dev Tech: L # Dev Prefix: IC # Gate count = 1 # DEF MEGA163LP IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-5 F0 "IC" -600 1830 50 H V L B F1 "MEGA163LP" -600 -1900 50 H V L B F2 "avr-1-DIL40" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1800 600 1800 P 2 1 0 0 600 1800 600 -1800 P 2 1 0 0 600 -1800 -600 -1800 P 2 1 0 0 -600 -1800 -600 1800 X (ADC0)PA0 40 800 1000 200 L 40 40 1 1 B X (ADC1)PA1 39 800 1100 200 L 40 40 1 1 B X (ADC2)PA2 38 800 1200 200 L 40 40 1 1 B X (ADC3)PA3 37 800 1300 200 L 40 40 1 1 B X (ADC4)PA4 36 800 1400 200 L 40 40 1 1 B X (ADC5)PA5 35 800 1500 200 L 40 40 1 1 B X (ADC6)PA6 34 800 1600 200 L 40 40 1 1 B X (ADC7)PA7 33 800 1700 200 L 40 40 1 1 B X (AIN0)PB2 3 800 300 200 L 40 40 1 1 B X (AIN1)PB3 4 800 400 200 L 40 40 1 1 B X (ICP)PD6 20 800 -1100 200 L 40 40 1 1 B X (INT0)PD2 16 800 -1500 200 L 40 40 1 1 B X (INT1)PD3 17 800 -1400 200 L 40 40 1 1 B X (MISO)PB6 7 800 700 200 L 40 40 1 1 B X (MOSI)PB5 6 800 600 200 L 40 40 1 1 B X (OC1A)PD5 19 800 -1200 200 L 40 40 1 1 B X (OC1B)PD4 18 800 -1300 200 L 40 40 1 1 B X (OC2)PD7 21 800 -1000 200 L 40 40 1 1 B X (RXD)PD0 14 800 -1700 200 L 40 40 1 1 B X (SCK)PB7 8 800 800 200 L 40 40 1 1 B X (SCL)PC0 22 800 -800 200 L 40 40 1 1 B X (SDA)PC1 23 800 -700 200 L 40 40 1 1 B X (SS)PB4 5 800 500 200 L 40 40 1 1 B X (T0)PB0 1 800 100 200 L 40 40 1 1 B X (T1)PB1 2 800 200 200 L 40 40 1 1 B X (TOSC1)PC6 28 800 -200 200 L 40 40 1 1 B X (TOSC2)PC7 29 800 -100 200 L 40 40 1 1 B X (TXD)PD1 15 800 -1600 200 L 40 40 1 1 B X AGND 31 -800 800 200 R 40 40 1 1 W X AREF 32 -800 1000 200 R 40 40 1 1 W X AVCC 30 -800 900 200 R 40 40 1 1 W X GND 11 -800 500 200 R 40 40 1 1 W X PC2 24 800 -600 200 L 40 40 1 1 B X PC3 25 800 -500 200 L 40 40 1 1 B X PC4 26 800 -400 200 L 40 40 1 1 B X PC5 27 800 -300 200 L 40 40 1 1 B X RESET 9 -800 1700 200 R 40 40 1 1 I I X VCC 10 -800 600 200 R 40 40 1 1 W X XTAL1 13 -800 1200 200 R 40 40 1 1 B X XTAL2 12 -800 1400 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA169-A # Package Name: TQFP64 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA169-A IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: MEGA169 F0 "IC" -1100 2250 50 H V L B F1 "MEGA169-A" -1100 -2400 50 H V L B F2 "avr-1-TQFP64" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 2200 900 2200 P 2 1 0 0 900 2200 900 -2300 P 2 1 0 0 900 -2300 -1100 -2300 P 2 1 0 0 -1100 -2300 -1100 2200 X (AIN1/PCINT3)PE3 5 1100 -1900 200 L 40 40 1 1 B X (CLKO/PCINT7)PE7 9 1100 -1500 200 L 40 40 1 1 B X (COM0)PA0 51 1100 1400 200 L 40 40 1 1 B X (COM1)PA1 50 1100 1500 200 L 40 40 1 1 B X (COM2)PA2 49 1100 1600 200 L 40 40 1 1 B X (COM3)PA3 48 1100 1700 200 L 40 40 1 1 B X (DI/SDA/PCINT5)PE5 7 1100 -1700 200 L 40 40 1 1 B X (DO/PCINT6)PE6 8 1100 -1600 200 L 40 40 1 1 B X (MISO/PCINT11)PB3 13 1100 800 200 L 40 40 1 1 B X (MOSI/PCINT10)PB2 12 1100 700 200 L 40 40 1 1 B X (OC0A/PCINT12)PB4 14 1100 900 200 L 40 40 1 1 B X (OC1A/PCINT13)PB5 15 1100 1000 200 L 40 40 1 1 B X (OC1B/PCINT14)PB6 16 1100 1100 200 L 40 40 1 1 B X (OC2A/PCINT15)PB7 17 1100 1200 200 L 40 40 1 1 B X (RXD/PCINT0)PE0 2 1100 -2200 200 L 40 40 1 1 B X (SCK/PCINT9)PB1 11 1100 600 200 L 40 40 1 1 B X (SEG0)PA4 47 1100 1800 200 L 40 40 1 1 B X (SEG1)PA5 46 1100 1900 200 L 40 40 1 1 B X (SEG2)PA6 45 1100 2000 200 L 40 40 1 1 B X (SEG3)PA7 44 1100 2100 200 L 40 40 1 1 B X (SEG5)PC7 42 1100 300 200 L 40 40 1 1 O X (SEG6)PC6 41 1100 200 200 L 40 40 1 1 O X (SEG7)PC5 40 1100 100 200 L 40 40 1 1 O X (SEG8)PC4 39 1100 0 200 L 40 40 1 1 O X (SEG9)PC3 38 1100 -100 200 L 40 40 1 1 O X (SEG10)PC2 37 1100 -200 200 L 40 40 1 1 O X (SEG11)PC1 36 1100 -300 200 L 40 40 1 1 O X (SEG12)PC0 35 1100 -400 200 L 40 40 1 1 O X (SEG15)PD7 32 1100 -600 200 L 40 40 1 1 B X (SEG16)PD6 31 1100 -700 200 L 40 40 1 1 B X (SEG17)PD5 30 1100 -800 200 L 40 40 1 1 B X (SEG18)PD4 29 1100 -900 200 L 40 40 1 1 B X (SEG19)PD3 28 1100 -1000 200 L 40 40 1 1 B X (SEG20)PD2 27 1100 -1100 200 L 40 40 1 1 B X (SEG21/INT0)PD1 26 1100 -1200 200 L 40 40 1 1 B X (SEG22/ICP)PD0 25 1100 -1300 200 L 40 40 1 1 B X (SS/PCINT8)PB0 10 1100 500 200 L 40 40 1 1 B X (TXD/PCINT1)PE1 3 1100 -2100 200 L 40 40 1 1 B X (USCK/SCL/PCINT4)PE4 6 1100 -1800 200 L 40 40 1 1 B X (XCK0/AIN0/PCINT2)PE2 4 1100 -2000 200 L 40 40 1 1 B X AGND 63 -1300 1300 200 R 40 40 1 1 B X AREF 62 -1300 1500 200 R 40 40 1 1 B X AVCC 64 -1300 1400 200 R 40 40 1 1 B X GND 22 -1300 900 200 R 40 40 1 1 W X GND1 53 -1300 800 200 R 40 40 1 1 W X LCDCAP 1 -1300 -100 200 R 40 40 1 1 I X PF0(ADC0) 61 -1300 -2200 200 R 40 40 1 1 I X PF1(ADC1) 60 -1300 -2100 200 R 40 40 1 1 I X PF2(ADC2) 59 -1300 -2000 200 R 40 40 1 1 I X PF3(ADC3) 58 -1300 -1900 200 R 40 40 1 1 I X PF4(ADC4/TCK) 57 -1300 -1800 200 R 40 40 1 1 I X PF5(ADC5/TMS) 56 -1300 -1700 200 R 40 40 1 1 I X PF6(ADC6/TDO) 55 -1300 -1600 200 R 40 40 1 1 I X PF7(ADC7/TDI) 54 -1300 -1500 200 R 40 40 1 1 I X PG0(SEG14) 33 -1300 0 200 R 40 40 1 1 B X PG1(SEG13) 34 -1300 100 200 R 40 40 1 1 B X PG2(SEG4) 43 -1300 200 200 R 40 40 1 1 B X PG3(T1/SEG24) 18 -1300 300 200 R 40 40 1 1 B X PG4(T0/SEG23) 19 -1300 400 200 R 40 40 1 1 B X PG5(RESET) 20 -1300 2100 200 R 40 40 1 1 I I X VCC 21 -1300 1000 200 R 40 40 1 1 W X VCC1 52 -1300 1100 200 R 40 40 1 1 W X XTAL1(TOSC1) 24 -1300 1700 200 R 40 40 1 1 B X XTAL2(TOSC2) 23 -1300 1900 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA169-M # Package Name: MLF64 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA169-M IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: MEGA169 F0 "IC" -1100 2250 50 H V L B F1 "MEGA169-M" -1100 -2400 50 H V L B F2 "avr-1-MLF64" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 2200 900 2200 P 2 1 0 0 900 2200 900 -2300 P 2 1 0 0 900 -2300 -1100 -2300 P 2 1 0 0 -1100 -2300 -1100 2200 X (AIN1/PCINT3)PE3 5 1100 -1900 200 L 40 40 1 1 B X (CLKO/PCINT7)PE7 9 1100 -1500 200 L 40 40 1 1 B X (COM0)PA0 51 1100 1400 200 L 40 40 1 1 B X (COM1)PA1 50 1100 1500 200 L 40 40 1 1 B X (COM2)PA2 49 1100 1600 200 L 40 40 1 1 B X (COM3)PA3 48 1100 1700 200 L 40 40 1 1 B X (DI/SDA/PCINT5)PE5 7 1100 -1700 200 L 40 40 1 1 B X (DO/PCINT6)PE6 8 1100 -1600 200 L 40 40 1 1 B X (MISO/PCINT11)PB3 13 1100 800 200 L 40 40 1 1 B X (MOSI/PCINT10)PB2 12 1100 700 200 L 40 40 1 1 B X (OC0A/PCINT12)PB4 14 1100 900 200 L 40 40 1 1 B X (OC1A/PCINT13)PB5 15 1100 1000 200 L 40 40 1 1 B X (OC1B/PCINT14)PB6 16 1100 1100 200 L 40 40 1 1 B X (OC2A/PCINT15)PB7 17 1100 1200 200 L 40 40 1 1 B X (RXD/PCINT0)PE0 2 1100 -2200 200 L 40 40 1 1 B X (SCK/PCINT9)PB1 11 1100 600 200 L 40 40 1 1 B X (SEG0)PA4 47 1100 1800 200 L 40 40 1 1 B X (SEG1)PA5 46 1100 1900 200 L 40 40 1 1 B X (SEG2)PA6 45 1100 2000 200 L 40 40 1 1 B X (SEG3)PA7 44 1100 2100 200 L 40 40 1 1 B X (SEG5)PC7 42 1100 300 200 L 40 40 1 1 O X (SEG6)PC6 41 1100 200 200 L 40 40 1 1 O X (SEG7)PC5 40 1100 100 200 L 40 40 1 1 O X (SEG8)PC4 39 1100 0 200 L 40 40 1 1 O X (SEG9)PC3 38 1100 -100 200 L 40 40 1 1 O X (SEG10)PC2 37 1100 -200 200 L 40 40 1 1 O X (SEG11)PC1 36 1100 -300 200 L 40 40 1 1 O X (SEG12)PC0 35 1100 -400 200 L 40 40 1 1 O X (SEG15)PD7 32 1100 -600 200 L 40 40 1 1 B X (SEG16)PD6 31 1100 -700 200 L 40 40 1 1 B X (SEG17)PD5 30 1100 -800 200 L 40 40 1 1 B X (SEG18)PD4 29 1100 -900 200 L 40 40 1 1 B X (SEG19)PD3 28 1100 -1000 200 L 40 40 1 1 B X (SEG20)PD2 27 1100 -1100 200 L 40 40 1 1 B X (SEG21/INT0)PD1 26 1100 -1200 200 L 40 40 1 1 B X (SEG22/ICP)PD0 25 1100 -1300 200 L 40 40 1 1 B X (SS/PCINT8)PB0 10 1100 500 200 L 40 40 1 1 B X (TXD/PCINT1)PE1 3 1100 -2100 200 L 40 40 1 1 B X (USCK/SCL/PCINT4)PE4 6 1100 -1800 200 L 40 40 1 1 B X (XCK0/AIN0/PCINT2)PE2 4 1100 -2000 200 L 40 40 1 1 B X AGND 63 -1300 1300 200 R 40 40 1 1 B X AREF 62 -1300 1500 200 R 40 40 1 1 B X AVCC 64 -1300 1400 200 R 40 40 1 1 B X GND 22 -1300 900 200 R 40 40 1 1 W X GND1 53 -1300 800 200 R 40 40 1 1 W X LCDCAP 1 -1300 -100 200 R 40 40 1 1 I X PF0(ADC0) 61 -1300 -2200 200 R 40 40 1 1 I X PF1(ADC1) 60 -1300 -2100 200 R 40 40 1 1 I X PF2(ADC2) 59 -1300 -2000 200 R 40 40 1 1 I X PF3(ADC3) 58 -1300 -1900 200 R 40 40 1 1 I X PF4(ADC4/TCK) 57 -1300 -1800 200 R 40 40 1 1 I X PF5(ADC5/TMS) 56 -1300 -1700 200 R 40 40 1 1 I X PF6(ADC6/TDO) 55 -1300 -1600 200 R 40 40 1 1 I X PF7(ADC7/TDI) 54 -1300 -1500 200 R 40 40 1 1 I X PG0(SEG14) 33 -1300 0 200 R 40 40 1 1 B X PG1(SEG13) 34 -1300 100 200 R 40 40 1 1 B X PG2(SEG4) 43 -1300 200 200 R 40 40 1 1 B X PG3(T1/SEG24) 18 -1300 300 200 R 40 40 1 1 B X PG4(T0/SEG23) 19 -1300 400 200 R 40 40 1 1 B X PG5(RESET) 20 -1300 2100 200 R 40 40 1 1 I I X VCC 21 -1300 1000 200 R 40 40 1 1 W X VCC1 52 -1300 1100 200 R 40 40 1 1 W X XTAL1(TOSC1) 24 -1300 1700 200 R 40 40 1 1 B X XTAL2(TOSC2) 23 -1300 1900 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA323-A # Package Name: TQFP44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA323-A IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: MEGA323-A F0 "IC" -600 1830 50 H V L B F1 "MEGA323-A" -600 -1900 50 H V L B F2 "avr-1-TQFP44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1800 600 1800 P 2 1 0 0 600 1800 600 -1800 P 2 1 0 0 600 -1800 -600 -1800 P 2 1 0 0 -600 -1800 -600 1800 X (ADC0)PA0 37 800 1000 200 L 40 40 1 1 B X (ADC1)PA1 36 800 1100 200 L 40 40 1 1 B X (ADC2)PA2 35 800 1200 200 L 40 40 1 1 B X (ADC3)PA3 34 800 1300 200 L 40 40 1 1 B X (ADC4)PA4 33 800 1400 200 L 40 40 1 1 B X (ADC5)PA5 32 800 1500 200 L 40 40 1 1 B X (ADC6)PA6 31 800 1600 200 L 40 40 1 1 B X (ADC7)PA7 30 800 1700 200 L 40 40 1 1 B X (AIN0/INT2)PB2 42 800 300 200 L 40 40 1 1 B X (AIN1/OC0)PB3 43 800 400 200 L 40 40 1 1 B X (ICP)PD6 15 800 -1100 200 L 40 40 1 1 B X (INT0)PD2 11 800 -1500 200 L 40 40 1 1 B X (INT1)PD3 12 800 -1400 200 L 40 40 1 1 B X (MISO)PB6 2 800 700 200 L 40 40 1 1 B X (MOSI)PB5 1 800 600 200 L 40 40 1 1 B X (OC1A)PD5 14 800 -1200 200 L 40 40 1 1 B X (OC1B)PD4 13 800 -1300 200 L 40 40 1 1 B X (OC2)PD7 16 800 -1000 200 L 40 40 1 1 B X (RXD)PD0 9 800 -1700 200 L 40 40 1 1 B X (SCK)PB7 3 800 800 200 L 40 40 1 1 B X (SS)PB4 44 800 500 200 L 40 40 1 1 B X (T0/XCK)PB0 40 800 100 200 L 40 40 1 1 B X (T1)PB1 41 800 200 200 L 40 40 1 1 B X (TCK)PC2 21 800 -600 200 L 40 40 1 1 B X (TDI)PC5 24 800 -300 200 L 40 40 1 1 B X (TDO)PC4 23 800 -400 200 L 40 40 1 1 B X (TMS)PC3 22 800 -500 200 L 40 40 1 1 B X (TOSC1)PC6 25 800 -200 200 L 40 40 1 1 B X (TOSC2)PC7 26 800 -100 200 L 40 40 1 1 B X (TXD)PD1 10 800 -1600 200 L 40 40 1 1 B X AGND 28 -800 800 200 R 40 40 1 1 W X AREF 29 -800 1000 200 R 40 40 1 1 W X AVCC 27 -800 900 200 R 40 40 1 1 W X GND 6 -800 100 200 R 40 40 1 1 W X GND1 18 -800 200 200 R 40 40 1 1 W X GND2 39 -800 0 200 R 40 40 1 1 W X PC0(SCL) 19 800 -800 200 L 40 40 1 1 B X PC1(SDA) 20 800 -700 200 L 40 40 1 1 B X RESET 4 -800 1700 200 R 40 40 1 1 I I X VCC 5 -800 500 200 R 40 40 1 1 W X VCC1 17 -800 600 200 R 40 40 1 1 W X VCC2 38 -800 400 200 R 40 40 1 1 W X XTAL1 8 -800 1200 200 R 40 40 1 1 B X XTAL2 7 -800 1400 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA323-P # Package Name: DIL40 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA323-P IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: MEGA323 F0 "IC" -600 1830 50 H V L B F1 "MEGA323-P" -600 -1900 50 H V L B F2 "avr-1-DIL40" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1800 600 1800 P 2 1 0 0 600 1800 600 -1800 P 2 1 0 0 600 -1800 -600 -1800 P 2 1 0 0 -600 -1800 -600 1800 X (ADC0)PA0 40 800 1000 200 L 40 40 1 1 B X (ADC1)PA1 39 800 1100 200 L 40 40 1 1 B X (ADC2)PA2 38 800 1200 200 L 40 40 1 1 B X (ADC3)PA3 37 800 1300 200 L 40 40 1 1 B X (ADC4)PA4 36 800 1400 200 L 40 40 1 1 B X (ADC5)PA5 35 800 1500 200 L 40 40 1 1 B X (ADC6)PA6 34 800 1600 200 L 40 40 1 1 B X (ADC7)PA7 33 800 1700 200 L 40 40 1 1 B X (AIN0/INT2)PB2 3 800 300 200 L 40 40 1 1 B X (AIN1/OC0)PB3 4 800 400 200 L 40 40 1 1 B X (ICP)PD6 20 800 -1100 200 L 40 40 1 1 B X (INT0)PD2 16 800 -1500 200 L 40 40 1 1 B X (INT1)PD3 17 800 -1400 200 L 40 40 1 1 B X (MISO)PB6 7 800 700 200 L 40 40 1 1 B X (MOSI)PB5 6 800 600 200 L 40 40 1 1 B X (OC1A)PD5 19 800 -1200 200 L 40 40 1 1 B X (OC1B)PD4 18 800 -1300 200 L 40 40 1 1 B X (OC2)PD7 21 800 -1000 200 L 40 40 1 1 B X (RXD)PD0 14 800 -1700 200 L 40 40 1 1 B X (SCK)PB7 8 800 800 200 L 40 40 1 1 B X (SCL)PC0 22 800 -800 200 L 40 40 1 1 B X (SDA)PC1 23 800 -700 200 L 40 40 1 1 B X (SS)PB4 5 800 500 200 L 40 40 1 1 B X (T0/XCK)PB0 1 800 100 200 L 40 40 1 1 B X (T1)PB1 2 800 200 200 L 40 40 1 1 B X (TCK)PC2 24 800 -600 200 L 40 40 1 1 B X (TDI)PC5 27 800 -300 200 L 40 40 1 1 B X (TDO)PC4 26 800 -400 200 L 40 40 1 1 B X (TMS)PC3 25 800 -500 200 L 40 40 1 1 B X (TOSC1)PC6 28 800 -200 200 L 40 40 1 1 B X (TOSC2)PC7 29 800 -100 200 L 40 40 1 1 B X (TXD)PD1 15 800 -1600 200 L 40 40 1 1 B X AGND 31 -800 800 200 R 40 40 1 1 W X AREF 32 -800 1000 200 R 40 40 1 1 W X AVCC 30 -800 900 200 R 40 40 1 1 W X GND 11 -800 500 200 R 40 40 1 1 W X RESET 9 -800 1700 200 R 40 40 1 1 I I X VCC 10 -800 600 200 R 40 40 1 1 W X XTAL1 13 -800 1200 200 R 40 40 1 1 B X XTAL2 12 -800 1400 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA8515-A # Package Name: TQFP44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA8515-A IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-M8515-A F0 "IC" -600 1630 50 H V L B F1 "MEGA8515-A" -600 -2100 50 H V L B F2 "avr-1-TQFP44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1600 600 1600 P 2 1 0 0 600 1600 600 -2000 P 2 1 0 0 600 -2000 -600 -2000 P 2 1 0 0 -600 -2000 -600 1600 X (A8)PC0 18 800 -1000 200 L 40 40 1 1 B X (A9)PC1 19 800 -900 200 L 40 40 1 1 B X (A10)PC2 20 800 -800 200 L 40 40 1 1 B X (A11)PC3 21 800 -700 200 L 40 40 1 1 B X (A12)PC4 22 800 -600 200 L 40 40 1 1 B X (A13)PC5 23 800 -500 200 L 40 40 1 1 B X (A14)PC6 24 800 -400 200 L 40 40 1 1 B X (A15)PC7 25 800 -300 200 L 40 40 1 1 B X (AD0)PA0 37 800 800 200 L 40 40 1 1 B X (AD1)PA1 36 800 900 200 L 40 40 1 1 B X (AD2)PA2 35 800 1000 200 L 40 40 1 1 B X (AD3)PA3 34 800 1100 200 L 40 40 1 1 B X (AD4)PA4 33 800 1200 200 L 40 40 1 1 B X (AD5)PA5 32 800 1300 200 L 40 40 1 1 B X (AD6)PA6 31 800 1400 200 L 40 40 1 1 B X (AD7)PA7 30 800 1500 200 L 40 40 1 1 B X (AIN0)PB2 42 800 100 200 L 40 40 1 1 B X (AIN1)PB3 43 800 200 200 L 40 40 1 1 B X (INT0)PD2 8 800 -1700 200 L 40 40 1 1 B X (INT1)PD3 9 800 -1600 200 L 40 40 1 1 B X (MISO)PB6 2 800 500 200 L 40 40 1 1 B X (MOSI)PB5 1 800 400 200 L 40 40 1 1 B X (OC1A)PD5 11 800 -1400 200 L 40 40 1 1 B X (RD)PD7 13 800 -1200 200 L 40 40 1 1 B X (RXD)PD0 5 800 -1900 200 L 40 40 1 1 B X (SCK)PB7 3 800 600 200 L 40 40 1 1 B X (SS)PB4 44 800 300 200 L 40 40 1 1 B X (T0/OC0)PB0 40 800 -100 200 L 40 40 1 1 B X (T1)PB1 41 800 0 200 L 40 40 1 1 B X (TXD)PD1 7 800 -1800 200 L 40 40 1 1 B X (WR)PD6 12 800 -1300 200 L 40 40 1 1 B X (XCK)PD4 10 800 -1500 200 L 40 40 1 1 B X GND 16 -800 200 200 R 40 40 1 1 W X NC1 6 -600 -1600 0 R 40 40 1 1 U X NC2 17 -600 -1700 0 R 40 40 1 1 U X NC3 28 -600 -1800 0 R 40 40 1 1 U X NC4 39 -600 -1900 0 R 40 40 1 1 U X PE0(ICP/INT2) 29 -800 700 200 R 40 40 1 1 B X PE1(ALE) 27 -800 600 200 R 40 40 1 1 B X PE2(OC1B) 26 -800 500 200 R 40 40 1 1 B X RESET 4 -800 1500 200 R 40 40 1 1 I I X VCC 38 -800 300 200 R 40 40 1 1 W X XTAL1 15 -800 1000 200 R 40 40 1 1 B X XTAL2 14 -800 1200 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA8515-J # Package Name: PLCC44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA8515-J IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-M8515-A F0 "IC" -600 1630 50 H V L B F1 "MEGA8515-J" -600 -2100 50 H V L B F2 "avr-1-PLCC44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1600 600 1600 P 2 1 0 0 600 1600 600 -2000 P 2 1 0 0 600 -2000 -600 -2000 P 2 1 0 0 -600 -2000 -600 1600 X (A8)PC0 24 800 -1000 200 L 40 40 1 1 B X (A9)PC1 25 800 -900 200 L 40 40 1 1 B X (A10)PC2 26 800 -800 200 L 40 40 1 1 B X (A11)PC3 27 800 -700 200 L 40 40 1 1 B X (A12)PC4 28 800 -600 200 L 40 40 1 1 B X (A13)PC5 29 800 -500 200 L 40 40 1 1 B X (A14)PC6 30 800 -400 200 L 40 40 1 1 B X (A15)PC7 31 800 -300 200 L 40 40 1 1 B X (AD0)PA0 43 800 800 200 L 40 40 1 1 B X (AD1)PA1 42 800 900 200 L 40 40 1 1 B X (AD2)PA2 41 800 1000 200 L 40 40 1 1 B X (AD3)PA3 40 800 1100 200 L 40 40 1 1 B X (AD4)PA4 39 800 1200 200 L 40 40 1 1 B X (AD5)PA5 38 800 1300 200 L 40 40 1 1 B X (AD6)PA6 37 800 1400 200 L 40 40 1 1 B X (AD7)PA7 36 800 1500 200 L 40 40 1 1 B X (AIN0)PB2 4 800 100 200 L 40 40 1 1 B X (AIN1)PB3 5 800 200 200 L 40 40 1 1 B X (INT0)PD2 14 800 -1700 200 L 40 40 1 1 B X (INT1)PD3 15 800 -1600 200 L 40 40 1 1 B X (MISO)PB6 8 800 500 200 L 40 40 1 1 B X (MOSI)PB5 7 800 400 200 L 40 40 1 1 B X (OC1A)PD5 17 800 -1400 200 L 40 40 1 1 B X (RD)PD7 19 800 -1200 200 L 40 40 1 1 B X (RXD)PD0 11 800 -1900 200 L 40 40 1 1 B X (SCK)PB7 9 800 600 200 L 40 40 1 1 B X (SS)PB4 6 800 300 200 L 40 40 1 1 B X (T0/OC0)PB0 2 800 -100 200 L 40 40 1 1 B X (T1)PB1 3 800 0 200 L 40 40 1 1 B X (TXD)PD1 13 800 -1800 200 L 40 40 1 1 B X (WR)PD6 18 800 -1300 200 L 40 40 1 1 B X (XCK)PD4 16 800 -1500 200 L 40 40 1 1 B X GND 22 -800 200 200 R 40 40 1 1 W X NC1 1 -600 -1600 0 R 40 40 1 1 U X NC2 12 -600 -1700 0 R 40 40 1 1 U X NC3 23 -600 -1800 0 R 40 40 1 1 U X NC4 34 -600 -1900 0 R 40 40 1 1 U X PE0(ICP/INT2) 35 -800 700 200 R 40 40 1 1 B X PE1(ALE) 33 -800 600 200 R 40 40 1 1 B X PE2(OC1B) 32 -800 500 200 R 40 40 1 1 B X RESET 10 -800 1500 200 R 40 40 1 1 I I X VCC 44 -800 300 200 R 40 40 1 1 W X XTAL1 21 -800 1000 200 R 40 40 1 1 B X XTAL2 20 -800 1200 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA8515-M # Package Name: MLF44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA8515-M IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-M8515-A F0 "IC" -600 1630 50 H V L B F1 "MEGA8515-M" -600 -2100 50 H V L B F2 "avr-1-MLF44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1600 600 1600 P 2 1 0 0 600 1600 600 -2000 P 2 1 0 0 600 -2000 -600 -2000 P 2 1 0 0 -600 -2000 -600 1600 X (A8)PC0 18 800 -1000 200 L 40 40 1 1 B X (A9)PC1 19 800 -900 200 L 40 40 1 1 B X (A10)PC2 20 800 -800 200 L 40 40 1 1 B X (A11)PC3 21 800 -700 200 L 40 40 1 1 B X (A12)PC4 22 800 -600 200 L 40 40 1 1 B X (A13)PC5 23 800 -500 200 L 40 40 1 1 B X (A14)PC6 24 800 -400 200 L 40 40 1 1 B X (A15)PC7 25 800 -300 200 L 40 40 1 1 B X (AD0)PA0 37 800 800 200 L 40 40 1 1 B X (AD1)PA1 36 800 900 200 L 40 40 1 1 B X (AD2)PA2 35 800 1000 200 L 40 40 1 1 B X (AD3)PA3 34 800 1100 200 L 40 40 1 1 B X (AD4)PA4 33 800 1200 200 L 40 40 1 1 B X (AD5)PA5 32 800 1300 200 L 40 40 1 1 B X (AD6)PA6 31 800 1400 200 L 40 40 1 1 B X (AD7)PA7 30 800 1500 200 L 40 40 1 1 B X (AIN0)PB2 42 800 100 200 L 40 40 1 1 B X (AIN1)PB3 43 800 200 200 L 40 40 1 1 B X (INT0)PD2 8 800 -1700 200 L 40 40 1 1 B X (INT1)PD3 9 800 -1600 200 L 40 40 1 1 B X (MISO)PB6 2 800 500 200 L 40 40 1 1 B X (MOSI)PB5 1 800 400 200 L 40 40 1 1 B X (OC1A)PD5 11 800 -1400 200 L 40 40 1 1 B X (RD)PD7 13 800 -1200 200 L 40 40 1 1 B X (RXD)PD0 5 800 -1900 200 L 40 40 1 1 B X (SCK)PB7 3 800 600 200 L 40 40 1 1 B X (SS)PB4 44 800 300 200 L 40 40 1 1 B X (T0/OC0)PB0 40 800 -100 200 L 40 40 1 1 B X (T1)PB1 41 800 0 200 L 40 40 1 1 B X (TXD)PD1 7 800 -1800 200 L 40 40 1 1 B X (WR)PD6 12 800 -1300 200 L 40 40 1 1 B X (XCK)PD4 10 800 -1500 200 L 40 40 1 1 B X GND 16 -800 200 200 R 40 40 1 1 W X NC1 6 -600 -1600 0 R 40 40 1 1 U X NC2 17 -600 -1700 0 R 40 40 1 1 U X NC3 28 -600 -1800 0 R 40 40 1 1 U X NC4 39 -600 -1900 0 R 40 40 1 1 U X PE0(ICP/INT2) 29 -800 700 200 R 40 40 1 1 B X PE1(ALE) 27 -800 600 200 R 40 40 1 1 B X PE2(OC1B) 26 -800 500 200 R 40 40 1 1 B X RESET 4 -800 1500 200 R 40 40 1 1 I I X VCC 38 -800 300 200 R 40 40 1 1 W X XTAL1 15 -800 1000 200 R 40 40 1 1 B X XTAL2 14 -800 1200 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA8515-P # Package Name: DIL40 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA8515-P IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-7 F0 "IC" -600 1830 50 H V L B F1 "MEGA8515-P" -600 -1900 50 H V L B F2 "avr-1-DIL40" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1800 600 1800 P 2 1 0 0 600 1800 600 -1800 P 2 1 0 0 600 -1800 -600 -1800 P 2 1 0 0 -600 -1800 -600 1800 X (A8)PC0 21 800 -800 200 L 40 40 1 1 B X (A9)PC1 22 800 -700 200 L 40 40 1 1 B X (A10)PC2 23 800 -600 200 L 40 40 1 1 B X (A11)PC3 24 800 -500 200 L 40 40 1 1 B X (A12)PC4 25 800 -400 200 L 40 40 1 1 B X (A13)PC5 26 800 -300 200 L 40 40 1 1 B X (A14)PC6 27 800 -200 200 L 40 40 1 1 B X (A15)PC7 28 800 -100 200 L 40 40 1 1 B X (AD0)PA0 39 800 1000 200 L 40 40 1 1 B X (AD1)PA1 38 800 1100 200 L 40 40 1 1 B X (AD2)PA2 37 800 1200 200 L 40 40 1 1 B X (AD3)PA3 36 800 1300 200 L 40 40 1 1 B X (AD4)PA4 35 800 1400 200 L 40 40 1 1 B X (AD5)PA5 34 800 1500 200 L 40 40 1 1 B X (AD6)PA6 33 800 1600 200 L 40 40 1 1 B X (AD7)PA7 32 800 1700 200 L 40 40 1 1 B X (AIN0)PB2 3 800 300 200 L 40 40 1 1 B X (AIN1)PB3 4 800 400 200 L 40 40 1 1 B X (INT0)PD2 12 800 -1500 200 L 40 40 1 1 B X (INT1)PD3 13 800 -1400 200 L 40 40 1 1 B X (MISO)PB6 7 800 700 200 L 40 40 1 1 B X (MOSI)PB5 6 800 600 200 L 40 40 1 1 B X (OC1A)PD5 15 800 -1200 200 L 40 40 1 1 B X (RD)PD7 17 800 -1000 200 L 40 40 1 1 B X (RXD)PD0 10 800 -1700 200 L 40 40 1 1 B X (SCK)PB7 8 800 800 200 L 40 40 1 1 B X (SS)PB4 5 800 500 200 L 40 40 1 1 B X (T0/OC0)PB0 1 800 100 200 L 40 40 1 1 B X (T1)PB1 2 800 200 200 L 40 40 1 1 B X (TXD)PD1 11 800 -1600 200 L 40 40 1 1 B X (WR)PD6 16 800 -1100 200 L 40 40 1 1 B X (XCK)PD4 14 800 -1300 200 L 40 40 1 1 B X GND 20 -800 400 200 R 40 40 1 1 W X PE0(ICP/INT2) 31 -800 900 200 R 40 40 1 1 B X PE1(ALE) 30 -800 800 200 R 40 40 1 1 B X PE2(OC1B) 29 -800 700 200 R 40 40 1 1 B X RESET 9 -800 1700 200 R 40 40 1 1 I I X VCC 40 -800 500 200 R 40 40 1 1 W X XTAL1 19 -800 1200 200 R 40 40 1 1 B X XTAL2 18 -800 1400 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA8535-A # Package Name: TQFP44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA8535-A IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-M8535-A F0 "IC" -600 1730 50 H V L B F1 "MEGA8535-A" -600 -2000 50 H V L B F2 "avr-1-TQFP44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -1900 P 2 1 0 0 600 -1900 -600 -1900 P 2 1 0 0 -600 -1900 -600 1700 X (ADC0)PA0 37 800 900 200 L 40 40 1 1 B X (ADC1)PA1 36 800 1000 200 L 40 40 1 1 B X (ADC2)PA2 35 800 1100 200 L 40 40 1 1 B X (ADC3)PA3 34 800 1200 200 L 40 40 1 1 B X (ADC4)PA4 33 800 1300 200 L 40 40 1 1 B X (ADC5)PA5 32 800 1400 200 L 40 40 1 1 B X (ADC6)PA6 31 800 1500 200 L 40 40 1 1 B X (ADC7)PA7 30 800 1600 200 L 40 40 1 1 B X (AIN0/INT2)PB2 42 800 200 200 L 40 40 1 1 B X (AIN1/OC0)PB3 43 800 300 200 L 40 40 1 1 B X (ICP)PD6 15 800 -1200 200 L 40 40 1 1 B X (INT0)PD2 11 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 12 800 -1500 200 L 40 40 1 1 B X (MISO)PB6 2 800 600 200 L 40 40 1 1 B X (MOSI)PB5 1 800 500 200 L 40 40 1 1 B X (OC1A)PD5 14 800 -1300 200 L 40 40 1 1 B X (OC1B)PD4 13 800 -1400 200 L 40 40 1 1 B X (OC2)PD7 16 800 -1100 200 L 40 40 1 1 B X (RXD)PD0 9 800 -1800 200 L 40 40 1 1 B X (SCK)PB7 3 800 700 200 L 40 40 1 1 B X (SS)PB4 44 800 400 200 L 40 40 1 1 B X (T0/XCK)PB0 40 800 0 200 L 40 40 1 1 B X (T1)PB1 41 800 100 200 L 40 40 1 1 B X (TOSC1)PC6 25 800 -300 200 L 40 40 1 1 B X (TOSC2)PC7 26 800 -200 200 L 40 40 1 1 B X (TXD)PD1 10 800 -1700 200 L 40 40 1 1 B X AGND 28 -800 700 200 R 40 40 1 1 W X AREF 29 -800 900 200 R 40 40 1 1 W X AVCC 27 -800 800 200 R 40 40 1 1 W X GND 6 -800 0 200 R 40 40 1 1 W X GND1 18 -800 100 200 R 40 40 1 1 W X GND2 39 -800 -100 200 R 40 40 1 1 W X PC0(SCL) 19 800 -900 200 L 40 40 1 1 B X PC1(SDA) 20 800 -800 200 L 40 40 1 1 B X PC2 21 800 -700 200 L 40 40 1 1 B X PC3 22 800 -600 200 L 40 40 1 1 B X PC4 23 800 -500 200 L 40 40 1 1 B X PC5 24 800 -400 200 L 40 40 1 1 B X RESET 4 -800 1600 200 R 40 40 1 1 I I X VCC 5 -800 400 200 R 40 40 1 1 W X VCC1 17 -800 500 200 R 40 40 1 1 W X VCC2 38 -800 300 200 R 40 40 1 1 W X XTAL1 8 -800 1100 200 R 40 40 1 1 B X XTAL2 7 -800 1300 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA8535-J # Package Name: PLCC44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA8535-J IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-M8535-A F0 "IC" -600 1730 50 H V L B F1 "MEGA8535-J" -600 -2000 50 H V L B F2 "avr-1-PLCC44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -1900 P 2 1 0 0 600 -1900 -600 -1900 P 2 1 0 0 -600 -1900 -600 1700 X (ADC0)PA0 43 800 900 200 L 40 40 1 1 B X (ADC1)PA1 42 800 1000 200 L 40 40 1 1 B X (ADC2)PA2 41 800 1100 200 L 40 40 1 1 B X (ADC3)PA3 40 800 1200 200 L 40 40 1 1 B X (ADC4)PA4 39 800 1300 200 L 40 40 1 1 B X (ADC5)PA5 38 800 1400 200 L 40 40 1 1 B X (ADC6)PA6 37 800 1500 200 L 40 40 1 1 B X (ADC7)PA7 36 800 1600 200 L 40 40 1 1 B X (AIN0/INT2)PB2 4 800 200 200 L 40 40 1 1 B X (AIN1/OC0)PB3 5 800 300 200 L 40 40 1 1 B X (ICP)PD6 21 800 -1200 200 L 40 40 1 1 B X (INT0)PD2 17 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 18 800 -1500 200 L 40 40 1 1 B X (MISO)PB6 8 800 600 200 L 40 40 1 1 B X (MOSI)PB5 7 800 500 200 L 40 40 1 1 B X (OC1A)PD5 20 800 -1300 200 L 40 40 1 1 B X (OC1B)PD4 19 800 -1400 200 L 40 40 1 1 B X (OC2)PD7 22 800 -1100 200 L 40 40 1 1 B X (RXD)PD0 15 800 -1800 200 L 40 40 1 1 B X (SCK)PB7 9 800 700 200 L 40 40 1 1 B X (SS)PB4 6 800 400 200 L 40 40 1 1 B X (T0/XCK)PB0 2 800 0 200 L 40 40 1 1 B X (T1)PB1 3 800 100 200 L 40 40 1 1 B X (TOSC1)PC6 31 800 -300 200 L 40 40 1 1 B X (TOSC2)PC7 32 800 -200 200 L 40 40 1 1 B X (TXD)PD1 16 800 -1700 200 L 40 40 1 1 B X AGND 34 -800 700 200 R 40 40 1 1 W X AREF 35 -800 900 200 R 40 40 1 1 W X AVCC 33 -800 800 200 R 40 40 1 1 W X GND 1 -800 0 200 R 40 40 1 1 W X GND1 12 -800 100 200 R 40 40 1 1 W X GND2 24 -800 -100 200 R 40 40 1 1 W X PC0(SCL) 25 800 -900 200 L 40 40 1 1 B X PC1(SDA) 26 800 -800 200 L 40 40 1 1 B X PC2 27 800 -700 200 L 40 40 1 1 B X PC3 28 800 -600 200 L 40 40 1 1 B X PC4 29 800 -500 200 L 40 40 1 1 B X PC5 30 800 -400 200 L 40 40 1 1 B X RESET 10 -800 1600 200 R 40 40 1 1 I I X VCC 11 -800 400 200 R 40 40 1 1 W X VCC1 23 -800 500 200 R 40 40 1 1 W X VCC2 44 -800 300 200 R 40 40 1 1 W X XTAL1 14 -800 1100 200 R 40 40 1 1 B X XTAL2 13 -800 1300 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA8535-M # Package Name: MLF44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA8535-M IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-M8535-A F0 "IC" -600 1730 50 H V L B F1 "MEGA8535-M" -600 -2000 50 H V L B F2 "avr-1-MLF44" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -1900 P 2 1 0 0 600 -1900 -600 -1900 P 2 1 0 0 -600 -1900 -600 1700 X (ADC0)PA0 37 800 900 200 L 40 40 1 1 B X (ADC1)PA1 36 800 1000 200 L 40 40 1 1 B X (ADC2)PA2 35 800 1100 200 L 40 40 1 1 B X (ADC3)PA3 34 800 1200 200 L 40 40 1 1 B X (ADC4)PA4 33 800 1300 200 L 40 40 1 1 B X (ADC5)PA5 32 800 1400 200 L 40 40 1 1 B X (ADC6)PA6 31 800 1500 200 L 40 40 1 1 B X (ADC7)PA7 30 800 1600 200 L 40 40 1 1 B X (AIN0/INT2)PB2 42 800 200 200 L 40 40 1 1 B X (AIN1/OC0)PB3 43 800 300 200 L 40 40 1 1 B X (ICP)PD6 15 800 -1200 200 L 40 40 1 1 B X (INT0)PD2 11 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 12 800 -1500 200 L 40 40 1 1 B X (MISO)PB6 2 800 600 200 L 40 40 1 1 B X (MOSI)PB5 1 800 500 200 L 40 40 1 1 B X (OC1A)PD5 14 800 -1300 200 L 40 40 1 1 B X (OC1B)PD4 13 800 -1400 200 L 40 40 1 1 B X (OC2)PD7 16 800 -1100 200 L 40 40 1 1 B X (RXD)PD0 9 800 -1800 200 L 40 40 1 1 B X (SCK)PB7 3 800 700 200 L 40 40 1 1 B X (SS)PB4 44 800 400 200 L 40 40 1 1 B X (T0/XCK)PB0 40 800 0 200 L 40 40 1 1 B X (T1)PB1 41 800 100 200 L 40 40 1 1 B X (TOSC1)PC6 25 800 -300 200 L 40 40 1 1 B X (TOSC2)PC7 26 800 -200 200 L 40 40 1 1 B X (TXD)PD1 10 800 -1700 200 L 40 40 1 1 B X AGND 28 -800 700 200 R 40 40 1 1 W X AREF 29 -800 900 200 R 40 40 1 1 W X AVCC 27 -800 800 200 R 40 40 1 1 W X GND 6 -800 0 200 R 40 40 1 1 W X GND1 18 -800 100 200 R 40 40 1 1 W X GND2 39 -800 -100 200 R 40 40 1 1 W X PC0(SCL) 19 800 -900 200 L 40 40 1 1 B X PC1(SDA) 20 800 -800 200 L 40 40 1 1 B X PC2 21 800 -700 200 L 40 40 1 1 B X PC3 22 800 -600 200 L 40 40 1 1 B X PC4 23 800 -500 200 L 40 40 1 1 B X PC5 24 800 -400 200 L 40 40 1 1 B X RESET 4 -800 1600 200 R 40 40 1 1 I I X VCC 5 -800 400 200 R 40 40 1 1 W X VCC1 17 -800 500 200 R 40 40 1 1 W X VCC2 38 -800 300 200 R 40 40 1 1 W X XTAL1 8 -800 1100 200 R 40 40 1 1 B X XTAL2 7 -800 1300 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: MEGA8535-P # Package Name: DIL40 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MEGA8535-P IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 32-I/O-M8535-P F0 "IC" -600 1730 50 H V L B F1 "MEGA8535-P" -600 -2000 50 H V L B F2 "avr-1-DIL40" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -1900 P 2 1 0 0 600 -1900 -600 -1900 P 2 1 0 0 -600 -1900 -600 1700 X (ADC0)PA0 40 800 900 200 L 40 40 1 1 B X (ADC1)PA1 39 800 1000 200 L 40 40 1 1 B X (ADC2)PA2 38 800 1100 200 L 40 40 1 1 B X (ADC3)PA3 37 800 1200 200 L 40 40 1 1 B X (ADC4)PA4 36 800 1300 200 L 40 40 1 1 B X (ADC5)PA5 35 800 1400 200 L 40 40 1 1 B X (ADC6)PA6 34 800 1500 200 L 40 40 1 1 B X (ADC7)PA7 33 800 1600 200 L 40 40 1 1 B X (AIN0/OC0)PB2 3 800 200 200 L 40 40 1 1 B X (AIN1/INT2)PB3 4 800 300 200 L 40 40 1 1 B X (ICP)PD6 20 800 -1200 200 L 40 40 1 1 B X (INT0)PD2 16 800 -1600 200 L 40 40 1 1 B X (INT1)PD3 17 800 -1500 200 L 40 40 1 1 B X (MISO)PB6 7 800 600 200 L 40 40 1 1 B X (MOSI)PB5 6 800 500 200 L 40 40 1 1 B X (OC1A)PD5 19 800 -1300 200 L 40 40 1 1 B X (OC1B)PD4 18 800 -1400 200 L 40 40 1 1 B X (OC2)PD7 21 800 -1100 200 L 40 40 1 1 B X (RXD)PD0 14 800 -1800 200 L 40 40 1 1 B X (SCK)PB7 8 800 700 200 L 40 40 1 1 B X (SCL)PC0 22 800 -900 200 L 40 40 1 1 B X (SDA)PC1 23 800 -800 200 L 40 40 1 1 B X (SS)PB4 5 800 400 200 L 40 40 1 1 B X (T0/XCK)PB0 1 800 0 200 L 40 40 1 1 B X (T1)PB1 2 800 100 200 L 40 40 1 1 B X (TOSC1)PC6 28 800 -300 200 L 40 40 1 1 B X (TOSC2)PC7 29 800 -200 200 L 40 40 1 1 B X (TXD)PD1 15 800 -1700 200 L 40 40 1 1 B X AGND 31 -800 700 200 R 40 40 1 1 W X AREF 32 -800 900 200 R 40 40 1 1 W X AVCC 30 -800 800 200 R 40 40 1 1 W X GND 11 -800 400 200 R 40 40 1 1 W X PC2 24 800 -700 200 L 40 40 1 1 B X PC3 25 800 -600 200 L 40 40 1 1 B X PC4 26 800 -500 200 L 40 40 1 1 B X PC5 27 800 -400 200 L 40 40 1 1 B X RESET 9 -800 1600 200 R 40 40 1 1 I I X VCC 10 -800 500 200 R 40 40 1 1 W X XTAL1 13 -800 1100 200 R 40 40 1 1 B X XTAL2 12 -800 1300 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: TINY10P # Package Name: DIL08 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF TINY10P IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 6-I/O-1 F0 "IC" -500 430 50 H V L B F1 "TINY10P" -500 -400 50 H V L B F2 "avr-1-DIL08" 0 150 50 H I C C DRAW P 2 1 0 0 500 -300 -500 -300 P 2 1 0 0 -500 -300 -500 400 P 2 1 0 0 -500 400 500 400 P 2 1 0 0 500 400 500 -300 X (AIN0)PB0 5 700 -200 200 L 40 40 1 1 B X (AIN1)PB1 6 700 -100 200 L 40 40 1 1 B X (RESET)PB5 1 700 300 200 L 40 40 1 1 B X (T0)PB2 7 700 0 200 L 40 40 1 1 B X (XTAL1)PB3 2 700 100 200 L 40 40 1 1 B X (XTAL2)PB4 3 700 200 200 L 40 40 1 1 B X GND 4 -700 -200 200 R 40 40 1 1 W X VCC 8 -700 -100 200 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: TINY10S # Package Name: SOIC8 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF TINY10S IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 6-I/O-1 F0 "IC" -500 430 50 H V L B F1 "TINY10S" -500 -400 50 H V L B F2 "avr-1-SOIC8" 0 150 50 H I C C DRAW P 2 1 0 0 500 -300 -500 -300 P 2 1 0 0 -500 -300 -500 400 P 2 1 0 0 -500 400 500 400 P 2 1 0 0 500 400 500 -300 X (AIN0)PB0 5 700 -200 200 L 40 40 1 1 B X (AIN1)PB1 6 700 -100 200 L 40 40 1 1 B X (RESET)PB5 1 700 300 200 L 40 40 1 1 B X (T0)PB2 7 700 0 200 L 40 40 1 1 B X (XTAL1)PB3 2 700 100 200 L 40 40 1 1 B X (XTAL2)PB4 3 700 200 200 L 40 40 1 1 B X GND 4 -700 -200 200 R 40 40 1 1 W X VCC 8 -700 -100 200 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: TINY11P # Package Name: DIL08 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF TINY11P IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 6-I/O-1 F0 "IC" -500 430 50 H V L B F1 "TINY11P" -500 -400 50 H V L B F2 "avr-1-DIL08" 0 150 50 H I C C DRAW P 2 1 0 0 500 -300 -500 -300 P 2 1 0 0 -500 -300 -500 400 P 2 1 0 0 -500 400 500 400 P 2 1 0 0 500 400 500 -300 X (AIN0)PB0 5 700 -200 200 L 40 40 1 1 B X (AIN1)PB1 6 700 -100 200 L 40 40 1 1 B X (RESET)PB5 1 700 300 200 L 40 40 1 1 B X (T0)PB2 7 700 0 200 L 40 40 1 1 B X (XTAL1)PB3 2 700 100 200 L 40 40 1 1 B X (XTAL2)PB4 3 700 200 200 L 40 40 1 1 B X GND 4 -700 -200 200 R 40 40 1 1 W X VCC 8 -700 -100 200 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: TINY11S # Package Name: SOIC8 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF TINY11S IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 6-I/O-1 F0 "IC" -500 430 50 H V L B F1 "TINY11S" -500 -400 50 H V L B F2 "avr-1-SOIC8" 0 150 50 H I C C DRAW P 2 1 0 0 500 -300 -500 -300 P 2 1 0 0 -500 -300 -500 400 P 2 1 0 0 -500 400 500 400 P 2 1 0 0 500 400 500 -300 X (AIN0)PB0 5 700 -200 200 L 40 40 1 1 B X (AIN1)PB1 6 700 -100 200 L 40 40 1 1 B X (RESET)PB5 1 700 300 200 L 40 40 1 1 B X (T0)PB2 7 700 0 200 L 40 40 1 1 B X (XTAL1)PB3 2 700 100 200 L 40 40 1 1 B X (XTAL2)PB4 3 700 200 200 L 40 40 1 1 B X GND 4 -700 -200 200 R 40 40 1 1 W X VCC 8 -700 -100 200 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: TINY11LP # Package Name: DIL08 # Dev Tech: L # Dev Prefix: IC # Gate count = 1 # DEF TINY11LP IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 6-I/O-1 F0 "IC" -500 430 50 H V L B F1 "TINY11LP" -500 -400 50 H V L B F2 "avr-1-DIL08" 0 150 50 H I C C DRAW P 2 1 0 0 500 -300 -500 -300 P 2 1 0 0 -500 -300 -500 400 P 2 1 0 0 -500 400 500 400 P 2 1 0 0 500 400 500 -300 X (AIN0)PB0 5 700 -200 200 L 40 40 1 1 B X (AIN1)PB1 6 700 -100 200 L 40 40 1 1 B X (RESET)PB5 1 700 300 200 L 40 40 1 1 B X (T0)PB2 7 700 0 200 L 40 40 1 1 B X (XTAL1)PB3 2 700 100 200 L 40 40 1 1 B X (XTAL2)PB4 3 700 200 200 L 40 40 1 1 B X GND 4 -700 -200 200 R 40 40 1 1 W X VCC 8 -700 -100 200 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: TINY11LS # Package Name: SOIC8 # Dev Tech: L # Dev Prefix: IC # Gate count = 1 # DEF TINY11LS IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 6-I/O-1 F0 "IC" -500 430 50 H V L B F1 "TINY11LS" -500 -400 50 H V L B F2 "avr-1-SOIC8" 0 150 50 H I C C DRAW P 2 1 0 0 500 -300 -500 -300 P 2 1 0 0 -500 -300 -500 400 P 2 1 0 0 -500 400 500 400 P 2 1 0 0 500 400 500 -300 X (AIN0)PB0 5 700 -200 200 L 40 40 1 1 B X (AIN1)PB1 6 700 -100 200 L 40 40 1 1 B X (RESET)PB5 1 700 300 200 L 40 40 1 1 B X (T0)PB2 7 700 0 200 L 40 40 1 1 B X (XTAL1)PB3 2 700 100 200 L 40 40 1 1 B X (XTAL2)PB4 3 700 200 200 L 40 40 1 1 B X GND 4 -700 -200 200 R 40 40 1 1 W X VCC 8 -700 -100 200 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: TINY12P # Package Name: DIL08 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF TINY12P IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 6-I/O-2 F0 "IC" -500 330 50 H V L B F1 "TINY12P" -500 -500 50 H V L B F2 "avr-1-DIL08" 0 150 50 H I C C DRAW P 2 1 0 0 500 -400 -500 -400 P 2 1 0 0 -500 -400 -500 300 P 2 1 0 0 -500 300 500 300 P 2 1 0 0 500 300 500 -400 X (MISO)PB1 6 700 -200 200 L 40 40 1 1 B X (MOSI)PB0 5 700 -300 200 L 40 40 1 1 B X (RESET)PB5 1 700 200 200 L 40 40 1 1 B X (SCK)PB2 7 700 -100 200 L 40 40 1 1 B X (XTAL1)PB3 2 700 0 200 L 40 40 1 1 B X (XTAL2)PB4 3 700 100 200 L 40 40 1 1 B X GND 4 -700 -300 200 R 40 40 1 1 W X VCC 8 -700 -200 200 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: TINY12S # Package Name: SOIC8 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF TINY12S IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 6-I/O-2 F0 "IC" -500 330 50 H V L B F1 "TINY12S" -500 -500 50 H V L B F2 "avr-1-SOIC8" 0 150 50 H I C C DRAW P 2 1 0 0 500 -400 -500 -400 P 2 1 0 0 -500 -400 -500 300 P 2 1 0 0 -500 300 500 300 P 2 1 0 0 500 300 500 -400 X (MISO)PB1 6 700 -200 200 L 40 40 1 1 B X (MOSI)PB0 5 700 -300 200 L 40 40 1 1 B X (RESET)PB5 1 700 200 200 L 40 40 1 1 B X (SCK)PB2 7 700 -100 200 L 40 40 1 1 B X (XTAL1)PB3 2 700 0 200 L 40 40 1 1 B X (XTAL2)PB4 3 700 100 200 L 40 40 1 1 B X GND 4 -700 -300 200 R 40 40 1 1 W X VCC 8 -700 -200 200 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: TINY15LP # Package Name: DIL08 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF TINY15LP IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 6-I/O-3 F0 "IC" -500 330 50 H V L B F1 "TINY15LP" -500 -500 50 H V L B F2 "avr-1-DIL08" 0 150 50 H I C C DRAW P 2 1 0 0 500 -400 -500 -400 P 2 1 0 0 -500 -400 -500 300 P 2 1 0 0 -500 300 500 300 P 2 1 0 0 500 300 500 -400 X (ADC0)PB5 1 700 200 200 L 40 40 1 1 B X (ADC1)PB2 7 700 -100 200 L 40 40 1 1 B X (ADC2)PB3 3 700 0 200 L 40 40 1 1 B X (ADC3)PB4 2 700 100 200 L 40 40 1 1 B X (AREF)PB0 5 700 -300 200 L 40 40 1 1 B X (OCP)PB1 6 700 -200 200 L 40 40 1 1 B X GND 4 -700 -300 200 R 40 40 1 1 W X VCC 8 -700 -200 200 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: TINY15LS # Package Name: SOIC8 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF TINY15LS IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 6-I/O-3 F0 "IC" -500 330 50 H V L B F1 "TINY15LS" -500 -500 50 H V L B F2 "avr-1-SOIC8" 0 150 50 H I C C DRAW P 2 1 0 0 500 -400 -500 -400 P 2 1 0 0 -500 -400 -500 300 P 2 1 0 0 -500 300 500 300 P 2 1 0 0 500 300 500 -400 X (ADC0)PB5 1 700 200 200 L 40 40 1 1 B X (ADC1)PB2 7 700 -100 200 L 40 40 1 1 B X (ADC2)PB3 3 700 0 200 L 40 40 1 1 B X (ADC3)PB4 2 700 100 200 L 40 40 1 1 B X (AREF)PB0 5 700 -300 200 L 40 40 1 1 B X (OCP)PB1 6 700 -200 200 L 40 40 1 1 B X GND 4 -700 -300 200 R 40 40 1 1 W X VCC 8 -700 -200 200 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: TINY22P # Package Name: DIL08 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF TINY22P IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 5-I/O-1 F0 "IC" -500 330 50 H V L B F1 "TINY22P" -500 -400 50 H V L B F2 "avr-1-DIL08" 0 150 50 H I C C DRAW P 2 1 0 0 -500 -300 500 -300 P 2 1 0 0 500 -300 500 300 P 2 1 0 0 500 300 -500 300 P 2 1 0 0 -500 300 -500 -300 X (CLOCK)PB3 2 700 100 200 L 40 40 1 1 B X (MISO)PB1 6 700 -100 200 L 40 40 1 1 B X (MOSI)PB0 5 700 -200 200 L 40 40 1 1 B X (SCK)PB2 7 700 0 200 L 40 40 1 1 B X GND 4 -700 -200 200 R 40 40 1 1 W X PB4 3 700 200 200 L 40 40 1 1 B X RESET 1 -700 200 200 R 40 40 1 1 I I X VCC 8 -700 -100 200 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: TINY22S # Package Name: SOIC8 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF TINY22S IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 5-I/O-1 F0 "IC" -500 330 50 H V L B F1 "TINY22S" -500 -400 50 H V L B F2 "avr-1-SOIC8" 0 150 50 H I C C DRAW P 2 1 0 0 -500 -300 500 -300 P 2 1 0 0 500 -300 500 300 P 2 1 0 0 500 300 -500 300 P 2 1 0 0 -500 300 -500 -300 X (CLOCK)PB3 2 700 100 200 L 40 40 1 1 B X (MISO)PB1 6 700 -100 200 L 40 40 1 1 B X (MOSI)PB0 5 700 -200 200 L 40 40 1 1 B X (SCK)PB2 7 700 0 200 L 40 40 1 1 B X GND 4 -700 -200 200 R 40 40 1 1 W X PB4 3 700 200 200 L 40 40 1 1 B X RESET 1 -700 200 200 R 40 40 1 1 I I X VCC 8 -700 -100 200 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: TINY26M # Package Name: MLF32 # Dev Tech: '' # Dev Prefix: # Gate count = 1 # DEF TINY26M ?? 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 16-I/O-2 DRAW P 2 1 0 0 -700 900 700 900 P 2 1 0 0 700 900 700 -1000 P 2 1 0 0 700 -1000 -700 -1000 P 2 1 0 0 -700 -1000 -700 900 X (ADC0)PA0 26 900 -200 200 L 40 40 1 1 B X (ADC1)PA1 25 900 -300 200 L 40 40 1 1 B X (ADC2)PA2 23 900 -400 200 L 40 40 1 1 B X (ADC3)PA4 17 900 -600 200 L 40 40 1 1 B X (ADC4)PA5 15 900 -700 200 L 40 40 1 1 B X (ADC5/AIN0)PA6 14 900 -800 200 L 40 40 1 1 B X (ADC6/AIN1)PA7 13 900 -900 200 L 40 40 1 1 B X (ADC7/XTAL1)PB4 7 900 400 200 L 40 40 1 1 B X (ADC8/XTAL2)PB5 8 900 300 200 L 40 40 1 1 B X (ADC9/INT0/T0)PB6 10 900 200 200 L 40 40 1 1 B X (ADC10/_RESET_)PB7 11 900 100 200 L 40 40 1 1 B X (AREF)PA3 22 900 -500 200 L 40 40 1 1 B X (MISO/DO/OC1A)PB1 31 900 700 200 L 40 40 1 1 B X (MOSI/DI/SDA/_OC1A_)PB0 30 900 800 200 L 40 40 1 1 B X (OC1B)PB3 2 900 500 200 L 40 40 1 1 B X (SCK/SCL/_OC1B_)PB2 32 900 600 200 L 40 40 1 1 B X AVCC 18 -900 -100 200 R 40 40 1 1 W X GND 21 -900 -900 200 R 40 40 1 1 W X GND_ 5 -900 -800 200 R 40 40 1 1 W X VCC 4 -900 -600 200 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: TINY26P # Package Name: DIL20 # Dev Tech: '' # Dev Prefix: # Gate count = 1 # DEF TINY26P ?? 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 16-I/O-2 DRAW P 2 1 0 0 -700 900 700 900 P 2 1 0 0 700 900 700 -1000 P 2 1 0 0 700 -1000 -700 -1000 P 2 1 0 0 -700 -1000 -700 900 X (ADC0)PA0 20 900 -200 200 L 40 40 1 1 B X (ADC1)PA1 19 900 -300 200 L 40 40 1 1 B X (ADC2)PA2 18 900 -400 200 L 40 40 1 1 B X (ADC3)PA4 14 900 -600 200 L 40 40 1 1 B X (ADC4)PA5 13 900 -700 200 L 40 40 1 1 B X (ADC5/AIN0)PA6 12 900 -800 200 L 40 40 1 1 B X (ADC6/AIN1)PA7 11 900 -900 200 L 40 40 1 1 B X (ADC7/XTAL1)PB4 7 900 400 200 L 40 40 1 1 B X (ADC8/XTAL2)PB5 8 900 300 200 L 40 40 1 1 B X (ADC9/INT0/T0)PB6 9 900 200 200 L 40 40 1 1 B X (ADC10/_RESET_)PB7 10 900 100 200 L 40 40 1 1 B X (AREF)PA3 17 900 -500 200 L 40 40 1 1 B X (MISO/DO/OC1A)PB1 2 900 700 200 L 40 40 1 1 B X (MOSI/DI/SDA/_OC1A_)PB0 1 900 800 200 L 40 40 1 1 B X (OC1B)PB3 4 900 500 200 L 40 40 1 1 B X (SCK/SCL/_OC1B_)PB2 3 900 600 200 L 40 40 1 1 B X AVCC 15 -900 -100 200 R 40 40 1 1 W X GND 16 -900 -900 200 R 40 40 1 1 W X GND_ 6 -900 -800 200 R 40 40 1 1 W X VCC 5 -900 -600 200 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: TINY26S # Package Name: SO20L$ # Dev Tech: '' # Dev Prefix: # Gate count = 1 # DEF TINY26S ?? 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 16-I/O-2 DRAW P 2 1 0 0 -700 900 700 900 P 2 1 0 0 700 900 700 -1000 P 2 1 0 0 700 -1000 -700 -1000 P 2 1 0 0 -700 -1000 -700 900 X (ADC0)PA0 20 900 -200 200 L 40 40 1 1 B X (ADC1)PA1 19 900 -300 200 L 40 40 1 1 B X (ADC2)PA2 18 900 -400 200 L 40 40 1 1 B X (ADC3)PA4 14 900 -600 200 L 40 40 1 1 B X (ADC4)PA5 13 900 -700 200 L 40 40 1 1 B X (ADC5/AIN0)PA6 12 900 -800 200 L 40 40 1 1 B X (ADC6/AIN1)PA7 11 900 -900 200 L 40 40 1 1 B X (ADC7/XTAL1)PB4 7 900 400 200 L 40 40 1 1 B X (ADC8/XTAL2)PB5 8 900 300 200 L 40 40 1 1 B X (ADC9/INT0/T0)PB6 9 900 200 200 L 40 40 1 1 B X (ADC10/_RESET_)PB7 10 900 100 200 L 40 40 1 1 B X (AREF)PA3 17 900 -500 200 L 40 40 1 1 B X (MISO/DO/OC1A)PB1 2 900 700 200 L 40 40 1 1 B X (MOSI/DI/SDA/_OC1A_)PB0 1 900 800 200 L 40 40 1 1 B X (OC1B)PB3 4 900 500 200 L 40 40 1 1 B X (SCK/SCL/_OC1B_)PB2 3 900 600 200 L 40 40 1 1 B X AVCC 15 -900 -100 200 R 40 40 1 1 W X GND 16 -900 -900 200 R 40 40 1 1 W X GND_ 6 -900 -800 200 R 40 40 1 1 W X VCC 5 -900 -600 200 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: TINY28LA # Package Name: TQFP32-08 # Dev Tech: L # Dev Prefix: IC # Gate count = 1 # DEF TINY28LA IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 20-I/O-4 F0 "IC" -600 1130 50 H V L B F1 "TINY28LA" -600 -1200 50 H V L B F2 "avr-1-TQFP32-08" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1100 600 1100 P 2 1 0 0 600 1100 600 -1100 P 2 1 0 0 600 -1100 -600 -1100 P 2 1 0 0 -600 -1100 -600 1100 X (IR)PA2 25 800 900 200 L 40 40 1 1 O X GND 5 -800 0 200 R 40 40 1 1 W X GND1 21 -800 -100 200 R 40 40 1 1 W X NC1 3 600 -600 0 R 40 40 1 1 U X NC2 6 600 -700 0 R 40 40 1 1 U X NC3 19 600 -800 0 R 40 40 1 1 U X NC4 20 600 -900 0 R 40 40 1 1 U X NC5 22 600 -1000 0 R 40 40 1 1 U X PA0 28 800 700 200 L 40 40 1 1 B X PA1 27 800 800 200 L 40 40 1 1 B X PA3 26 800 1000 200 L 40 40 1 1 B X PB0(AIN0) 12 -800 -1000 200 R 40 40 1 1 I X PB1(AIN1) 13 -800 -900 200 R 40 40 1 1 I X PB2(T0) 14 -800 -800 200 R 40 40 1 1 I X PB3(INT0) 15 -800 -700 200 R 40 40 1 1 I X PB4(INT1) 16 -800 -600 200 R 40 40 1 1 I X PB5 17 -800 -500 200 R 40 40 1 1 I X PB6 23 -800 -400 200 R 40 40 1 1 I X PB7 24 -800 -300 200 R 40 40 1 1 I X PD0 30 800 -200 200 L 40 40 1 1 B X PD1 31 800 -100 200 L 40 40 1 1 B X PD2 32 800 0 200 L 40 40 1 1 B X PD3 1 800 100 200 L 40 40 1 1 B X PD4 2 800 200 200 L 40 40 1 1 B X PD5 9 800 300 200 L 40 40 1 1 B X PD6 10 800 400 200 L 40 40 1 1 B X PD7 11 800 500 200 L 40 40 1 1 B X RESET 29 -800 1000 200 R 40 40 1 1 I I X VCC 4 -800 300 200 R 40 40 1 1 W X VCC1 18 -800 200 200 R 40 40 1 1 W X XTAL1 7 -800 500 200 R 40 40 1 1 B X XTAL2 8 -800 700 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: TINY28LP # Package Name: DIL28-3 # Dev Tech: L # Dev Prefix: IC # Gate count = 1 # DEF TINY28LP IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 20-I/O-3 F0 "IC" -600 1130 50 H V L B F1 "TINY28LP" -600 -1200 50 H V L B F2 "avr-1-DIL28-3" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1100 600 1100 P 2 1 0 0 600 1100 600 -1100 P 2 1 0 0 600 -1100 -600 -1100 P 2 1 0 0 -600 -1100 -600 1100 X (IR)PA2 25 800 900 200 L 40 40 1 1 O X GND 8 -800 0 200 R 40 40 1 1 W X GND1 22 -800 -100 200 R 40 40 1 1 W X NC1 21 600 -1000 0 R 40 40 1 1 U X PA0 28 800 700 200 L 40 40 1 1 B X PA1 27 800 800 200 L 40 40 1 1 B X PA3 26 800 1000 200 L 40 40 1 1 B X PB0(AIN0) 14 -800 -1000 200 R 40 40 1 1 I X PB1(AIN1) 15 -800 -900 200 R 40 40 1 1 I X PB2(T0) 16 -800 -800 200 R 40 40 1 1 I X PB3(INT0) 17 -800 -700 200 R 40 40 1 1 I X PB4(INT1) 18 -800 -600 200 R 40 40 1 1 I X PB5 19 -800 -500 200 R 40 40 1 1 I X PB6 23 -800 -400 200 R 40 40 1 1 I X PB7 24 -800 -300 200 R 40 40 1 1 I X PD0 2 800 -200 200 L 40 40 1 1 B X PD1 3 800 -100 200 L 40 40 1 1 B X PD2 4 800 0 200 L 40 40 1 1 B X PD3 5 800 100 200 L 40 40 1 1 B X PD4 6 800 200 200 L 40 40 1 1 B X PD5 11 800 300 200 L 40 40 1 1 B X PD6 12 800 400 200 L 40 40 1 1 B X PD7 13 800 500 200 L 40 40 1 1 B X RESET 1 -800 1000 200 R 40 40 1 1 I I X VCC 7 -800 300 200 R 40 40 1 1 W X VCC1 20 -800 200 200 R 40 40 1 1 W X XTAL1 9 -800 500 200 R 40 40 1 1 B X XTAL2 10 -800 700 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: TINY28VA # Package Name: TQFP32-08 # Dev Tech: V # Dev Prefix: IC # Gate count = 1 # DEF TINY28VA IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 20-I/O-4 F0 "IC" -600 1130 50 H V L B F1 "TINY28VA" -600 -1200 50 H V L B F2 "avr-1-TQFP32-08" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1100 600 1100 P 2 1 0 0 600 1100 600 -1100 P 2 1 0 0 600 -1100 -600 -1100 P 2 1 0 0 -600 -1100 -600 1100 X (IR)PA2 25 800 900 200 L 40 40 1 1 O X GND 5 -800 0 200 R 40 40 1 1 W X GND1 21 -800 -100 200 R 40 40 1 1 W X NC1 3 600 -600 0 R 40 40 1 1 U X NC2 6 600 -700 0 R 40 40 1 1 U X NC3 19 600 -800 0 R 40 40 1 1 U X NC4 20 600 -900 0 R 40 40 1 1 U X NC5 22 600 -1000 0 R 40 40 1 1 U X PA0 28 800 700 200 L 40 40 1 1 B X PA1 27 800 800 200 L 40 40 1 1 B X PA3 26 800 1000 200 L 40 40 1 1 B X PB0(AIN0) 12 -800 -1000 200 R 40 40 1 1 I X PB1(AIN1) 13 -800 -900 200 R 40 40 1 1 I X PB2(T0) 14 -800 -800 200 R 40 40 1 1 I X PB3(INT0) 15 -800 -700 200 R 40 40 1 1 I X PB4(INT1) 16 -800 -600 200 R 40 40 1 1 I X PB5 17 -800 -500 200 R 40 40 1 1 I X PB6 23 -800 -400 200 R 40 40 1 1 I X PB7 24 -800 -300 200 R 40 40 1 1 I X PD0 30 800 -200 200 L 40 40 1 1 B X PD1 31 800 -100 200 L 40 40 1 1 B X PD2 32 800 0 200 L 40 40 1 1 B X PD3 1 800 100 200 L 40 40 1 1 B X PD4 2 800 200 200 L 40 40 1 1 B X PD5 9 800 300 200 L 40 40 1 1 B X PD6 10 800 400 200 L 40 40 1 1 B X PD7 11 800 500 200 L 40 40 1 1 B X RESET 29 -800 1000 200 R 40 40 1 1 I I X VCC 4 -800 300 200 R 40 40 1 1 W X VCC1 18 -800 200 200 R 40 40 1 1 W X XTAL1 7 -800 500 200 R 40 40 1 1 B X XTAL2 8 -800 700 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: TINY28VP # Package Name: DIL28-3 # Dev Tech: V # Dev Prefix: IC # Gate count = 1 # DEF TINY28VP IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 20-I/O-3 F0 "IC" -600 1130 50 H V L B F1 "TINY28VP" -600 -1200 50 H V L B F2 "avr-1-DIL28-3" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1100 600 1100 P 2 1 0 0 600 1100 600 -1100 P 2 1 0 0 600 -1100 -600 -1100 P 2 1 0 0 -600 -1100 -600 1100 X (IR)PA2 25 800 900 200 L 40 40 1 1 O X GND 8 -800 0 200 R 40 40 1 1 W X GND1 22 -800 -100 200 R 40 40 1 1 W X NC1 21 600 -1000 0 R 40 40 1 1 U X PA0 28 800 700 200 L 40 40 1 1 B X PA1 27 800 800 200 L 40 40 1 1 B X PA3 26 800 1000 200 L 40 40 1 1 B X PB0(AIN0) 14 -800 -1000 200 R 40 40 1 1 I X PB1(AIN1) 15 -800 -900 200 R 40 40 1 1 I X PB2(T0) 16 -800 -800 200 R 40 40 1 1 I X PB3(INT0) 17 -800 -700 200 R 40 40 1 1 I X PB4(INT1) 18 -800 -600 200 R 40 40 1 1 I X PB5 19 -800 -500 200 R 40 40 1 1 I X PB6 23 -800 -400 200 R 40 40 1 1 I X PB7 24 -800 -300 200 R 40 40 1 1 I X PD0 2 800 -200 200 L 40 40 1 1 B X PD1 3 800 -100 200 L 40 40 1 1 B X PD2 4 800 0 200 L 40 40 1 1 B X PD3 5 800 100 200 L 40 40 1 1 B X PD4 6 800 200 200 L 40 40 1 1 B X PD5 11 800 300 200 L 40 40 1 1 B X PD6 12 800 400 200 L 40 40 1 1 B X PD7 13 800 500 200 L 40 40 1 1 B X RESET 1 -800 1000 200 R 40 40 1 1 I I X VCC 7 -800 300 200 R 40 40 1 1 W X VCC1 20 -800 200 200 R 40 40 1 1 W X XTAL1 9 -800 500 200 R 40 40 1 1 B X XTAL2 10 -800 700 200 R 40 40 1 1 B ENDDRAW ENDDEF #End Library