EESchema-LIBRARY Version 2.3 29/04/2008-12:21:43 # Converted with eagle2kicad.ulp Version 0.9 # Device count = 14 # # Dev Name: CS42L51_HW # Package Name: QFN-32L # Dev Tech: '' # Dev Prefix: U # Gate count = 1 # DEF CS42L51_HW U 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: CS42L51_HW F0 "U" -700 1450 50 H V L B F1 "CS42L51_HW" -700 -1625 50 H V L B F2 "cirrus-2-QFN-32L" 0 150 50 H I C C DRAW P 2 1 0 0 -700 1400 700 1400 P 2 1 0 0 700 1400 700 -1500 P 2 1 0 0 700 -1500 -700 -1500 P 2 1 0 0 -700 -1500 -700 1400 X ADC_FILT+ 16 900 -500 200 L 40 40 1 1 B X AFILTA 21 900 -1100 200 L 40 40 1 1 B X AFILTB 22 900 -1200 200 L 40 40 1 1 B X AGND 13 900 -900 200 L 40 40 1 1 B X AIN1A 23 900 600 200 L 40 40 1 1 B X AIN1B 24 900 400 200 L 40 40 1 1 B X AOUTA 11 900 1000 200 L 40 40 1 1 B X AOUTB 10 900 1200 200 L 40 40 1 1 B X DAC_FILT+ 14 900 -700 200 L 40 40 1 1 B X DEM 4 -900 -700 200 R 40 40 1 1 B X DGND 28 0 -1700 200 U 40 40 1 1 B X FLYN 8 -900 900 200 R 40 40 1 1 B X FLYP 6 -900 1200 200 R 40 40 1 1 B X GND_HP 7 -900 400 200 R 40 40 1 1 B X I2S/LJ 3 -900 -500 200 R 40 40 1 1 B X LRCK 1 -900 -100 200 R 40 40 1 1 B X MCLK 30 -900 100 200 R 40 40 1 1 B X MCLKDIV2 2 -900 -600 200 R 40 40 1 1 B X NC 17 900 200 200 L 40 40 1 1 B X NC1 18 900 100 200 L 40 40 1 1 B X NC2 19 900 0 200 L 40 40 1 1 B X NC3 20 900 -100 200 L 40 40 1 1 B X RESET 25 -900 -400 200 R 40 40 1 1 B X SCLK 31 -900 0 200 R 40 40 1 1 B X SDIN 32 -900 -200 200 R 40 40 1 1 B X SDOUT/MS 29 -900 -300 200 R 40 40 1 1 B X VA 12 -100 1600 200 D 40 40 1 1 B X VA_HP 5 0 1600 200 D 40 40 1 1 B X VD 27 -200 1600 200 D 40 40 1 1 B X VL 26 -900 -1300 200 R 40 40 1 1 B X VQ 15 900 -1300 200 L 40 40 1 1 B X VSS_HP 9 -900 700 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: CS42L51_SW # Package Name: QFN-32L # Dev Tech: '' # Dev Prefix: U # Gate count = 1 # DEF CS42L51_SW U 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: CS42L51_SW F0 "U" -700 1450 50 H V L B F1 "CS42L51_SW" -700 -1625 50 H V L B F2 "cirrus-2-QFN-32L" 0 150 50 H I C C DRAW P 2 1 0 0 -700 1400 700 1400 P 2 1 0 0 700 1400 700 -1500 P 2 1 0 0 700 -1500 -700 -1500 P 2 1 0 0 -700 -1500 -700 1400 X ADC_FILT+ 16 900 -500 200 L 40 40 1 1 B X ADO/CS 4 -900 -700 200 R 40 40 1 1 B X AFILTA 21 900 -1100 200 L 40 40 1 1 B X AFILTB 22 900 -1200 200 L 40 40 1 1 B X AGND 13 900 -900 200 L 40 40 1 1 B X AIN1A 23 900 700 200 L 40 40 1 1 B X AIN1B 24 900 500 200 L 40 40 1 1 B X AIN2A 19 900 300 200 L 40 40 1 1 B X AIN2B 20 900 100 200 L 40 40 1 1 B X AOUTA 11 900 1000 200 L 40 40 1 1 B X AOUTB 10 900 1200 200 L 40 40 1 1 B X DAC_FILT+ 14 900 -700 200 L 40 40 1 1 B X DGND 28 0 -1700 200 U 40 40 1 1 B X FLYN 8 -900 900 200 R 40 40 1 1 B X FLYP 6 -900 1200 200 R 40 40 1 1 B X GND_HP 7 -900 400 200 R 40 40 1 1 B X LRCK 1 -900 -100 200 R 40 40 1 1 B X MCLK 30 -900 100 200 R 40 40 1 1 B X MICIN1 17 900 -100 200 L 40 40 1 1 B X MICIN2 18 900 -300 200 L 40 40 1 1 B X RESET 25 -900 -400 200 R 40 40 1 1 B X SCL/CCLK 3 -900 -500 200 R 40 40 1 1 B X SCLK 31 -900 0 200 R 40 40 1 1 B X SDA/CDIN 2 -900 -600 200 R 40 40 1 1 B X SDIN 32 -900 -200 200 R 40 40 1 1 B X SDOUT/MS 29 -900 -300 200 R 40 40 1 1 B X VA 12 -100 1600 200 D 40 40 1 1 B X VA_HP 5 0 1600 200 D 40 40 1 1 B X VD 27 -200 1600 200 D 40 40 1 1 B X VL 26 -900 -1300 200 R 40 40 1 1 B X VQ 15 900 -1300 200 L 40 40 1 1 B X VSS_HP 9 -900 700 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: CS3310 # Package Name: SO16 # Dev Tech: '' # Dev Prefix: U # Gate count = 1 # DEF CS3310 U 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: CS3310 F0 "U" -500 850 50 H V L B F1 "CS3310" -500 -825 50 H V L B F2 "cirrus-2-SO16" 0 150 50 H I C C DRAW P 2 1 0 0 500 800 500 -700 P 2 1 0 0 500 -700 -500 -700 P 2 1 0 0 -500 -700 -500 800 P 2 1 0 0 -500 800 500 800 X /CS 2 -700 300 200 R 40 40 1 1 I X /MUTE 8 -700 500 200 R 40 40 1 1 I X AGNDL 15 700 -500 200 L 40 40 1 1 P X AGNDR 10 700 -600 200 L 40 40 1 1 P X AINL 16 -700 -100 200 R 40 40 1 1 I X AINR 9 -700 -300 200 R 40 40 1 1 I X AOUTL 14 700 -100 200 L 40 40 1 1 O X AOUTR 11 700 -300 200 L 40 40 1 1 O X DGND 5 -700 -600 200 R 40 40 1 1 W X SCLK 6 -700 200 200 R 40 40 1 1 I X SDATAI 3 -700 100 200 R 40 40 1 1 I X SDATAO 7 700 100 200 L 40 40 1 1 O X VA+ 12 700 500 200 L 40 40 1 1 W X VA- 13 700 300 200 L 40 40 1 1 W X VD+ 4 700 700 200 L 40 40 1 1 W X ZCEN 1 -700 700 200 R 40 40 1 1 I ENDDRAW ENDDEF # # Dev Name: CS4340 # Package Name: SO16 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF CS4340 IC 0 40 Y Y 1 L N # Gate Name: IC1 # Symbol Name: CS4340 F0 "IC" -500 750 50 H V L B F1 "CS4340" -500 -925 50 H V L B F2 "cirrus-2-SO16" 0 150 50 H I C C DRAW P 2 1 0 0 500 700 500 -800 P 2 1 0 0 500 -800 -500 -800 P 2 1 0 0 -500 -800 -500 700 P 2 1 0 0 -500 700 500 700 X !RST 1 -700 -500 200 R 40 40 1 1 I X AGND 13 -700 -700 200 R 40 40 1 1 W X AOUTL 15 700 500 200 L 40 40 1 1 O X AOUTR 12 700 -600 200 L 40 40 1 1 O X DEMO 8 -700 -400 200 R 40 40 1 1 I X DIF0 7 -700 -300 200 R 40 40 1 1 I X DIF1 6 -700 -200 200 R 40 40 1 1 I X FILT+ 9 700 100 200 L 40 40 1 1 P X LRCK 4 -700 200 200 R 40 40 1 1 I X MCLK 5 -700 0 200 R 40 40 1 1 I X MUTEC 16 700 300 200 L 40 40 1 1 O X REF_GND 11 700 -300 200 L 40 40 1 1 W X SCLK/DEM1 3 -700 300 200 R 40 40 1 1 I X SDATA 2 -700 400 200 R 40 40 1 1 I X VA 14 -700 600 200 R 40 40 1 1 W X VQ 10 700 -100 200 L 40 40 1 1 P ENDDRAW ENDDEF # # Dev Name: CS4398 # Package Name: TSSOP28L # Dev Tech: '' # Dev Prefix: U # Gate count = 1 # DEF CS4398 U 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: CS4398 F0 "U" -700 1150 50 H V L B F1 "CS4398" -700 -1225 50 H V L B F2 "cirrus-2-TSSOP28L" 0 150 50 H I C C DRAW P 2 1 0 0 -700 1100 700 1100 P 2 1 0 0 700 1100 700 -1100 P 2 1 0 0 700 -1100 -700 -1100 P 2 1 0 0 -700 -1100 -700 1100 P 2 1 0 0 -450 -856 -612 -856 P 2 1 0 0 -143 -356 -237 -356 X AGND 21 100 -1300 200 U 40 40 1 1 W X AMUTEC 25 900 900 200 L 40 40 1 1 P X AOUTA+ 23 900 500 200 L 40 40 1 1 P X AOUTA- 24 900 700 200 L 40 40 1 1 P X AOUTB+ 20 900 300 200 L 40 40 1 1 P X AOUTB- 19 900 100 200 L 40 40 1 1 P X BMUTEC 18 900 -100 200 L 40 40 1 1 P X DGND 8 -100 -1300 200 U 40 40 1 1 W X DSD_A 28 -900 100 200 R 40 40 1 1 B X DSD_B 1 -900 0 200 R 40 40 1 1 B X DSD_SCLK 2 -900 200 200 R 40 40 1 1 B X FILT+ 15 900 -500 200 L 40 40 1 1 P X LRCK 5 -900 700 200 R 40 40 1 1 B X M0(AD0/CS) 12 -900 -400 200 R 40 40 1 1 I X M1(SDA/CDOUT) 11 -900 -500 200 R 40 40 1 1 I X M2(SCL/CCLK) 10 -900 -600 200 R 40 40 1 1 I X M3(AD1/CDIN) 9 -900 -700 200 R 40 40 1 1 I X MCLK 6 -900 900 200 R 40 40 1 1 I X REF_GND 16 900 -700 200 L 40 40 1 1 P X RST 13 -900 -900 200 R 40 40 1 1 I X SCLK 4 -900 800 200 R 40 40 1 1 B X SDIN 3 -900 600 200 R 40 40 1 1 I X VA 22 100 1300 200 D 40 40 1 1 W X VD 7 -100 1300 200 D 40 40 1 1 W X VLC 14 -900 -200 200 R 40 40 1 1 W X VLS 27 -900 400 200 R 40 40 1 1 W X VQ 26 900 -300 200 L 40 40 1 1 P X VREF 17 900 -900 200 L 40 40 1 1 P ENDDRAW ENDDEF # # Dev Name: CS5351-KSZ # Package Name: SO24W # Dev Tech: '' # Dev Prefix: U # Gate count = 1 # DEF CS5351-KSZ U 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: CS5351 F0 "U" -700 1050 50 H V L B F1 "CS5351-KSZ" -700 -1125 50 H V L B F2 "cirrus-2-SO24W" 0 150 50 H I C C DRAW P 2 1 0 0 -700 1000 700 1000 P 2 1 0 0 700 1000 700 -1000 P 2 1 0 0 700 -1000 -700 -1000 P 2 1 0 0 -700 -1000 -700 1000 P 2 1 0 0 387 843 587 843 P 2 1 0 0 437 743 600 743 P 2 1 0 0 500 643 587 643 P 2 1 0 0 550 543 600 543 P 2 1 0 0 437 443 600 443 X AINL 16 -900 0 200 R 40 40 1 1 P X AINR 21 -900 -800 200 R 40 40 1 1 P X FILT+ 24 -900 800 200 R 40 40 1 1 P X GND 7 -100 -1200 200 U 40 40 1 1 W X GND@18 18 100 -1200 200 U 40 40 1 1 W X HPF 11 900 400 200 L 40 40 1 1 I X I2S/LJ 12 900 600 200 L 40 40 1 1 I X LRCK 3 900 -400 200 L 40 40 1 1 B X M/S 2 900 500 200 L 40 40 1 1 I X M0 13 900 300 200 L 40 40 1 1 I X M1 14 900 200 200 L 40 40 1 1 I X MCLK 5 900 -800 200 L 40 40 1 1 I X MDIV 10 900 100 200 L 40 40 1 1 I X OVFL 15 900 800 200 L 40 40 1 1 O X REF_GND 23 -900 500 200 R 40 40 1 1 P X RST 1 900 700 200 L 40 40 1 1 I X SCLK 4 900 -600 200 L 40 40 1 1 B X SDOUT 9 900 -200 200 L 40 40 1 1 O X VA 19 -200 1200 200 D 40 40 1 1 W X VD 6 0 1200 200 D 40 40 1 1 W X VL 8 200 1200 200 D 40 40 1 1 W X VQ1 17 -900 -200 200 R 40 40 1 1 P X VQ2 20 -900 -600 200 R 40 40 1 1 P X VQ3 22 -900 -400 200 R 40 40 1 1 P ENDDRAW ENDDEF # # Dev Name: CS5351-KZZ # Package Name: TSSOP24L # Dev Tech: '' # Dev Prefix: U # Gate count = 1 # DEF CS5351-KZZ U 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: CS5351 F0 "U" -700 1050 50 H V L B F1 "CS5351-KZZ" -700 -1125 50 H V L B F2 "cirrus-2-TSSOP24L" 0 150 50 H I C C DRAW P 2 1 0 0 -700 1000 700 1000 P 2 1 0 0 700 1000 700 -1000 P 2 1 0 0 700 -1000 -700 -1000 P 2 1 0 0 -700 -1000 -700 1000 P 2 1 0 0 387 843 587 843 P 2 1 0 0 437 743 600 743 P 2 1 0 0 500 643 587 643 P 2 1 0 0 550 543 600 543 P 2 1 0 0 437 443 600 443 X AINL 16 -900 0 200 R 40 40 1 1 P X AINR 21 -900 -800 200 R 40 40 1 1 P X FILT+ 24 -900 800 200 R 40 40 1 1 P X GND 7 -100 -1200 200 U 40 40 1 1 W X GND@18 18 100 -1200 200 U 40 40 1 1 W X HPF 11 900 400 200 L 40 40 1 1 I X I2S/LJ 12 900 600 200 L 40 40 1 1 I X LRCK 3 900 -400 200 L 40 40 1 1 B X M/S 2 900 500 200 L 40 40 1 1 I X M0 13 900 300 200 L 40 40 1 1 I X M1 14 900 200 200 L 40 40 1 1 I X MCLK 5 900 -800 200 L 40 40 1 1 I X MDIV 10 900 100 200 L 40 40 1 1 I X OVFL 15 900 800 200 L 40 40 1 1 O X REF_GND 23 -900 500 200 R 40 40 1 1 P X RST 1 900 700 200 L 40 40 1 1 I X SCLK 4 900 -600 200 L 40 40 1 1 B X SDOUT 9 900 -200 200 L 40 40 1 1 O X VA 19 -200 1200 200 D 40 40 1 1 W X VD 6 0 1200 200 D 40 40 1 1 W X VL 8 200 1200 200 D 40 40 1 1 W X VQ1 17 -900 -200 200 R 40 40 1 1 P X VQ2 20 -900 -600 200 R 40 40 1 1 P X VQ3 22 -900 -400 200 R 40 40 1 1 P ENDDRAW ENDDEF # # Dev Name: CS5361-KSZ # Package Name: SO24W # Dev Tech: '' # Dev Prefix: U # Gate count = 1 # DEF CS5361-KSZ U 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: CS5361 F0 "U" -700 1050 50 H V L B F1 "CS5361-KSZ" -700 -1125 50 H V L B F2 "cirrus-2-SO24W" 0 150 50 H I C C DRAW P 2 1 0 0 -700 1000 700 1000 P 2 1 0 0 700 1000 700 -1000 P 2 1 0 0 700 -1000 -700 -1000 P 2 1 0 0 -700 -1000 -700 1000 P 2 1 0 0 387 843 587 843 P 2 1 0 0 437 743 600 743 P 2 1 0 0 500 643 587 643 P 2 1 0 0 550 543 600 543 P 2 1 0 0 437 443 600 443 X AINL+ 16 -900 -200 200 R 40 40 1 1 P X AINL- 17 -900 -400 200 R 40 40 1 1 P X AINR+ 21 -900 -600 200 R 40 40 1 1 P X AINR- 20 -900 -800 200 R 40 40 1 1 P X FILT+ 24 -900 800 200 R 40 40 1 1 P X GND 7 -100 -1200 200 U 40 40 1 1 W X GND@18 18 100 -1200 200 U 40 40 1 1 W X HPF 11 900 400 200 L 40 40 1 1 I X I2S/LJ 12 900 600 200 L 40 40 1 1 I X LRCK 3 900 -400 200 L 40 40 1 1 B X M/S 2 900 500 200 L 40 40 1 1 I X M0 13 900 300 200 L 40 40 1 1 I X M1 14 900 200 200 L 40 40 1 1 I X MCLK 5 900 -800 200 L 40 40 1 1 I X MDIV 10 900 100 200 L 40 40 1 1 I X OVFL 15 900 800 200 L 40 40 1 1 O X REF_GND 23 -900 500 200 R 40 40 1 1 P X RST 1 900 700 200 L 40 40 1 1 I X SCLK 4 900 -600 200 L 40 40 1 1 B X SDOUT 9 900 -200 200 L 40 40 1 1 O X VA 19 -200 1200 200 D 40 40 1 1 W X VD 6 0 1200 200 D 40 40 1 1 W X VL 8 200 1200 200 D 40 40 1 1 W X VQ 22 -900 200 200 R 40 40 1 1 P ENDDRAW ENDDEF # # Dev Name: CS5361-KZZ # Package Name: TSSOP24L # Dev Tech: '' # Dev Prefix: U # Gate count = 1 # DEF CS5361-KZZ U 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: CS5361 F0 "U" -700 1050 50 H V L B F1 "CS5361-KZZ" -700 -1125 50 H V L B F2 "cirrus-2-TSSOP24L" 0 150 50 H I C C DRAW P 2 1 0 0 -700 1000 700 1000 P 2 1 0 0 700 1000 700 -1000 P 2 1 0 0 700 -1000 -700 -1000 P 2 1 0 0 -700 -1000 -700 1000 P 2 1 0 0 387 843 587 843 P 2 1 0 0 437 743 600 743 P 2 1 0 0 500 643 587 643 P 2 1 0 0 550 543 600 543 P 2 1 0 0 437 443 600 443 X AINL+ 16 -900 -200 200 R 40 40 1 1 P X AINL- 17 -900 -400 200 R 40 40 1 1 P X AINR+ 21 -900 -600 200 R 40 40 1 1 P X AINR- 20 -900 -800 200 R 40 40 1 1 P X FILT+ 24 -900 800 200 R 40 40 1 1 P X GND 7 -100 -1200 200 U 40 40 1 1 W X GND@18 18 100 -1200 200 U 40 40 1 1 W X HPF 11 900 400 200 L 40 40 1 1 I X I2S/LJ 12 900 600 200 L 40 40 1 1 I X LRCK 3 900 -400 200 L 40 40 1 1 B X M/S 2 900 500 200 L 40 40 1 1 I X M0 13 900 300 200 L 40 40 1 1 I X M1 14 900 200 200 L 40 40 1 1 I X MCLK 5 900 -800 200 L 40 40 1 1 I X MDIV 10 900 100 200 L 40 40 1 1 I X OVFL 15 900 800 200 L 40 40 1 1 O X REF_GND 23 -900 500 200 R 40 40 1 1 P X RST 1 900 700 200 L 40 40 1 1 I X SCLK 4 900 -600 200 L 40 40 1 1 B X SDOUT 9 900 -200 200 L 40 40 1 1 O X VA 19 -200 1200 200 D 40 40 1 1 W X VD 6 0 1200 200 D 40 40 1 1 W X VL 8 200 1200 200 D 40 40 1 1 W X VQ 22 -900 200 200 R 40 40 1 1 P ENDDRAW ENDDEF # # Dev Name: CS8406_HW-CSS # Package Name: SO28W # Dev Tech: '' # Dev Prefix: U # Gate count = 1 # DEF CS8406_HW-CSS U 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: CS8406_HW F0 "U" -700 1050 50 H V L B F1 "CS8406_HW-CSS" -700 -1225 50 H V L B F2 "cirrus-2-SO28W" 0 150 50 H I C C DRAW P 2 1 0 0 -700 1000 700 1000 P 2 1 0 0 700 1000 700 -1100 P 2 1 0 0 700 -1100 -700 -1100 P 2 1 0 0 -700 -1100 -700 1000 P 2 1 0 0 -612 -356 -450 -356 P 2 1 0 0 -606 -556 -393 -556 P 2 1 0 0 -612 -656 -362 -656 P 2 1 0 0 556 843 593 843 X APMS 10 -900 -200 200 R 40 40 1 1 I X AUDIO 19 -900 -700 200 R 40 40 1 1 I X CEN 16 -900 -500 200 R 40 40 1 1 I X COPY/C 1 900 200 200 L 40 40 1 1 I X EMPH 3 -900 -600 200 R 40 40 1 1 I X GND 22 0 -1300 200 U 40 40 1 1 W X H/S 24 900 800 200 L 40 40 1 1 I X HWCK0 20 -900 100 200 R 40 40 1 1 I X HWCK1 27 -900 200 200 R 40 40 1 1 I X ILRCK 12 -900 800 200 R 40 40 1 1 B X ISCLK 13 -900 700 200 R 40 40 1 1 B X OMCK 21 -900 400 200 R 40 40 1 1 I X ORIG 28 -900 -800 200 R 40 40 1 1 I X RST 9 -900 -400 200 R 40 40 1 1 I X SDIN 14 -900 600 200 R 40 40 1 1 I X SFMT0 4 -900 0 200 R 40 40 1 1 I X SFMT1 5 -900 -100 200 R 40 40 1 1 I X TCBL 15 -900 -900 200 R 40 40 1 1 B X TCBLD 11 -900 -300 200 R 40 40 1 1 I X TEST 2 900 -700 200 L 40 40 1 1 B X TEST@7 7 900 -800 200 L 40 40 1 1 B X TEST@8 8 900 -900 200 L 40 40 1 1 B X TXN 25 900 400 200 L 40 40 1 1 O X TXP 26 900 600 200 L 40 40 1 1 O X U 18 900 -100 200 L 40 40 1 1 I X V 17 900 -400 200 L 40 40 1 1 I X VD 6 -100 1200 200 D 40 40 1 1 W X VL 23 100 1200 200 D 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: CS8406_HW-CZZ # Package Name: TSSOP28L # Dev Tech: '' # Dev Prefix: U # Gate count = 1 # DEF CS8406_HW-CZZ U 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: CS8406_HW F0 "U" -700 1050 50 H V L B F1 "CS8406_HW-CZZ" -700 -1225 50 H V L B F2 "cirrus-2-TSSOP28L" 0 150 50 H I C C DRAW P 2 1 0 0 -700 1000 700 1000 P 2 1 0 0 700 1000 700 -1100 P 2 1 0 0 700 -1100 -700 -1100 P 2 1 0 0 -700 -1100 -700 1000 P 2 1 0 0 -612 -356 -450 -356 P 2 1 0 0 -606 -556 -393 -556 P 2 1 0 0 -612 -656 -362 -656 P 2 1 0 0 556 843 593 843 X APMS 10 -900 -200 200 R 40 40 1 1 I X AUDIO 19 -900 -700 200 R 40 40 1 1 I X CEN 16 -900 -500 200 R 40 40 1 1 I X COPY/C 1 900 200 200 L 40 40 1 1 I X EMPH 3 -900 -600 200 R 40 40 1 1 I X GND 22 0 -1300 200 U 40 40 1 1 W X H/S 24 900 800 200 L 40 40 1 1 I X HWCK0 20 -900 100 200 R 40 40 1 1 I X HWCK1 27 -900 200 200 R 40 40 1 1 I X ILRCK 12 -900 800 200 R 40 40 1 1 B X ISCLK 13 -900 700 200 R 40 40 1 1 B X OMCK 21 -900 400 200 R 40 40 1 1 I X ORIG 28 -900 -800 200 R 40 40 1 1 I X RST 9 -900 -400 200 R 40 40 1 1 I X SDIN 14 -900 600 200 R 40 40 1 1 I X SFMT0 4 -900 0 200 R 40 40 1 1 I X SFMT1 5 -900 -100 200 R 40 40 1 1 I X TCBL 15 -900 -900 200 R 40 40 1 1 B X TCBLD 11 -900 -300 200 R 40 40 1 1 I X TEST 2 900 -700 200 L 40 40 1 1 B X TEST@7 7 900 -800 200 L 40 40 1 1 B X TEST@8 8 900 -900 200 L 40 40 1 1 B X TXN 25 900 400 200 L 40 40 1 1 O X TXP 26 900 600 200 L 40 40 1 1 O X U 18 900 -100 200 L 40 40 1 1 I X V 17 900 -400 200 L 40 40 1 1 I X VD 6 -100 1200 200 D 40 40 1 1 W X VL 23 100 1200 200 D 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: CS8406_SW-CSS # Package Name: SO28W # Dev Tech: '' # Dev Prefix: U # Gate count = 1 # DEF CS8406_SW-CSS U 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: CS8406_SW F0 "U" -700 1050 50 H V L B F1 "CS8406_SW-CSS" -700 -1225 50 H V L B F2 "cirrus-2-SO28W" 0 150 50 H I C C DRAW P 2 1 0 0 -700 1000 700 1000 P 2 1 0 0 700 1000 700 -1100 P 2 1 0 0 700 -1100 -700 -1100 P 2 1 0 0 -700 -1100 -700 1000 P 2 1 0 0 -612 -656 -450 -656 P 2 1 0 0 556 43 593 43 P 2 1 0 0 -387 -156 -287 -156 X AD0/CS 2 -900 -200 200 R 40 40 1 1 I X AD1/CDIN 27 -900 -300 200 R 40 40 1 1 I X AD2 3 -900 -400 200 R 40 40 1 1 I X GND 22 0 -1300 200 U 40 40 1 1 W X H/S 24 900 0 200 L 40 40 1 1 I X ILRCK 12 -900 600 200 R 40 40 1 1 B X INT 19 -900 -800 200 R 40 40 1 1 O X ISCLK 13 -900 500 200 R 40 40 1 1 B X OMCK 21 -900 100 200 R 40 40 1 1 I X RST 9 -900 -700 200 R 40 40 1 1 I X RXP 4 -900 800 200 R 40 40 1 1 I X SCL/CCLK 28 -900 -500 200 R 40 40 1 1 I X SDA/CDOUT 1 -900 -600 200 R 40 40 1 1 B X SDIN 14 -900 400 200 R 40 40 1 1 I X TCBL 15 -900 -900 200 R 40 40 1 1 B X TEST 5 900 -300 200 L 40 40 1 1 B X TEST@7 7 900 -400 200 L 40 40 1 1 B X TEST@8 8 900 -500 200 L 40 40 1 1 B X TEST@10 10 900 -600 200 L 40 40 1 1 B X TEST@11 11 900 -700 200 L 40 40 1 1 B X TEST@16 16 900 -800 200 L 40 40 1 1 B X TEST@17 17 900 -900 200 L 40 40 1 1 B X TEST@18 18 900 -1000 200 L 40 40 1 1 B X TXN 25 900 600 200 L 40 40 1 1 O X TXP 26 900 800 200 L 40 40 1 1 O X U 20 900 300 200 L 40 40 1 1 I X VD 6 -100 1200 200 D 40 40 1 1 W X VL 23 100 1200 200 D 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: CS8406_SW-CZZ # Package Name: TSSOP28L # Dev Tech: '' # Dev Prefix: U # Gate count = 1 # DEF CS8406_SW-CZZ U 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: CS8406_SW F0 "U" -700 1050 50 H V L B F1 "CS8406_SW-CZZ" -700 -1225 50 H V L B F2 "cirrus-2-TSSOP28L" 0 150 50 H I C C DRAW P 2 1 0 0 -700 1000 700 1000 P 2 1 0 0 700 1000 700 -1100 P 2 1 0 0 700 -1100 -700 -1100 P 2 1 0 0 -700 -1100 -700 1000 P 2 1 0 0 -612 -656 -450 -656 P 2 1 0 0 556 43 593 43 P 2 1 0 0 -387 -156 -287 -156 X AD0/CS 2 -900 -200 200 R 40 40 1 1 I X AD1/CDIN 27 -900 -300 200 R 40 40 1 1 I X AD2 3 -900 -400 200 R 40 40 1 1 I X GND 22 0 -1300 200 U 40 40 1 1 W X H/S 24 900 0 200 L 40 40 1 1 I X ILRCK 12 -900 600 200 R 40 40 1 1 B X INT 19 -900 -800 200 R 40 40 1 1 O X ISCLK 13 -900 500 200 R 40 40 1 1 B X OMCK 21 -900 100 200 R 40 40 1 1 I X RST 9 -900 -700 200 R 40 40 1 1 I X RXP 4 -900 800 200 R 40 40 1 1 I X SCL/CCLK 28 -900 -500 200 R 40 40 1 1 I X SDA/CDOUT 1 -900 -600 200 R 40 40 1 1 B X SDIN 14 -900 400 200 R 40 40 1 1 I X TCBL 15 -900 -900 200 R 40 40 1 1 B X TEST 5 900 -300 200 L 40 40 1 1 B X TEST@7 7 900 -400 200 L 40 40 1 1 B X TEST@8 8 900 -500 200 L 40 40 1 1 B X TEST@10 10 900 -600 200 L 40 40 1 1 B X TEST@11 11 900 -700 200 L 40 40 1 1 B X TEST@16 16 900 -800 200 L 40 40 1 1 B X TEST@17 17 900 -900 200 L 40 40 1 1 B X TEST@18 18 900 -1000 200 L 40 40 1 1 B X TXN 25 900 600 200 L 40 40 1 1 O X TXP 26 900 800 200 L 40 40 1 1 O X U 20 900 300 200 L 40 40 1 1 I X VD 6 -100 1200 200 D 40 40 1 1 W X VL 23 100 1200 200 D 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: CS8952EB # Package Name: TQFP100 # Dev Tech: '' # Dev Prefix: U # Gate count = 1 # DEF CS8952EB U 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: CS8952EB F0 "U" -1600 2550 50 H V L B F1 "CS8952EB" -300 0 50 H V L B F2 "cirrus-2-TQFP100" 0 150 50 H I C C DRAW P 2 1 0 0 -1600 2500 1600 2500 P 2 1 0 0 1600 2500 1600 -2500 P 2 1 0 0 1600 -2500 -1600 -2500 P 2 1 0 0 -1600 -2500 -1600 2500 P 2 1 0 0 -1506 43 -1187 43 P 2 1 0 0 -1506 -356 -1187 -356 T 1 -698 2266 60 0 1 0 VDD_MII T 1 -298 2333 60 0 1 0 VDD T 1 -598 2266 60 0 1 0 VDD_MII T 1 -198 2333 60 0 1 0 VDD T 1 -98 2333 60 0 1 0 VDD T 1 1 2333 60 0 1 0 VDD T 1 101 2333 60 0 1 0 VDD T 1 201 2333 60 0 1 0 VDD T 1 301 2333 60 0 1 0 VDD T 1 401 2333 60 0 1 0 VDD T 1 501 2333 60 0 1 0 VDD T 1 601 2333 60 0 1 0 VDD T 1 -898 -2196 60 0 1 0 VSS_MII T 1 -498 -2316 60 0 1 0 VSS T 0 1407 -1801 60 0 1 0 RSVD T 1 -798 -2196 60 0 1 0 VSS_MII T 1 -398 -2316 60 0 1 0 VSS T 1 -298 -2316 60 0 1 0 VSS T 1 -198 -2316 60 0 1 0 VSS T 1 -98 -2316 60 0 1 0 VSS T 1 1 -2316 60 0 1 0 VSS T 1 101 -2316 60 0 1 0 VSS T 1 201 -2316 60 0 1 0 VSS T 1 301 -2316 60 0 1 0 VSS T 1 401 -2316 60 0 1 0 VSS T 1 501 -2316 60 0 1 0 VSS T 1 601 -2316 60 0 1 0 VSS T 1 701 -2316 60 0 1 0 VSS T 1 801 -2316 60 0 1 0 VSS T 1 901 -2316 60 0 1 0 VSS T 1 1001 -2316 60 0 1 0 VSS T 1 1101 -2316 60 0 1 0 VSS T 0 1407 -1901 60 0 1 0 RSVD T 0 1407 -2001 60 0 1 0 RSVD T 0 1407 -2101 60 0 1 0 RSVD T 0 1407 -2201 60 0 1 0 RSVD T 0 1407 -2301 60 0 1 0 RSVD X 10BT_SER 23 -1800 -300 200 R 40 40 1 1 B X AN0 57 -1800 -1200 200 R 40 40 1 1 B X AN1 58 -1800 -1300 200 R 40 40 1 1 B X BP4B5B 56 -1800 -700 200 R 40 40 1 1 B X BPALIGN 52 -1800 -600 200 R 40 40 1 1 B X BPSCR 62 -1800 -800 200 R 40 40 1 1 B X CLK25 17 -1800 -2000 200 R 40 40 1 1 O X COL/PHYAD0 48 -1800 300 200 R 40 40 1 1 O X CRS/PHYAD2 49 -1800 200 200 R 40 40 1 1 B X ISODEF 63 -1800 -900 200 R 40 40 1 1 B X LED1 69 1800 -100 200 L 40 40 1 1 O X LED2 70 1800 -200 200 L 40 40 1 1 O X LED3 71 1800 -300 200 L 40 40 1 1 O X LED4 72 1800 -400 200 L 40 40 1 1 O X LED5 73 1800 -500 200 L 40 40 1 1 O X LPBK 51 -1800 -500 200 R 40 40 1 1 I X LPSTRT 50 -1800 -400 200 R 40 40 1 1 I X MDC 28 -1800 2300 200 R 40 40 1 1 I X MDIO 27 -1800 2200 200 R 40 40 1 1 B X MII_IRQ 26 -1800 0 200 R 40 40 1 1 O X PWRDN 64 -1800 -1000 200 R 40 40 1 1 I X REPEATER 16 -1800 -200 200 R 40 40 1 1 B X RES 86 1800 -1100 200 L 40 40 1 1 B X RESET 15 -1800 -1800 200 R 40 40 1 1 I X RSVD 74 1800 -1700 200 L 40 40 1 1 W X RSVD1 75 1800 -1800 200 L 40 40 1 1 W X RSVD2 76 1800 -1900 200 L 40 40 1 1 W X RSVD3 77 1800 -2000 200 L 40 40 1 1 W X RSVD4 84 1800 -2100 200 L 40 40 1 1 W X RSVD5 98 1800 -2200 200 L 40 40 1 1 W X RSVD6 99 1800 -2300 200 L 40 40 1 1 W X RX+ 91 1800 2300 200 L 40 40 1 1 I X RX- 92 1800 2100 200 L 40 40 1 1 I X RXD0 32 -1800 1200 200 R 40 40 1 1 O X RXD1/PHYAD1 31 -1800 1100 200 R 40 40 1 1 O X RXD2 30 -1800 1000 200 R 40 40 1 1 O X RXD3/PHYAD3 29 -1800 900 200 R 40 40 1 1 O X RX_CLK 36 -1800 500 200 R 40 40 1 1 O X RX_DV/MII_DRV 33 -1800 700 200 R 40 40 1 1 B X RX_EN 14 -1800 600 200 R 40 40 1 1 B X RX_ER/PHYAD4/RXD4 37 -1800 800 200 R 40 40 1 1 B X RX_NRZ+ 7 1800 1400 200 L 40 40 1 1 B X RX_NRZ- 6 1800 1200 200 L 40 40 1 1 B X SIGNAL+ 9 1800 1000 200 L 40 40 1 1 B X SIGNAL- 8 1800 800 200 L 40 40 1 1 B X SPD10 68 1800 -800 200 L 40 40 1 1 O X SPD100 67 1800 -700 200 L 40 40 1 1 O X TCM 59 -1800 -1400 200 R 40 40 1 1 I X TEST0 24 1800 -1400 200 L 40 40 1 1 B X TEST1 25 1800 -1500 200 L 40 40 1 1 I X TX+ 80 1800 1900 200 L 40 40 1 1 O X TX- 81 1800 1700 200 L 40 40 1 1 O X TXD0 44 -1800 2000 200 R 40 40 1 1 I X TXD1 45 -1800 1900 200 R 40 40 1 1 I X TXD2 46 -1800 1800 200 R 40 40 1 1 I X TXD3 47 -1800 1700 200 R 40 40 1 1 I X TXER/TXD4 38 -1800 1600 200 R 40 40 1 1 B X TXSLEW0 60 -1800 -1500 200 R 40 40 1 1 I X TXSLEW1 61 -1800 -1600 200 R 40 40 1 1 I X TX_CLK 42 -1800 1400 200 R 40 40 1 1 B X TX_EN 43 -1800 1500 200 R 40 40 1 1 I X TX_NRZ+ 5 1800 600 200 L 40 40 1 1 B X TX_NRZ- 4 1800 400 200 L 40 40 1 1 B X VDD 2 -400 2700 200 D 40 40 1 1 W X VDD1 11 -300 2700 200 D 40 40 1 1 W X VDD2 19 -200 2700 200 D 40 40 1 1 W X VDD3 40 -100 2700 200 D 40 40 1 1 W X VDD4 54 0 2700 200 D 40 40 1 1 W X VDD5 79 100 2700 200 D 40 40 1 1 W X VDD6 82 200 2700 200 D 40 40 1 1 W X VDD7 88 300 2700 200 D 40 40 1 1 W X VDD8 89 400 2700 200 D 40 40 1 1 W X VDD9 94 500 2700 200 D 40 40 1 1 W X VDD10 100 600 2700 200 D 40 40 1 1 W X VDD_MII 21 -800 2700 200 D 40 40 1 1 W X VDD_MII1 34 -700 2700 200 D 40 40 1 1 W X VDD_MII2 66 -600 2700 200 D 40 40 1 1 W X VSS 1 -600 -2700 200 U 40 40 1 1 W X VSS1 3 -500 -2700 200 U 40 40 1 1 W X VSS2 10 -400 -2700 200 U 40 40 1 1 W X VSS3 12 -300 -2700 200 U 40 40 1 1 W X VSS4 13 -200 -2700 200 U 40 40 1 1 W X VSS5 18 -100 -2700 200 U 40 40 1 1 W X VSS6 20 0 -2700 200 U 40 40 1 1 W X VSS7 87 100 -2700 200 U 40 40 1 1 W X VSS8 90 200 -2700 200 U 40 40 1 1 W X VSS9 39 300 -2700 200 U 40 40 1 1 W X VSS10 41 400 -2700 200 U 40 40 1 1 W X VSS11 53 500 -2700 200 U 40 40 1 1 W X VSS12 55 600 -2700 200 U 40 40 1 1 W X VSS13 93 700 -2700 200 U 40 40 1 1 W X VSS14 78 800 -2700 200 U 40 40 1 1 W X VSS15 83 900 -2700 200 U 40 40 1 1 W X VSS16 85 1000 -2700 200 U 40 40 1 1 W X VSS17 95 1100 -2700 200 U 40 40 1 1 W X VSS_MII 22 -1000 -2700 200 U 40 40 1 1 W X VSS_MII1 35 -900 -2700 200 U 40 40 1 1 W X VSS_MII2 65 -800 -2700 200 U 40 40 1 1 W X XTAL_I 96 -1800 -2300 200 R 40 40 1 1 P X XTAL_O 97 -1800 -2200 200 R 40 40 1 1 P ENDDRAW ENDDEF #End Library