EESchema-LIBRARY Version 2.3 29/04/2008-12:21:43 # Converted with eagle2kicad.ulp Version 0.9 # Device count = 8 # # Dev Name: MX165CDW # Package Name: SO24W # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF MX165CDW IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: MX165 F0 "IC" -800 950 50 H V L B F1 "MX165CDW" -800 -1025 50 H V L B F2 "cml-micro-SO24W" 0 150 50 H I C C DRAW P 2 1 0 0 800 900 -800 900 P 2 1 0 0 -800 900 -800 -900 P 2 1 0 0 -800 -900 800 -900 P 2 1 0 0 800 -900 800 900 P 2 1 0 0 -710 140 -112 140 P 2 1 0 0 -435 40 -162 40 P 2 1 0 0 -541 -60 -443 -60 P 2 1 0 0 -428 -360 -168 -360 P 2 1 0 0 -710 -760 -500 -760 P 2 1 0 0 -710 740 -112 740 X D0 10 -1000 300 200 R 40 40 1 1 I X D1 9 -1000 400 200 R 40 40 1 1 I X D2/SER_CLOCK 8 -1000 500 200 R 40 40 1 1 I X D3/SER_IN 7 -1000 600 200 R 40 40 1 1 I X D4/SER_EN_2 6 -1000 700 200 R 40 40 1 1 I X D5/SER_EN_1 5 -1000 800 200 R 40 40 1 1 I X DEC_COMP_IN 14 1000 -500 200 L 40 40 1 1 I X DEC_COMP_REF 12 1000 -600 200 L 40 40 1 1 I X LOAD/LATCH 4 -1000 0 200 R 40 40 1 1 I X PTL 18 -1000 -200 200 R 40 40 1 1 I X RX/TX 17 -1000 -100 200 R 40 40 1 1 I X RX_AUD_IN 23 1000 500 200 L 40 40 1 1 I X RX_AUD_OUT 19 1000 400 200 L 40 40 1 1 O X RX_TONE_DEC 13 -1000 100 200 R 40 40 1 1 O X RX_TONE_DET 15 1000 -100 200 L 40 40 1 1 O X TONE_IN 24 1000 700 200 L 40 40 1 1 I X TONE_OUT 16 1000 800 200 L 40 40 1 1 O X TX_AUD_IN 22 1000 200 200 L 40 40 1 1 I X TX_AUD_OUT 20 1000 100 200 L 40 40 1 1 O X VBIAS 21 1000 -800 200 L 40 40 1 1 I X XTAL 3 -1000 -800 200 R 40 40 1 1 O X XTAL/CLOCK 2 -1000 -400 200 R 40 40 1 1 I # Gate Name: P # Symbol Name: VDDVSS T 0 10 130 60 0 2 0 VDD T 0 10 -140 60 0 2 0 VSS X VDD 1 0 300 100 D 40 40 2 1 W X VSS 11 0 -300 100 U 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: MX165CP # Package Name: DIL24-6 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF MX165CP IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: MX165 F0 "IC" -800 950 50 H V L B F1 "MX165CP" -800 -1025 50 H V L B F2 "cml-micro-DIL24-6" 0 150 50 H I C C DRAW P 2 1 0 0 800 900 -800 900 P 2 1 0 0 -800 900 -800 -900 P 2 1 0 0 -800 -900 800 -900 P 2 1 0 0 800 -900 800 900 P 2 1 0 0 -710 140 -112 140 P 2 1 0 0 -435 40 -162 40 P 2 1 0 0 -541 -60 -443 -60 P 2 1 0 0 -428 -360 -168 -360 P 2 1 0 0 -710 -760 -500 -760 P 2 1 0 0 -710 740 -112 740 X D0 10 -1000 300 200 R 40 40 1 1 I X D1 9 -1000 400 200 R 40 40 1 1 I X D2/SER_CLOCK 8 -1000 500 200 R 40 40 1 1 I X D3/SER_IN 7 -1000 600 200 R 40 40 1 1 I X D4/SER_EN_2 6 -1000 700 200 R 40 40 1 1 I X D5/SER_EN_1 5 -1000 800 200 R 40 40 1 1 I X DEC_COMP_IN 14 1000 -500 200 L 40 40 1 1 I X DEC_COMP_REF 12 1000 -600 200 L 40 40 1 1 I X LOAD/LATCH 4 -1000 0 200 R 40 40 1 1 I X PTL 18 -1000 -200 200 R 40 40 1 1 I X RX/TX 17 -1000 -100 200 R 40 40 1 1 I X RX_AUD_IN 23 1000 500 200 L 40 40 1 1 I X RX_AUD_OUT 19 1000 400 200 L 40 40 1 1 O X RX_TONE_DEC 13 -1000 100 200 R 40 40 1 1 O X RX_TONE_DET 15 1000 -100 200 L 40 40 1 1 O X TONE_IN 24 1000 700 200 L 40 40 1 1 I X TONE_OUT 16 1000 800 200 L 40 40 1 1 O X TX_AUD_IN 22 1000 200 200 L 40 40 1 1 I X TX_AUD_OUT 20 1000 100 200 L 40 40 1 1 O X VBIAS 21 1000 -800 200 L 40 40 1 1 I X XTAL 3 -1000 -800 200 R 40 40 1 1 O X XTAL/CLOCK 2 -1000 -400 200 R 40 40 1 1 I # Gate Name: P # Symbol Name: VDDVSS T 0 10 130 60 0 2 0 VDD T 0 10 -140 60 0 2 0 VSS X VDD 1 0 300 100 D 40 40 2 1 W X VSS 11 0 -300 100 U 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: MX165CTN # Package Name: TSSOP24 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF MX165CTN IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: MX165 F0 "IC" -800 950 50 H V L B F1 "MX165CTN" -800 -1025 50 H V L B F2 "cml-micro-TSSOP24" 0 150 50 H I C C DRAW P 2 1 0 0 800 900 -800 900 P 2 1 0 0 -800 900 -800 -900 P 2 1 0 0 -800 -900 800 -900 P 2 1 0 0 800 -900 800 900 P 2 1 0 0 -710 140 -112 140 P 2 1 0 0 -435 40 -162 40 P 2 1 0 0 -541 -60 -443 -60 P 2 1 0 0 -428 -360 -168 -360 P 2 1 0 0 -710 -760 -500 -760 P 2 1 0 0 -710 740 -112 740 X D0 10 -1000 300 200 R 40 40 1 1 I X D1 9 -1000 400 200 R 40 40 1 1 I X D2/SER_CLOCK 8 -1000 500 200 R 40 40 1 1 I X D3/SER_IN 7 -1000 600 200 R 40 40 1 1 I X D4/SER_EN_2 6 -1000 700 200 R 40 40 1 1 I X D5/SER_EN_1 5 -1000 800 200 R 40 40 1 1 I X DEC_COMP_IN 14 1000 -500 200 L 40 40 1 1 I X DEC_COMP_REF 12 1000 -600 200 L 40 40 1 1 I X LOAD/LATCH 4 -1000 0 200 R 40 40 1 1 I X PTL 18 -1000 -200 200 R 40 40 1 1 I X RX/TX 17 -1000 -100 200 R 40 40 1 1 I X RX_AUD_IN 23 1000 500 200 L 40 40 1 1 I X RX_AUD_OUT 19 1000 400 200 L 40 40 1 1 O X RX_TONE_DEC 13 -1000 100 200 R 40 40 1 1 O X RX_TONE_DET 15 1000 -100 200 L 40 40 1 1 O X TONE_IN 24 1000 700 200 L 40 40 1 1 I X TONE_OUT 16 1000 800 200 L 40 40 1 1 O X TX_AUD_IN 22 1000 200 200 L 40 40 1 1 I X TX_AUD_OUT 20 1000 100 200 L 40 40 1 1 O X VBIAS 21 1000 -800 200 L 40 40 1 1 I X XTAL 3 -1000 -800 200 R 40 40 1 1 O X XTAL/CLOCK 2 -1000 -400 200 R 40 40 1 1 I # Gate Name: P # Symbol Name: VDDVSS T 0 10 130 60 0 2 0 VDD T 0 10 -140 60 0 2 0 VSS X VDD 1 0 300 100 D 40 40 2 1 W X VSS 11 0 -300 100 U 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: MX315ADW # Package Name: SO16W # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF MX315ADW IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: MX315 F0 "IC" -500 550 50 H V L B F1 "MX315ADW" -500 -625 50 H V L B F2 "cml-micro-SO16W" 0 150 50 H I C C DRAW P 2 1 0 0 500 500 -500 500 P 2 1 0 0 -500 500 -500 -500 P 2 1 0 0 -500 -500 500 -500 P 2 1 0 0 500 -500 500 500 P 2 1 0 0 -403 -360 -25 -360 P 2 1 0 0 183 -360 393 -360 X D0 4 -700 -100 200 R 40 40 1 1 I X D1 3 -700 0 200 R 40 40 1 1 I X D2 2 -700 100 200 R 40 40 1 1 I X D3 1 -700 200 200 R 40 40 1 1 I X D4 5 -700 300 200 R 40 40 1 1 I X D5 6 -700 400 200 R 40 40 1 1 I X TONE 13 700 400 200 L 40 40 1 1 I X TX_EN_H 15 -700 -300 200 R 40 40 1 1 I X TX_EN_L 14 -700 -400 200 R 40 40 1 1 I X XTAL 9 700 -400 200 L 40 40 1 1 O X XTAL/CLOCK 8 700 0 200 L 40 40 1 1 I # Gate Name: P # Symbol Name: VDDVSS T 0 10 130 60 0 2 0 VDD T 0 10 -140 60 0 2 0 VSS X VDD 16 0 300 100 D 40 40 2 1 W X VSS 7 0 -300 100 U 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: MX315AJ # Package Name: DIL14 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF MX315AJ IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: MX315 F0 "IC" -500 550 50 H V L B F1 "MX315AJ" -500 -625 50 H V L B F2 "cml-micro-DIL14" 0 150 50 H I C C DRAW P 2 1 0 0 500 500 -500 500 P 2 1 0 0 -500 500 -500 -500 P 2 1 0 0 -500 -500 500 -500 P 2 1 0 0 500 -500 500 500 P 2 1 0 0 -403 -360 -25 -360 P 2 1 0 0 183 -360 393 -360 X D0 4 -700 -100 200 R 40 40 1 1 I X D1 3 -700 0 200 R 40 40 1 1 I X D2 2 -700 100 200 R 40 40 1 1 I X D3 1 -700 200 200 R 40 40 1 1 I X D4 5 -700 300 200 R 40 40 1 1 I X D5 6 -700 400 200 R 40 40 1 1 I X TONE 11 700 400 200 L 40 40 1 1 I X TX_EN_H 13 -700 -300 200 R 40 40 1 1 I X TX_EN_L 12 -700 -400 200 R 40 40 1 1 I X XTAL 9 700 -400 200 L 40 40 1 1 O X XTAL/CLOCK 8 700 0 200 L 40 40 1 1 I # Gate Name: P # Symbol Name: VDDVSS T 0 10 130 60 0 2 0 VDD T 0 10 -140 60 0 2 0 VSS X VDD 14 0 300 100 D 40 40 2 1 W X VSS 7 0 -300 100 U 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: MX828DS # Package Name: SSOP24 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF MX828DS IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: MX828 F0 "IC" -800 1150 50 H V L B F1 "MX828DS" -800 -1225 50 H V L B F2 "cml-micro-SSOP24" 0 150 50 H I C C DRAW P 2 1 0 0 800 1100 -800 1100 P 2 1 0 0 -800 1100 -800 -1100 P 2 1 0 0 -800 -1100 800 -1100 P 2 1 0 0 800 -1100 800 1100 P 2 1 0 0 -710 -660 -500 -660 P 2 1 0 0 -710 740 -606 740 P 2 1 0 0 -710 540 -568 540 X A/D_CAP1 10 -1000 -900 200 R 40 40 1 1 O X A/D_CAP2 11 -1000 -1000 200 R 40 40 1 1 O X COMMAND_DATA 4 -1000 900 200 R 40 40 1 1 B X COMP_IN 9 -1000 200 200 R 40 40 1 1 I X COMP_OUT 8 -1000 0 200 R 40 40 1 1 O X CS 6 -1000 700 200 R 40 40 1 1 B X IRQ 7 -1000 500 200 R 40 40 1 1 O X MOD1 22 1000 200 200 L 40 40 1 1 O X MOD1_IN 20 1000 0 200 L 40 40 1 1 I X MOD2 23 1000 400 200 L 40 40 1 1 O X REPLY_DATA 5 -1000 1000 200 R 40 40 1 1 B X RX_AMP_IN 14 1000 800 200 L 40 40 1 1 I X RX_AMP_OUT 15 1000 1000 200 L 40 40 1 1 O X RX_AUD_OUT 16 1000 600 200 L 40 40 1 1 O X SERIAL_CLOCK 3 -1000 800 200 R 40 40 1 1 B X SUM_IN 18 1000 -400 200 L 40 40 1 1 I X SUM_OUT 19 1000 -200 200 L 40 40 1 1 O X TX_AUD_OUT 17 1000 -600 200 L 40 40 1 1 O X TX_SUB_AUD_OUT 21 1000 -800 200 L 40 40 1 1 O X VBIAS 13 1000 -1000 200 L 40 40 1 1 I X XTAL 1 -1000 -700 200 R 40 40 1 1 O X XTAL/CLOCK 2 -1000 -300 200 R 40 40 1 1 I # Gate Name: P # Symbol Name: VDDVSS T 0 10 130 60 0 2 0 VDD T 0 10 -140 60 0 2 0 VSS X VDD 24 0 300 100 D 40 40 2 1 W X VSS 12 0 -300 100 U 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: MX828DW # Package Name: SO24W # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF MX828DW IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: MX828 F0 "IC" -800 1150 50 H V L B F1 "MX828DW" -800 -1225 50 H V L B F2 "cml-micro-SO24W" 0 150 50 H I C C DRAW P 2 1 0 0 800 1100 -800 1100 P 2 1 0 0 -800 1100 -800 -1100 P 2 1 0 0 -800 -1100 800 -1100 P 2 1 0 0 800 -1100 800 1100 P 2 1 0 0 -710 -660 -500 -660 P 2 1 0 0 -710 740 -606 740 P 2 1 0 0 -710 540 -568 540 X A/D_CAP1 10 -1000 -900 200 R 40 40 1 1 O X A/D_CAP2 11 -1000 -1000 200 R 40 40 1 1 O X COMMAND_DATA 4 -1000 900 200 R 40 40 1 1 B X COMP_IN 9 -1000 200 200 R 40 40 1 1 I X COMP_OUT 8 -1000 0 200 R 40 40 1 1 O X CS 6 -1000 700 200 R 40 40 1 1 B X IRQ 7 -1000 500 200 R 40 40 1 1 O X MOD1 22 1000 200 200 L 40 40 1 1 O X MOD1_IN 20 1000 0 200 L 40 40 1 1 I X MOD2 23 1000 400 200 L 40 40 1 1 O X REPLY_DATA 5 -1000 1000 200 R 40 40 1 1 B X RX_AMP_IN 14 1000 800 200 L 40 40 1 1 I X RX_AMP_OUT 15 1000 1000 200 L 40 40 1 1 O X RX_AUD_OUT 16 1000 600 200 L 40 40 1 1 O X SERIAL_CLOCK 3 -1000 800 200 R 40 40 1 1 B X SUM_IN 18 1000 -400 200 L 40 40 1 1 I X SUM_OUT 19 1000 -200 200 L 40 40 1 1 O X TX_AUD_OUT 17 1000 -600 200 L 40 40 1 1 O X TX_SUB_AUD_OUT 21 1000 -800 200 L 40 40 1 1 O X VBIAS 13 1000 -1000 200 L 40 40 1 1 I X XTAL 1 -1000 -700 200 R 40 40 1 1 O X XTAL/CLOCK 2 -1000 -300 200 R 40 40 1 1 I # Gate Name: P # Symbol Name: VDDVSS T 0 10 130 60 0 2 0 VDD T 0 10 -140 60 0 2 0 VSS X VDD 24 0 300 100 D 40 40 2 1 W X VSS 12 0 -300 100 U 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: MX828P # Package Name: DIL24-6 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF MX828P IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: MX828 F0 "IC" -800 1150 50 H V L B F1 "MX828P" -800 -1225 50 H V L B F2 "cml-micro-DIL24-6" 0 150 50 H I C C DRAW P 2 1 0 0 800 1100 -800 1100 P 2 1 0 0 -800 1100 -800 -1100 P 2 1 0 0 -800 -1100 800 -1100 P 2 1 0 0 800 -1100 800 1100 P 2 1 0 0 -710 -660 -500 -660 P 2 1 0 0 -710 740 -606 740 P 2 1 0 0 -710 540 -568 540 X A/D_CAP1 10 -1000 -900 200 R 40 40 1 1 O X A/D_CAP2 11 -1000 -1000 200 R 40 40 1 1 O X COMMAND_DATA 4 -1000 900 200 R 40 40 1 1 B X COMP_IN 9 -1000 200 200 R 40 40 1 1 I X COMP_OUT 8 -1000 0 200 R 40 40 1 1 O X CS 6 -1000 700 200 R 40 40 1 1 B X IRQ 7 -1000 500 200 R 40 40 1 1 O X MOD1 22 1000 200 200 L 40 40 1 1 O X MOD1_IN 20 1000 0 200 L 40 40 1 1 I X MOD2 23 1000 400 200 L 40 40 1 1 O X REPLY_DATA 5 -1000 1000 200 R 40 40 1 1 B X RX_AMP_IN 14 1000 800 200 L 40 40 1 1 I X RX_AMP_OUT 15 1000 1000 200 L 40 40 1 1 O X RX_AUD_OUT 16 1000 600 200 L 40 40 1 1 O X SERIAL_CLOCK 3 -1000 800 200 R 40 40 1 1 B X SUM_IN 18 1000 -400 200 L 40 40 1 1 I X SUM_OUT 19 1000 -200 200 L 40 40 1 1 O X TX_AUD_OUT 17 1000 -600 200 L 40 40 1 1 O X TX_SUB_AUD_OUT 21 1000 -800 200 L 40 40 1 1 O X VBIAS 13 1000 -1000 200 L 40 40 1 1 I X XTAL 1 -1000 -700 200 R 40 40 1 1 O X XTAL/CLOCK 2 -1000 -300 200 R 40 40 1 1 I # Gate Name: P # Symbol Name: VDDVSS T 0 10 130 60 0 2 0 VDD T 0 10 -140 60 0 2 0 VSS X VDD 24 0 300 100 D 40 40 2 1 W X VSS 12 0 -300 100 U 40 40 2 1 W ENDDRAW ENDDEF #End Library