EESchema-LIBRARY Version 2.3 29/04/2008-12:22:11 # Converted with eagle2kicad.ulp Version 0.9 # Device count = 3 # # Dev Name: 8051F000 # Package Name: TQFP64 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF 8051F000 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 8051F000 F0 "IC" -1000 -650 50 H V L B F1 "8051F000" -1000 -900 50 H V L B F2 "cygnal-TQFP64" 0 150 50 H I C C DRAW P 2 1 0 0 -1500 -2400 1000 -2400 P 2 1 0 0 1000 -2400 1000 100 P 2 1 0 0 1000 100 -1500 100 P 2 1 0 0 -1500 100 -1500 -2400 X /RST 20 1100 -1700 100 L 40 40 1 1 I X AGND 5 -600 -2500 100 U 40 40 1 1 W X AGND1 15 500 -2500 100 U 40 40 1 1 W X AIN0 7 -300 -2500 100 U 40 40 1 1 I X AIN1 8 -200 -2500 100 U 40 40 1 1 I X AIN2 9 -100 -2500 100 U 40 40 1 1 I X AIN3 10 0 -2500 100 U 40 40 1 1 I X AIN4 11 100 -2500 100 U 40 40 1 1 I X AIN5 12 200 -2500 100 U 40 40 1 1 I X AIN6 13 300 -2500 100 U 40 40 1 1 I X AIN7 14 400 -2500 100 U 40 40 1 1 I X AV+ 16 600 -2500 100 U 40 40 1 1 W X AV+1 17 1100 -2000 100 L 40 40 1 1 W X CP0+ 4 -800 -2500 100 U 40 40 1 1 I X CP0- 3 -900 -2500 100 U 40 40 1 1 I X CP1+ 2 -1000 -2500 100 U 40 40 1 1 I X CP1- 1 -1100 -2500 100 U 40 40 1 1 I X DAC0 64 -1600 -2000 100 R 40 40 1 1 O X DAC1 63 -1600 -1900 100 R 40 40 1 1 O X DGND 30 1100 -600 100 L 40 40 1 1 W X DGND1 41 -300 200 100 D 40 40 1 1 W X DGND2 61 -1600 -1600 100 R 40 40 1 1 W X P0.0 39 0 200 100 D 40 40 1 1 B X P0.1 42 -500 200 100 D 40 40 1 1 B X P0.2 47 -1000 200 100 D 40 40 1 1 B X P0.3 48 -1100 200 100 D 40 40 1 1 B X P0.4 49 -1600 -300 100 R 40 40 1 1 B X P0.5 50 -1600 -400 100 R 40 40 1 1 B X P0.6 55 -1600 -900 100 R 40 40 1 1 B X P0.7 56 -1600 -1000 100 R 40 40 1 1 B X P1.0 38 100 200 100 D 40 40 1 1 B X P1.1 37 200 200 100 D 40 40 1 1 B X P1.2 36 300 200 100 D 40 40 1 1 B X P1.3 35 400 200 100 D 40 40 1 1 B X P1.4 34 500 200 100 D 40 40 1 1 B X P1.5 32 1100 -300 100 L 40 40 1 1 B X P1.6 60 -1600 -1400 100 R 40 40 1 1 B X P1.7 59 -1600 -1300 100 R 40 40 1 1 B X P2.0 33 600 200 100 D 40 40 1 1 B X P2.1 27 1100 -1000 100 L 40 40 1 1 B X P2.2 54 -1600 -800 100 R 40 40 1 1 B X P2.3 53 -1600 -700 100 R 40 40 1 1 B X P2.4 52 -1600 -600 100 R 40 40 1 1 B X P2.5 51 -1600 -500 100 R 40 40 1 1 B X P2.6 44 -700 200 100 D 40 40 1 1 B X P2.7 43 -600 200 100 D 40 40 1 1 B X P3.0 26 1100 -1100 100 L 40 40 1 1 B X P3.1 25 1100 -1200 100 L 40 40 1 1 B X P3.2 24 1100 -1300 100 L 40 40 1 1 B X P3.3 23 1100 -1400 100 L 40 40 1 1 B X P3.4 58 -1600 -1200 100 R 40 40 1 1 B X P3.5 57 -1600 -1100 100 R 40 40 1 1 B X P3.6 46 -900 200 100 D 40 40 1 1 B X P3.7 45 -800 200 100 D 40 40 1 1 B X TCK 22 1100 -1500 100 L 40 40 1 1 I X TD0 29 1100 -800 100 L 40 40 1 1 O X TDI 28 1100 -900 100 L 40 40 1 1 I X TMS 21 1100 -1600 100 L 40 40 1 1 I X VDD 31 1100 -500 100 L 40 40 1 1 W X VDD1 40 -200 200 100 D 40 40 1 1 W X VDD2 62 -1600 -1700 100 R 40 40 1 1 W X VREF 6 -500 -2500 100 U 40 40 1 1 O X XTAL1 18 1100 -1900 100 L 40 40 1 1 I X XTAL2 19 1100 -1800 100 L 40 40 1 1 O ENDDRAW ENDDEF # # Dev Name: 8051F001 # Package Name: TQFP48 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF 8051F001 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 8051F001 F0 "IC" -600 350 50 H V L B F1 "8051F001" -600 200 50 H V L B F2 "cygnal-TQFP48" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 -1100 1000 -1100 P 2 1 0 0 1000 -1100 1000 1100 P 2 1 0 0 1000 1100 -1100 1100 P 2 1 0 0 -1100 1100 -1100 -1100 X /RST 16 1100 -300 100 L 40 40 1 1 I X AGND 12 500 -1200 100 U 40 40 1 1 W X AGND1 44 -1200 -200 100 R 40 40 1 1 W X AIN0 4 -300 -1200 100 U 40 40 1 1 I X AIN1 5 -200 -1200 100 U 40 40 1 1 I X AIN2 6 -100 -1200 100 U 40 40 1 1 I X AIN3 7 0 -1200 100 U 40 40 1 1 I X AIN4 8 100 -1200 100 U 40 40 1 1 I X AIN5 9 200 -1200 100 U 40 40 1 1 I X AIN6 10 300 -1200 100 U 40 40 1 1 I X AIN7 11 400 -1200 100 U 40 40 1 1 I X CP0+ 2 -600 -1200 100 U 40 40 1 1 I X CP0- 1 -700 -1200 100 U 40 40 1 1 I X CP1+ 45 -1200 -400 100 R 40 40 1 1 I X CP1- 46 -1200 -500 100 R 40 40 1 1 I X DAC0 48 -1200 -800 100 R 40 40 1 1 O X DAC1 47 -1200 -700 100 R 40 40 1 1 O X DGND 19 1100 100 100 L 40 40 1 1 W X DGND1 22 1100 400 100 L 40 40 1 1 W X DGND_P0 33 -300 1200 100 D 40 40 1 1 W X DGND_P1 27 400 1200 100 D 40 40 1 1 W X P0.0 31 -100 1200 100 D 40 40 1 1 B X P0.1 34 -400 1200 100 D 40 40 1 1 B X P0.2 35 -500 1200 100 D 40 40 1 1 B X P0.3 36 -600 1200 100 D 40 40 1 1 B X P0.4 37 -1200 700 100 R 40 40 1 1 B X P0.5 38 -1200 600 100 R 40 40 1 1 B X P0.6 39 -1200 500 100 R 40 40 1 1 B X P0.7 40 -1200 400 100 R 40 40 1 1 B X P1.0 30 100 1200 100 D 40 40 1 1 B X P1.1 29 200 1200 100 D 40 40 1 1 B X P1.2 28 300 1200 100 D 40 40 1 1 B X P1.3 26 500 1200 100 D 40 40 1 1 B X P1.4 25 600 1200 100 D 40 40 1 1 B X P1.5 24 1100 700 100 L 40 40 1 1 B X P1.6 42 -1200 100 100 R 40 40 1 1 B X P1.7 41 -1200 200 100 R 40 40 1 1 B X TCK 18 1100 0 100 L 40 40 1 1 I X TD0 21 1100 300 100 L 40 40 1 1 O X TDI 20 1100 200 100 L 40 40 1 1 I X TMS 17 1100 -100 100 L 40 40 1 1 I X VDD1 23 1100 500 100 L 40 40 1 1 W X VDDA 13 1100 -700 100 L 40 40 1 1 W X VDDA1 43 -1200 -100 100 R 40 40 1 1 W X VDD_P0 32 -200 1200 100 D 40 40 1 1 W X VREF 3 -500 -1200 100 U 40 40 1 1 O X XTAL1 14 1100 -500 100 L 40 40 1 1 I X XTAL2 15 1100 -400 100 L 40 40 1 1 O ENDDRAW ENDDEF # # Dev Name: 8051F002 # Package Name: LQFP32 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF 8051F002 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 8051F002 F0 "IC" -400 1350 50 H V L B F1 "8051F002" -400 -1100 50 H V L B F2 "cygnal-LQFP32" 0 150 50 H I C C DRAW P 2 1 0 0 -400 -1000 400 -1000 P 2 1 0 0 400 -1000 400 1300 P 2 1 0 0 400 1300 -400 1300 P 2 1 0 0 -400 1300 -400 -1000 X /RST 12 -500 300 100 R 40 40 1 1 I X AGND 8 -500 -800 100 R 40 40 1 1 W X AGND1 30 -500 -900 100 R 40 40 1 1 W X AIN0 4 500 0 100 L 40 40 1 1 I X AIN1 5 500 100 100 L 40 40 1 1 I X AIN2 6 500 200 100 L 40 40 1 1 I X AIN3 7 500 300 100 L 40 40 1 1 I X AV+ 9 -500 -500 100 R 40 40 1 1 W X AV+1 29 -500 -600 100 R 40 40 1 1 W X CP0+ 2 500 -700 100 L 40 40 1 1 I X CP0- 1 500 -800 100 L 40 40 1 1 I X DAC0 32 500 -400 100 L 40 40 1 1 O X DAC1 31 500 -500 100 L 40 40 1 1 O X DGND 17 -500 -200 100 R 40 40 1 1 W X DGND1 21 -500 -300 100 R 40 40 1 1 W X P0.0 19 500 500 100 L 40 40 1 1 B X P0.1 22 500 600 100 L 40 40 1 1 B X P0.2 23 500 700 100 L 40 40 1 1 B X P0.3 24 500 800 100 L 40 40 1 1 B X P0.4 25 500 900 100 L 40 40 1 1 B X P0.5 26 500 1000 100 L 40 40 1 1 B X P0.6 27 500 1100 100 L 40 40 1 1 B X P0.7 28 500 1200 100 L 40 40 1 1 B X TCK 14 -500 1200 100 R 40 40 1 1 I X TD0 16 -500 900 100 R 40 40 1 1 O X TDI 15 -500 1000 100 R 40 40 1 1 I X TMS 13 -500 1100 100 R 40 40 1 1 I X VDD 18 -500 100 100 R 40 40 1 1 W X VDD1 20 -500 0 100 R 40 40 1 1 W X VREF 3 500 -200 100 L 40 40 1 1 O X XTAL1 10 -500 700 100 R 40 40 1 1 I X XTAL2 11 -500 500 100 R 40 40 1 1 O ENDDRAW ENDDEF #End Library