EESchema-LIBRARY Version 2.3 29/04/2008-12:22:11 # Converted with eagle2kicad.ulp Version 0.9 # Device count = 6 # # Dev Name: C8051F30X # Package Name: MLP11 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF C8051F30X IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: C8051F30X F0 "IC" -200 1400 50 H V L B F1 "C8051F30X" -200 1200 50 H V L B F2 "cygnal_mini-MLP11" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1100 300 1100 P 2 1 0 0 300 1100 300 -900 P 2 1 0 0 300 -900 -600 -900 P 2 1 0 0 -600 -900 -600 1100 X /RST/C2CK 8 500 -700 200 L 40 40 1 1 B X GND G1 -400 -1100 200 U 40 40 1 1 W X GND1 G2 -100 -1100 200 U 40 40 1 1 W X GND2 G3 -200 -1100 200 U 40 40 1 1 W X GND3 G4 -300 -1100 200 U 40 40 1 1 W X P0.0/VREF 1 500 900 200 L 40 40 1 1 B X P0.1 2 500 700 200 L 40 40 1 1 B X P0.2/XTAL1 4 500 500 200 L 40 40 1 1 B X P0.3/XTAL2 5 500 300 200 L 40 40 1 1 B X P0.4 6 500 100 200 L 40 40 1 1 B X P0.5 7 500 -100 200 L 40 40 1 1 B X P0.6/CNVSTR 9 500 -300 200 L 40 40 1 1 B X P0.7/C2D 10 500 -500 200 L 40 40 1 1 B X VDD 3 -400 1300 200 D 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: C8051F33X # Package Name: MLP20 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF C8051F33X IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: C8051F33X F0 "IC" -900 1400 50 H V L B F1 "C8051F33X" -900 1200 50 H V L B F2 "cygnal_mini-MLP20" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1100 600 1100 P 2 1 0 0 600 1100 600 -1200 P 2 1 0 0 600 -1200 -600 -1200 P 2 1 0 0 -600 -1200 -600 1100 X /RST/C2CK P$4 -800 -800 200 R 40 40 1 1 B X GND P$2 100 -1400 200 U 40 40 1 1 W X P0.0/VREF P$1 -800 900 200 R 40 40 1 1 B X P0.1/IDA0 P$20 -800 700 200 R 40 40 1 1 B X P0.2/XTAL1 P$19 -800 500 200 R 40 40 1 1 B X P0.3/XTAL2 P$18 -800 300 200 R 40 40 1 1 B X P0.4 P$17 -800 100 200 R 40 40 1 1 B X P0.5 P$16 -800 -100 200 R 40 40 1 1 B X P0.6/CNVSTR P$15 -800 -300 200 R 40 40 1 1 B X P0.7 P$14 -800 -500 200 R 40 40 1 1 B X P1.0 P$13 800 900 200 L 40 40 1 1 B X P1.1 P$12 800 700 200 L 40 40 1 1 B X P1.2 P$11 800 500 200 L 40 40 1 1 B X P1.3 P$10 800 300 200 L 40 40 1 1 B X P1.4 P$9 800 100 200 L 40 40 1 1 B X P1.5 P$8 800 -100 200 L 40 40 1 1 B X P1.6 P$7 800 -300 200 L 40 40 1 1 B X P1.7 P$6 800 -500 200 L 40 40 1 1 B X P2.0/C2D P$5 -800 -1000 200 R 40 40 1 1 B X VDD P$3 100 1300 200 D 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: C8051F310 # Package Name: LQFP32 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF C8051F310 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: C8051F310 F0 "IC" -900 2000 50 H V L B F1 "C8051F310" -900 1800 50 H V L B F2 "cygnal_mini-LQFP32" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -2700 P 2 1 0 0 600 -2700 -600 -2700 P 2 1 0 0 -600 -2700 -600 1700 X /RST/C2CK 5 -800 -500 200 R 40 40 1 1 B X GND 3 0 -2900 200 U 40 40 1 1 W X P0.0/VREF 2 -800 1500 200 R 40 40 1 1 B X P0.1 1 -800 1300 200 R 40 40 1 1 B X P0.2/XTAL1 32 -800 1100 200 R 40 40 1 1 B X P0.3/XTAL2 31 -800 900 200 R 40 40 1 1 B X P0.4 30 -800 700 200 R 40 40 1 1 B X P0.5 29 -800 500 200 R 40 40 1 1 B X P0.6/CNVSTR 28 -800 300 200 R 40 40 1 1 B X P0.7 27 -800 100 200 R 40 40 1 1 B X P1.0 26 800 1500 200 L 40 40 1 1 B X P1.1 25 800 1300 200 L 40 40 1 1 B X P1.2 24 800 1100 200 L 40 40 1 1 B X P1.3 23 800 900 200 L 40 40 1 1 B X P1.4 22 800 700 200 L 40 40 1 1 B X P1.5 21 800 500 200 L 40 40 1 1 B X P1.6 20 800 300 200 L 40 40 1 1 B X P1.7 19 800 100 200 L 40 40 1 1 B X P2.0 18 800 -200 200 L 40 40 1 1 B X P2.1 17 800 -400 200 L 40 40 1 1 B X P2.2 16 800 -600 200 L 40 40 1 1 B X P2.3 15 800 -800 200 L 40 40 1 1 B X P2.4 14 800 -1000 200 L 40 40 1 1 B X P2.5 13 800 -1200 200 L 40 40 1 1 B X P2.6 12 800 -1400 200 L 40 40 1 1 B X P2.7 11 800 -1600 200 L 40 40 1 1 B X P3.0/C2D 6 -800 -700 200 R 40 40 1 1 B X P3.1 7 800 -1900 200 L 40 40 1 1 B X P3.2 8 800 -2100 200 L 40 40 1 1 B X P3.3 9 800 -2300 200 L 40 40 1 1 B X P3.4 10 800 -2500 200 L 40 40 1 1 B X VDD 4 0 1900 200 D 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: C8051F311 # Package Name: MLP28 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF C8051F311 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: C8051F311 F0 "IC" -900 2000 50 H V L B F1 "C8051F311" -900 1800 50 H V L B F2 "cygnal_mini-MLP28" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -1800 P 2 1 0 0 600 -1800 -600 -1800 P 2 1 0 0 -600 -1800 -600 1700 X /RST/C2CK 5 -800 -500 200 R 40 40 1 1 B X GND 3 0 -2000 200 U 40 40 1 1 W X P0.0/VREF 2 -800 1500 200 R 40 40 1 1 B X P0.1 1 -800 1300 200 R 40 40 1 1 B X P0.2/XTAL1 28 -800 1100 200 R 40 40 1 1 B X P0.3/XTAL2 27 -800 900 200 R 40 40 1 1 B X P0.4 26 -800 700 200 R 40 40 1 1 B X P0.5 25 -800 500 200 R 40 40 1 1 B X P0.6/CNVSTR 24 -800 300 200 R 40 40 1 1 B X P0.7 23 -800 100 200 R 40 40 1 1 B X P1.0 22 800 1500 200 L 40 40 1 1 B X P1.1 21 800 1300 200 L 40 40 1 1 B X P1.2 20 800 1100 200 L 40 40 1 1 B X P1.3 19 800 900 200 L 40 40 1 1 B X P1.4 18 800 700 200 L 40 40 1 1 B X P1.5 17 800 500 200 L 40 40 1 1 B X P1.6 16 800 300 200 L 40 40 1 1 B X P1.7 15 800 100 200 L 40 40 1 1 B X P2.0 14 800 -200 200 L 40 40 1 1 B X P2.1 13 800 -400 200 L 40 40 1 1 B X P2.2 12 800 -600 200 L 40 40 1 1 B X P2.3 11 800 -800 200 L 40 40 1 1 B X P2.4 10 800 -1000 200 L 40 40 1 1 B X P2.5 9 800 -1200 200 L 40 40 1 1 B X P2.6 8 800 -1400 200 L 40 40 1 1 B X P2.7 7 800 -1600 200 L 40 40 1 1 B X P3.0/C2D 6 -800 -700 200 R 40 40 1 1 B X VDD 4 0 1900 200 D 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: C8051F320 # Package Name: LQFP32 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF C8051F320 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: C8051F320 F0 "IC" -800 -2200 50 H V L B F1 "C8051F320" -800 -2400 50 H V L B F2 "cygnal_mini-LQFP32" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1500 600 1500 P 2 1 0 0 600 1500 600 -2000 P 2 1 0 0 600 -2000 -600 -2000 P 2 1 0 0 -600 -2000 -600 1500 X /RST/C2CK 9 -800 -1100 200 R 40 40 1 1 B X D+ 4 -800 1100 200 R 40 40 1 1 B X D- 5 -800 900 200 R 40 40 1 1 B X GND 3 100 -2200 200 U 40 40 1 1 W X P0.0 2 -800 600 200 R 40 40 1 1 B X P0.1 1 -800 400 200 R 40 40 1 1 B X P0.2/XTAL1 32 -800 200 200 R 40 40 1 1 B X P0.3/XTAL2 31 -800 0 200 R 40 40 1 1 B X P0.4 30 -800 -200 200 R 40 40 1 1 B X P0.5 29 -800 -400 200 R 40 40 1 1 B X P0.6/CNVSTR 28 -800 -600 200 R 40 40 1 1 B X P0.7/VREF 27 -800 -800 200 R 40 40 1 1 B X P1.0 26 800 1300 200 L 40 40 1 1 B X P1.1 25 800 1100 200 L 40 40 1 1 B X P1.2 24 800 900 200 L 40 40 1 1 B X P1.3 23 800 700 200 L 40 40 1 1 B X P1.4 22 800 500 200 L 40 40 1 1 B X P1.5 21 800 300 200 L 40 40 1 1 B X P1.6 20 800 100 200 L 40 40 1 1 B X P1.7 19 800 -100 200 L 40 40 1 1 B X P2.0 18 800 -400 200 L 40 40 1 1 B X P2.1 17 800 -600 200 L 40 40 1 1 B X P2.2 16 800 -800 200 L 40 40 1 1 B X P2.3 15 800 -1000 200 L 40 40 1 1 B X P2.4 14 800 -1200 200 L 40 40 1 1 B X P2.5 13 800 -1400 200 L 40 40 1 1 B X P2.6 12 800 -1600 200 L 40 40 1 1 B X P2.7 11 800 -1800 200 L 40 40 1 1 B X P3.0/C2D 10 -800 -1300 200 R 40 40 1 1 B X REGIN 7 -100 1700 200 D 40 40 1 1 B X VBUS 8 -300 1700 200 D 40 40 1 1 B X VDD 6 100 1700 200 D 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: C8051F321 # Package Name: MLP28 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF C8051F321 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: C8051F321 F0 "IC" -800 -1500 50 H V L B F1 "C8051F321" -800 -1700 50 H V L B F2 "cygnal_mini-MLP28" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1700 600 1700 P 2 1 0 0 600 1700 600 -1300 P 2 1 0 0 600 -1300 -600 -1300 P 2 1 0 0 -600 -1300 -600 1700 X /RST/C2CK 9 -800 -900 200 R 40 40 1 1 B X D+ 4 -800 1300 200 R 40 40 1 1 B X D- 5 -800 1100 200 R 40 40 1 1 B X GND 3 100 -1500 200 U 40 40 1 1 W X P0.0 2 -800 800 200 R 40 40 1 1 B X P0.1 1 -800 600 200 R 40 40 1 1 B X P0.2/XTAL1 28 -800 400 200 R 40 40 1 1 B X P0.3/XTAL2 27 -800 200 200 R 40 40 1 1 B X P0.4 26 -800 0 200 R 40 40 1 1 B X P0.5 25 -800 -200 200 R 40 40 1 1 B X P0.6/CNVSTR 24 -800 -400 200 R 40 40 1 1 B X P0.7/VREF 23 -800 -600 200 R 40 40 1 1 B X P1.0 22 800 1500 200 L 40 40 1 1 B X P1.1 21 800 1300 200 L 40 40 1 1 B X P1.2 20 800 1100 200 L 40 40 1 1 B X P1.3 19 800 900 200 L 40 40 1 1 B X P1.4 18 800 700 200 L 40 40 1 1 B X P1.5 17 800 500 200 L 40 40 1 1 B X P1.6 16 800 300 200 L 40 40 1 1 B X P1.7 15 800 100 200 L 40 40 1 1 B X P2.0 14 800 -200 200 L 40 40 1 1 B X P2.1 13 800 -400 200 L 40 40 1 1 B X P2.2 12 800 -600 200 L 40 40 1 1 B X P2.3 11 800 -800 200 L 40 40 1 1 B X P3.0/C2D 10 -800 -1100 200 R 40 40 1 1 B X REGIN 7 -100 1900 200 D 40 40 1 1 B X VBUS 8 -300 1900 200 D 40 40 1 1 B X VDD 6 100 1900 200 D 40 40 1 1 W ENDDRAW ENDDEF #End Library