EESchema-LIBRARY Version 2.3 29/04/2008-12:22:19 # Converted with eagle2kicad.ulp Version 0.9 # Device count = 148 # # Dev Name: NC7NP04K8X # Package Name: TSSOP50P310X90-8N_MAB08A_US8 # Dev Tech: P # Dev Prefix: IC # Gate count = 4 # DEF NC7NP04K8X IC 0 40 Y Y 4 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7NP04K8X" 50 -200 50 H V L B F2 "fairchild-tinylogic-TSSOP50P310X90-8N_MAB08A_US8" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 1 -400 0 200 R 40 40 1 1 I X O 7 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: INVERTER P 2 2 0 0 -200 200 200 0 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 X I 3 -400 0 200 R 40 40 2 1 I X O 5 400 0 200 L 40 40 2 1 O I # Gate Name: G$3 # Symbol Name: INVERTER P 2 3 0 0 -200 200 200 0 P 2 3 0 0 200 0 -200 -200 P 2 3 0 0 -200 -200 -200 200 X I 6 -400 0 200 R 40 40 3 1 I X O 2 400 0 200 L 40 40 3 1 O I # Gate Name: G$4 # Symbol Name: PWRN T 1 50 -155 50 0 4 0 GND T 1 50 175 50 0 4 0 VCC X GND 4 0 -300 200 U 40 40 4 1 W X VCC 8 0 300 200 D 40 40 4 1 W ENDDRAW ENDDEF # # Dev Name: NC7NP14K8X # Package Name: TSSOP50P310X90-8N_MAB08A_US8 # Dev Tech: P # Dev Prefix: IC # Gate count = 4 # DEF NC7NP14K8X IC 0 40 Y Y 4 L N # Gate Name: G$1 # Symbol Name: INVERTER_SCHMITT F0 "IC" 50 125 50 H V L B F1 "NC7NP14K8X" 50 -200 50 H V L B F2 "fairchild-tinylogic-TSSOP50P310X90-8N_MAB08A_US8" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 P 2 1 0 0 -30 -50 -70 50 P 2 1 0 0 -80 -50 -120 50 P 2 1 0 0 -80 -50 -30 -50 P 2 1 0 0 -30 -50 5 -50 P 2 1 0 0 -155 50 -120 50 P 2 1 0 0 -120 50 -70 50 X I 1 -400 0 200 R 40 40 1 1 I X O 7 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: INVERTER_SCHMITT P 2 2 0 0 -200 200 200 0 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 P 2 2 0 0 -30 -50 -70 50 P 2 2 0 0 -80 -50 -120 50 P 2 2 0 0 -80 -50 -30 -50 P 2 2 0 0 -30 -50 5 -50 P 2 2 0 0 -155 50 -120 50 P 2 2 0 0 -120 50 -70 50 X I 3 -400 0 200 R 40 40 2 1 I X O 5 400 0 200 L 40 40 2 1 O I # Gate Name: G$3 # Symbol Name: INVERTER_SCHMITT P 2 3 0 0 -200 200 200 0 P 2 3 0 0 200 0 -200 -200 P 2 3 0 0 -200 -200 -200 200 P 2 3 0 0 -30 -50 -70 50 P 2 3 0 0 -80 -50 -120 50 P 2 3 0 0 -80 -50 -30 -50 P 2 3 0 0 -30 -50 5 -50 P 2 3 0 0 -155 50 -120 50 P 2 3 0 0 -120 50 -70 50 X I 6 -400 0 200 R 40 40 3 1 I X O 2 400 0 200 L 40 40 3 1 O I # Gate Name: G$4 # Symbol Name: PWRN T 1 50 -155 50 0 4 0 GND T 1 50 175 50 0 4 0 VCC X GND 4 0 -300 200 U 40 40 4 1 W X VCC 8 0 300 200 D 40 40 4 1 W ENDDRAW ENDDEF # # Dev Name: NC7NP34K8X # Package Name: TSSOP50P310X90-8N_MAB08A_US8 # Dev Tech: P # Dev Prefix: IC # Gate count = 4 # DEF NC7NP34K8X IC 0 40 Y Y 4 L N # Gate Name: G$1 # Symbol Name: BUFFER F0 "IC" 50 125 50 H V L B F1 "NC7NP34K8X" 50 -200 50 H V L B F2 "fairchild-tinylogic-TSSOP50P310X90-8N_MAB08A_US8" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 1 -400 0 200 R 40 40 1 1 I X O 7 400 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: BUFFER P 2 2 0 0 -200 200 200 0 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 X I 3 -400 0 200 R 40 40 2 1 I X O 5 400 0 200 L 40 40 2 1 O # Gate Name: G$3 # Symbol Name: BUFFER P 2 3 0 0 -200 200 200 0 P 2 3 0 0 200 0 -200 -200 P 2 3 0 0 -200 -200 -200 200 X I 6 -400 0 200 R 40 40 3 1 I X O 2 400 0 200 L 40 40 3 1 O # Gate Name: G$4 # Symbol Name: PWRN T 1 50 -155 50 0 4 0 GND T 1 50 175 50 0 4 0 VCC X GND 4 0 -300 200 U 40 40 4 1 W X VCC 8 0 300 200 D 40 40 4 1 W ENDDRAW ENDDEF # # Dev Name: NC7NZ04K8X # Package Name: TSSOP50P310X90-8N_MAB08A_US8 # Dev Tech: Z # Dev Prefix: IC # Gate count = 4 # DEF NC7NZ04K8X IC 0 40 Y Y 4 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7NZ04K8X" 50 -200 50 H V L B F2 "fairchild-tinylogic-TSSOP50P310X90-8N_MAB08A_US8" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 1 -400 0 200 R 40 40 1 1 I X O 7 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: INVERTER P 2 2 0 0 -200 200 200 0 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 X I 3 -400 0 200 R 40 40 2 1 I X O 5 400 0 200 L 40 40 2 1 O I # Gate Name: G$3 # Symbol Name: INVERTER P 2 3 0 0 -200 200 200 0 P 2 3 0 0 200 0 -200 -200 P 2 3 0 0 -200 -200 -200 200 X I 6 -400 0 200 R 40 40 3 1 I X O 2 400 0 200 L 40 40 3 1 O I # Gate Name: G$4 # Symbol Name: PWRN T 1 50 -155 50 0 4 0 GND T 1 50 175 50 0 4 0 VCC X GND 4 0 -300 200 U 40 40 4 1 W X VCC 8 0 300 200 D 40 40 4 1 W ENDDRAW ENDDEF # # Dev Name: NC7NZ14K8X # Package Name: TSSOP50P310X90-8N_MAB08A_US8 # Dev Tech: Z # Dev Prefix: IC # Gate count = 4 # DEF NC7NZ14K8X IC 0 40 Y Y 4 L N # Gate Name: G$1 # Symbol Name: INVERTER_SCHMITT F0 "IC" 50 125 50 H V L B F1 "NC7NZ14K8X" 50 -200 50 H V L B F2 "fairchild-tinylogic-TSSOP50P310X90-8N_MAB08A_US8" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 P 2 1 0 0 -30 -50 -70 50 P 2 1 0 0 -80 -50 -120 50 P 2 1 0 0 -80 -50 -30 -50 P 2 1 0 0 -30 -50 5 -50 P 2 1 0 0 -155 50 -120 50 P 2 1 0 0 -120 50 -70 50 X I 1 -400 0 200 R 40 40 1 1 I X O 7 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: INVERTER_SCHMITT P 2 2 0 0 -200 200 200 0 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 P 2 2 0 0 -30 -50 -70 50 P 2 2 0 0 -80 -50 -120 50 P 2 2 0 0 -80 -50 -30 -50 P 2 2 0 0 -30 -50 5 -50 P 2 2 0 0 -155 50 -120 50 P 2 2 0 0 -120 50 -70 50 X I 3 -400 0 200 R 40 40 2 1 I X O 5 400 0 200 L 40 40 2 1 O I # Gate Name: G$3 # Symbol Name: INVERTER_SCHMITT P 2 3 0 0 -200 200 200 0 P 2 3 0 0 200 0 -200 -200 P 2 3 0 0 -200 -200 -200 200 P 2 3 0 0 -30 -50 -70 50 P 2 3 0 0 -80 -50 -120 50 P 2 3 0 0 -80 -50 -30 -50 P 2 3 0 0 -30 -50 5 -50 P 2 3 0 0 -155 50 -120 50 P 2 3 0 0 -120 50 -70 50 X I 6 -400 0 200 R 40 40 3 1 I X O 2 400 0 200 L 40 40 3 1 O I # Gate Name: G$4 # Symbol Name: PWRN T 1 50 -155 50 0 4 0 GND T 1 50 175 50 0 4 0 VCC X GND 4 0 -300 200 U 40 40 4 1 W X VCC 8 0 300 200 D 40 40 4 1 W ENDDRAW ENDDEF # # Dev Name: NC7NZ17K8X # Package Name: TSSOP50P310X90-8N_MAB08A_US8 # Dev Tech: Z # Dev Prefix: IC # Gate count = 4 # DEF NC7NZ17K8X IC 0 40 Y Y 4 L N # Gate Name: G$1 # Symbol Name: BUFFER_SCHMITT F0 "IC" 50 125 50 H V L B F1 "NC7NZ17K8X" 50 -200 50 H V L B F2 "fairchild-tinylogic-TSSOP50P310X90-8N_MAB08A_US8" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 P 2 1 0 0 -30 -50 -70 50 P 2 1 0 0 -80 -50 -120 50 P 2 1 0 0 -80 -50 -30 -50 P 2 1 0 0 -30 -50 5 -50 P 2 1 0 0 -155 50 -120 50 P 2 1 0 0 -120 50 -70 50 X I 1 -400 0 200 R 40 40 1 1 I X O 7 400 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: BUFFER_SCHMITT P 2 2 0 0 -200 200 200 0 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 P 2 2 0 0 -30 -50 -70 50 P 2 2 0 0 -80 -50 -120 50 P 2 2 0 0 -80 -50 -30 -50 P 2 2 0 0 -30 -50 5 -50 P 2 2 0 0 -155 50 -120 50 P 2 2 0 0 -120 50 -70 50 X I 3 -400 0 200 R 40 40 2 1 I X O 5 400 0 200 L 40 40 2 1 O # Gate Name: G$3 # Symbol Name: BUFFER_SCHMITT P 2 3 0 0 -200 200 200 0 P 2 3 0 0 200 0 -200 -200 P 2 3 0 0 -200 -200 -200 200 P 2 3 0 0 -30 -50 -70 50 P 2 3 0 0 -80 -50 -120 50 P 2 3 0 0 -80 -50 -30 -50 P 2 3 0 0 -30 -50 5 -50 P 2 3 0 0 -155 50 -120 50 P 2 3 0 0 -120 50 -70 50 X I 6 -400 0 200 R 40 40 3 1 I X O 2 400 0 200 L 40 40 3 1 O # Gate Name: G$4 # Symbol Name: PWRN T 1 50 -155 50 0 4 0 GND T 1 50 175 50 0 4 0 VCC X GND 4 0 -300 200 U 40 40 4 1 W X VCC 8 0 300 200 D 40 40 4 1 W ENDDRAW ENDDEF # # Dev Name: NC7NZ34K8X # Package Name: TSSOP50P310X90-8N_MAB08A_US8 # Dev Tech: Z # Dev Prefix: IC # Gate count = 4 # DEF NC7NZ34K8X IC 0 40 Y Y 4 L N # Gate Name: G$1 # Symbol Name: BUFFER F0 "IC" 50 125 50 H V L B F1 "NC7NZ34K8X" 50 -200 50 H V L B F2 "fairchild-tinylogic-TSSOP50P310X90-8N_MAB08A_US8" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 1 -400 0 200 R 40 40 1 1 I X O 7 400 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: BUFFER P 2 2 0 0 -200 200 200 0 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 X I 3 -400 0 200 R 40 40 2 1 I X O 5 400 0 200 L 40 40 2 1 O # Gate Name: G$3 # Symbol Name: BUFFER P 2 3 0 0 -200 200 200 0 P 2 3 0 0 200 0 -200 -200 P 2 3 0 0 -200 -200 -200 200 X I 6 -400 0 200 R 40 40 3 1 I X O 2 400 0 200 L 40 40 3 1 O # Gate Name: G$4 # Symbol Name: PWRN T 1 50 -155 50 0 4 0 GND T 1 50 175 50 0 4 0 VCC X GND 4 0 -300 200 U 40 40 4 1 W X VCC 8 0 300 200 D 40 40 4 1 W ENDDRAW ENDDEF # # Dev Name: NC7NZU04K8X # Package Name: TSSOP50P310X90-8N_MAB08A_US8 # Dev Tech: Z # Dev Prefix: IC # Gate count = 4 # DEF NC7NZU04K8X IC 0 40 Y Y 4 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7NZU04K8X" 50 -200 50 H V L B F2 "fairchild-tinylogic-TSSOP50P310X90-8N_MAB08A_US8" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 1 -400 0 200 R 40 40 1 1 I X O 7 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: INVERTER P 2 2 0 0 -200 200 200 0 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 X I 3 -400 0 200 R 40 40 2 1 I X O 5 400 0 200 L 40 40 2 1 O I # Gate Name: G$3 # Symbol Name: INVERTER P 2 3 0 0 -200 200 200 0 P 2 3 0 0 200 0 -200 -200 P 2 3 0 0 -200 -200 -200 200 X I 6 -400 0 200 R 40 40 3 1 I X O 2 400 0 200 L 40 40 3 1 O I # Gate Name: G$4 # Symbol Name: PWRN T 1 50 -155 50 0 4 0 GND T 1 50 175 50 0 4 0 VCC X GND 4 0 -300 200 U 40 40 4 1 W X VCC 8 0 300 200 D 40 40 4 1 W ENDDRAW ENDDEF # # Dev Name: NC7S00M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF NC7S00M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: NAND F0 "IC" -300 225 50 H V L B F1 "NC7S00M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7S00P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF NC7S00P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: NAND F0 "IC" -300 225 50 H V L B F1 "NC7S00P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7S02M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF NC7S02M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: NOR F0 "IC" -300 225 50 H V L B F1 "NC7S02M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -300 200 P 2 1 0 0 -50 -200 -300 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7S02P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF NC7S02P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: NOR F0 "IC" -300 225 50 H V L B F1 "NC7S02P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -300 200 P 2 1 0 0 -50 -200 -300 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7S04M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF NC7S04M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7S04M5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7S04P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF NC7S04P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7S04P5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7S05P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF NC7S05P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7S05P5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7S08M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF NC7S08M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: AND F0 "IC" -300 225 50 H V L B F1 "NC7S08M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7S08P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF NC7S08P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: AND F0 "IC" -300 225 50 H V L B F1 "NC7S08P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7S14M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF NC7S14M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER_SCHMITT F0 "IC" 50 125 50 H V L B F1 "NC7S14M5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 P 2 1 0 0 -30 -50 -70 50 P 2 1 0 0 -80 -50 -120 50 P 2 1 0 0 -80 -50 -30 -50 P 2 1 0 0 -30 -50 5 -50 P 2 1 0 0 -155 50 -120 50 P 2 1 0 0 -120 50 -70 50 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7S14P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF NC7S14P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER_SCHMITT F0 "IC" 50 125 50 H V L B F1 "NC7S14P5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 P 2 1 0 0 -30 -50 -70 50 P 2 1 0 0 -80 -50 -120 50 P 2 1 0 0 -80 -50 -30 -50 P 2 1 0 0 -30 -50 5 -50 P 2 1 0 0 -155 50 -120 50 P 2 1 0 0 -120 50 -70 50 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7S32M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF NC7S32M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: OR F0 "IC" -300 225 50 H V L B F1 "NC7S32M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -300 200 P 2 1 0 0 -50 -200 -300 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7S32P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF NC7S32P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: OR F0 "IC" -300 225 50 H V L B F1 "NC7S32P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -300 200 P 2 1 0 0 -50 -200 -300 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7S86M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF NC7S86M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: XOR F0 "IC" -300 225 50 H V L B F1 "NC7S86M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -250 200 P 2 1 0 0 -50 -200 -250 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -500 0 320 -385 385 1 1 0 N -250 -200 -250 200 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7S86P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF NC7S86P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: XOR F0 "IC" -300 225 50 H V L B F1 "NC7S86P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -250 200 P 2 1 0 0 -50 -200 -250 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -500 0 320 -385 385 1 1 0 N -250 -200 -250 200 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SU04M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF NC7SU04M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7SU04M5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SU04P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF NC7SU04P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7SU04P5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SP00M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: P # Dev Prefix: IC # Gate count = 2 # DEF NC7SP00M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: NAND F0 "IC" -300 225 50 H V L B F1 "NC7SP00M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SP00P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: P # Dev Prefix: IC # Gate count = 2 # DEF NC7SP00P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: NAND F0 "IC" -300 225 50 H V L B F1 "NC7SP00P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SP02M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: P # Dev Prefix: IC # Gate count = 2 # DEF NC7SP02M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: NOR F0 "IC" -300 225 50 H V L B F1 "NC7SP02M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -300 200 P 2 1 0 0 -50 -200 -300 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SP02P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: P # Dev Prefix: IC # Gate count = 2 # DEF NC7SP02P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: NOR F0 "IC" -300 225 50 H V L B F1 "NC7SP02P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -300 200 P 2 1 0 0 -50 -200 -300 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SP04M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: P # Dev Prefix: IC # Gate count = 2 # DEF NC7SP04M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7SP04M5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SP04P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: P # Dev Prefix: IC # Gate count = 2 # DEF NC7SP04P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7SP04P5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SP05M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: P # Dev Prefix: IC # Gate count = 2 # DEF NC7SP05M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7SP05M5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SP05P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: P # Dev Prefix: IC # Gate count = 2 # DEF NC7SP05P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7SP05P5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SP08M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: P # Dev Prefix: IC # Gate count = 2 # DEF NC7SP08M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: AND F0 "IC" -300 225 50 H V L B F1 "NC7SP08M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SP08P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: P # Dev Prefix: IC # Gate count = 2 # DEF NC7SP08P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: AND F0 "IC" -300 225 50 H V L B F1 "NC7SP08P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SP14M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: P # Dev Prefix: IC # Gate count = 2 # DEF NC7SP14M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER_SCHMITT F0 "IC" 50 125 50 H V L B F1 "NC7SP14M5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 P 2 1 0 0 -30 -50 -70 50 P 2 1 0 0 -80 -50 -120 50 P 2 1 0 0 -80 -50 -30 -50 P 2 1 0 0 -30 -50 5 -50 P 2 1 0 0 -155 50 -120 50 P 2 1 0 0 -120 50 -70 50 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SP14P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: P # Dev Prefix: IC # Gate count = 2 # DEF NC7SP14P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER_SCHMITT F0 "IC" 50 125 50 H V L B F1 "NC7SP14P5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 P 2 1 0 0 -30 -50 -70 50 P 2 1 0 0 -80 -50 -120 50 P 2 1 0 0 -80 -50 -30 -50 P 2 1 0 0 -30 -50 5 -50 P 2 1 0 0 -155 50 -120 50 P 2 1 0 0 -120 50 -70 50 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SP17P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: P # Dev Prefix: IC # Gate count = 2 # DEF NC7SP17P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: BUFFER_SCHMITT F0 "IC" 50 125 50 H V L B F1 "NC7SP17P5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 P 2 1 0 0 -30 -50 -70 50 P 2 1 0 0 -80 -50 -120 50 P 2 1 0 0 -80 -50 -30 -50 P 2 1 0 0 -30 -50 5 -50 P 2 1 0 0 -155 50 -120 50 P 2 1 0 0 -120 50 -70 50 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SP32M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: P # Dev Prefix: IC # Gate count = 2 # DEF NC7SP32M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: OR F0 "IC" -300 225 50 H V L B F1 "NC7SP32M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -300 200 P 2 1 0 0 -50 -200 -300 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SP32P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: P # Dev Prefix: IC # Gate count = 2 # DEF NC7SP32P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: OR F0 "IC" -300 225 50 H V L B F1 "NC7SP32P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -300 200 P 2 1 0 0 -50 -200 -300 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SP34P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: P # Dev Prefix: IC # Gate count = 2 # DEF NC7SP34P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: BUFFER F0 "IC" 50 125 50 H V L B F1 "NC7SP34P5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SP38M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: P # Dev Prefix: IC # Gate count = 2 # DEF NC7SP38M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: NAND F0 "IC" -300 225 50 H V L B F1 "NC7SP38M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SP38P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: P # Dev Prefix: IC # Gate count = 2 # DEF NC7SP38P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: NAND F0 "IC" -300 225 50 H V L B F1 "NC7SP38P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SP86M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: P # Dev Prefix: IC # Gate count = 2 # DEF NC7SP86M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: XOR F0 "IC" -300 225 50 H V L B F1 "NC7SP86M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -250 200 P 2 1 0 0 -50 -200 -250 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -500 0 320 -385 385 1 1 0 N -250 -200 -250 200 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SP86P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: P # Dev Prefix: IC # Gate count = 2 # DEF NC7SP86P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: XOR F0 "IC" -300 225 50 H V L B F1 "NC7SP86P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -250 200 P 2 1 0 0 -50 -200 -250 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -500 0 320 -385 385 1 1 0 N -250 -200 -250 200 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SP125M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: P # Dev Prefix: IC # Gate count = 2 # DEF NC7SP125M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: BUFFER_/TRISTATE F0 "IC" 100 125 50 H V L B F1 "NC7SP125M5X" 100 -200 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 200 0 -200 200 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X /OE 1 0 300 200 D 40 40 1 1 I I X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 T # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SP125P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: P # Dev Prefix: IC # Gate count = 2 # DEF NC7SP125P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: BUFFER_/TRISTATE F0 "IC" 100 125 50 H V L B F1 "NC7SP125P5X" 100 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 200 0 -200 200 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X /OE 1 0 300 200 D 40 40 1 1 I I X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 T # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SP126M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: P # Dev Prefix: IC # Gate count = 2 # DEF NC7SP126M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: BUFFER_TRISTATE F0 "IC" 100 125 50 H V L B F1 "NC7SP126M5X" 100 -200 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 200 0 -200 200 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 T X OE 1 0 300 200 D 40 40 1 1 I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SP126P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: P # Dev Prefix: IC # Gate count = 2 # DEF NC7SP126P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: BUFFER_TRISTATE F0 "IC" 100 125 50 H V L B F1 "NC7SP126P5X" 100 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 200 0 -200 200 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 T X OE 1 0 300 200 D 40 40 1 1 I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SPU04M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: P # Dev Prefix: IC # Gate count = 2 # DEF NC7SPU04M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7SPU04M5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SPU04P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: P # Dev Prefix: IC # Gate count = 2 # DEF NC7SPU04P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7SPU04P5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7ST00M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: T # Dev Prefix: IC # Gate count = 2 # DEF NC7ST00M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: NAND F0 "IC" -300 225 50 H V L B F1 "NC7ST00M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7ST00P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: T # Dev Prefix: IC # Gate count = 2 # DEF NC7ST00P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: NAND F0 "IC" -300 225 50 H V L B F1 "NC7ST00P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7ST02M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: T # Dev Prefix: IC # Gate count = 2 # DEF NC7ST02M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: NOR F0 "IC" -300 225 50 H V L B F1 "NC7ST02M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -300 200 P 2 1 0 0 -50 -200 -300 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7ST02P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: T # Dev Prefix: IC # Gate count = 2 # DEF NC7ST02P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: NOR F0 "IC" -300 225 50 H V L B F1 "NC7ST02P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -300 200 P 2 1 0 0 -50 -200 -300 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7ST04M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: T # Dev Prefix: IC # Gate count = 2 # DEF NC7ST04M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7ST04M5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7ST04P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: T # Dev Prefix: IC # Gate count = 2 # DEF NC7ST04P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7ST04P5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7ST08M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: T # Dev Prefix: IC # Gate count = 2 # DEF NC7ST08M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: AND F0 "IC" -300 225 50 H V L B F1 "NC7ST08M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7ST08P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: T # Dev Prefix: IC # Gate count = 2 # DEF NC7ST08P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: AND F0 "IC" -300 225 50 H V L B F1 "NC7ST08P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7ST32M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: T # Dev Prefix: IC # Gate count = 2 # DEF NC7ST32M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: OR F0 "IC" -300 225 50 H V L B F1 "NC7ST32M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -300 200 P 2 1 0 0 -50 -200 -300 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7ST32P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: T # Dev Prefix: IC # Gate count = 2 # DEF NC7ST32P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: OR F0 "IC" -300 225 50 H V L B F1 "NC7ST32P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -300 200 P 2 1 0 0 -50 -200 -300 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7ST86M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: T # Dev Prefix: IC # Gate count = 2 # DEF NC7ST86M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: XOR F0 "IC" -300 225 50 H V L B F1 "NC7ST86M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -250 200 P 2 1 0 0 -50 -200 -250 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -500 0 320 -385 385 1 1 0 N -250 -200 -250 200 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7ST86P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: T # Dev Prefix: IC # Gate count = 2 # DEF NC7ST86P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: XOR F0 "IC" -300 225 50 H V L B F1 "NC7ST86P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -250 200 P 2 1 0 0 -50 -200 -250 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -500 0 320 -385 385 1 1 0 N -250 -200 -250 200 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SV00M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SV00M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: NAND F0 "IC" -300 225 50 H V L B F1 "NC7SV00M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SV00P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SV00P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: NAND F0 "IC" -300 225 50 H V L B F1 "NC7SV00P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SV02M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SV02M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: NOR F0 "IC" -300 225 50 H V L B F1 "NC7SV02M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -300 200 P 2 1 0 0 -50 -200 -300 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SV02P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SV02P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: NOR F0 "IC" -300 225 50 H V L B F1 "NC7SV02P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -300 200 P 2 1 0 0 -50 -200 -300 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SV04M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SV04M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7SV04M5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SV04P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SV04P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7SV04P5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SV05M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SV05M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7SV05M5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SV05P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SV05P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7SV05P5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SV08M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SV08M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: AND F0 "IC" -300 225 50 H V L B F1 "NC7SV08M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SV08P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SV08P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: AND F0 "IC" -300 225 50 H V L B F1 "NC7SV08P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SV11P6X # Package Name: SOT65P210X110-6AN_SC88_SC70-6 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SV11P6X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: 3AND F0 "IC" -300 225 50 H V L B F1 "NC7SV11P6X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-6AN_SC88_SC70-6" 0 150 50 H I C C DRAW P 2 1 0 0 100 200 -300 200 P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 X A 1 -500 100 200 R 40 40 1 1 I X B 3 -500 0 200 R 40 40 1 1 I X C 6 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 2 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SV14M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SV14M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER_SCHMITT F0 "IC" 50 125 50 H V L B F1 "NC7SV14M5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 P 2 1 0 0 -30 -50 -70 50 P 2 1 0 0 -80 -50 -120 50 P 2 1 0 0 -80 -50 -30 -50 P 2 1 0 0 -30 -50 5 -50 P 2 1 0 0 -155 50 -120 50 P 2 1 0 0 -120 50 -70 50 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SV14P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SV14P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER_SCHMITT F0 "IC" 50 125 50 H V L B F1 "NC7SV14P5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 P 2 1 0 0 -30 -50 -70 50 P 2 1 0 0 -80 -50 -120 50 P 2 1 0 0 -80 -50 -30 -50 P 2 1 0 0 -30 -50 5 -50 P 2 1 0 0 -155 50 -120 50 P 2 1 0 0 -120 50 -70 50 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SV17P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SV17P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: BUFFER_SCHMITT F0 "IC" 50 125 50 H V L B F1 "NC7SV17P5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 P 2 1 0 0 -30 -50 -70 50 P 2 1 0 0 -80 -50 -120 50 P 2 1 0 0 -80 -50 -30 -50 P 2 1 0 0 -30 -50 5 -50 P 2 1 0 0 -155 50 -120 50 P 2 1 0 0 -120 50 -70 50 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SV32M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SV32M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: OR F0 "IC" -300 225 50 H V L B F1 "NC7SV32M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -300 200 P 2 1 0 0 -50 -200 -300 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SV32P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SV32P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: OR F0 "IC" -300 225 50 H V L B F1 "NC7SV32P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -300 200 P 2 1 0 0 -50 -200 -300 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SV34P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SV34P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: BUFFER F0 "IC" 50 125 50 H V L B F1 "NC7SV34P5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SV38M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SV38M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: NAND F0 "IC" -300 225 50 H V L B F1 "NC7SV38M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SV38P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SV38P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: NAND F0 "IC" -300 225 50 H V L B F1 "NC7SV38P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SV86M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SV86M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: XOR F0 "IC" -300 225 50 H V L B F1 "NC7SV86M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -250 200 P 2 1 0 0 -50 -200 -250 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -500 0 320 -385 385 1 1 0 N -250 -200 -250 200 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SV86P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SV86P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: XOR F0 "IC" -300 225 50 H V L B F1 "NC7SV86P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -250 200 P 2 1 0 0 -50 -200 -250 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -500 0 320 -385 385 1 1 0 N -250 -200 -250 200 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SV125M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SV125M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: BUFFER_/TRISTATE F0 "IC" 100 125 50 H V L B F1 "NC7SV125M5X" 100 -200 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 200 0 -200 200 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X /OE 1 0 300 200 D 40 40 1 1 I I X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 T # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SV125P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SV125P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: BUFFER_/TRISTATE F0 "IC" 100 125 50 H V L B F1 "NC7SV125P5X" 100 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 200 0 -200 200 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X /OE 1 0 300 200 D 40 40 1 1 I I X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 T # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SV126M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SV126M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: BUFFER_TRISTATE F0 "IC" 100 125 50 H V L B F1 "NC7SV126M5X" 100 -200 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 200 0 -200 200 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 T X OE 1 0 300 200 D 40 40 1 1 I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SV126P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SV126P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: BUFFER_TRISTATE F0 "IC" 100 125 50 H V L B F1 "NC7SV126P5X" 100 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 200 0 -200 200 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 T X OE 1 0 300 200 D 40 40 1 1 I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SVU04M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SVU04M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7SVU04M5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SVU04P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: V # Dev Prefix: IC # Gate count = 2 # DEF NC7SVU04P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7SVU04P5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZ00M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZ00M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: NAND F0 "IC" -300 225 50 H V L B F1 "NC7SZ00M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZ00P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZ00P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: NAND F0 "IC" -300 225 50 H V L B F1 "NC7SZ00P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZ02M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZ02M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: NOR F0 "IC" -300 225 50 H V L B F1 "NC7SZ02M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -300 200 P 2 1 0 0 -50 -200 -300 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZ02P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZ02P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: NOR F0 "IC" -300 225 50 H V L B F1 "NC7SZ02P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -300 200 P 2 1 0 0 -50 -200 -300 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZ04M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZ04M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7SZ04M5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZ04P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZ04P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7SZ04P5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZ05M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZ05M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7SZ05M5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZ08M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZ08M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: AND F0 "IC" -300 225 50 H V L B F1 "NC7SZ08M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZ08P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZ08P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: AND F0 "IC" -300 225 50 H V L B F1 "NC7SZ08P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZ10P6X # Package Name: SOT65P210X110-6AN_SC88_SC70-6 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZ10P6X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: 3NAND F0 "IC" -300 225 50 H V L B F1 "NC7SZ10P6X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-6AN_SC88_SC70-6" 0 150 50 H I C C DRAW P 2 1 0 0 100 200 -300 200 P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 X A 1 -500 100 200 R 40 40 1 1 I X B 3 -500 0 200 R 40 40 1 1 I X C 6 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 2 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZ11P6X # Package Name: SOT65P210X110-6AN_SC88_SC70-6 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZ11P6X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: 3AND F0 "IC" -300 225 50 H V L B F1 "NC7SZ11P6X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-6AN_SC88_SC70-6" 0 150 50 H I C C DRAW P 2 1 0 0 100 200 -300 200 P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 X A 1 -500 100 200 R 40 40 1 1 I X B 3 -500 0 200 R 40 40 1 1 I X C 6 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 2 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZ14M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZ14M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER_SCHMITT F0 "IC" 50 125 50 H V L B F1 "NC7SZ14M5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 P 2 1 0 0 -30 -50 -70 50 P 2 1 0 0 -80 -50 -120 50 P 2 1 0 0 -80 -50 -30 -50 P 2 1 0 0 -30 -50 5 -50 P 2 1 0 0 -155 50 -120 50 P 2 1 0 0 -120 50 -70 50 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZ14P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZ14P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER_SCHMITT F0 "IC" 50 125 50 H V L B F1 "NC7SZ14P5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 P 2 1 0 0 -30 -50 -70 50 P 2 1 0 0 -80 -50 -120 50 P 2 1 0 0 -80 -50 -30 -50 P 2 1 0 0 -30 -50 5 -50 P 2 1 0 0 -155 50 -120 50 P 2 1 0 0 -120 50 -70 50 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZ27P6X # Package Name: SOT65P210X110-6AN_SC88_SC70-6 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZ27P6X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: 3NOR F0 "IC" -300 225 50 H V L B F1 "NC7SZ27P6X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-6AN_SC88_SC70-6" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -300 200 P 2 1 0 0 -50 -200 -300 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 P 2 1 0 0 -300 0 -230 0 X A 1 -500 100 200 R 40 40 1 1 I X B 3 -500 0 200 R 40 40 1 1 I X C 6 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 2 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZ32M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZ32M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: OR F0 "IC" -300 225 50 H V L B F1 "NC7SZ32M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -300 200 P 2 1 0 0 -50 -200 -300 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZ32P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZ32P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: OR F0 "IC" -300 225 50 H V L B F1 "NC7SZ32P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -300 200 P 2 1 0 0 -50 -200 -300 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZ38M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZ38M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: NAND F0 "IC" -300 225 50 H V L B F1 "NC7SZ38M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZ38P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZ38P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: NAND F0 "IC" -300 225 50 H V L B F1 "NC7SZ38P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZ86M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZ86M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: XOR F0 "IC" -300 225 50 H V L B F1 "NC7SZ86M5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -250 200 P 2 1 0 0 -50 -200 -250 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -500 0 320 -385 385 1 1 0 N -250 -200 -250 200 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZ86P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZ86P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: XOR F0 "IC" -300 225 50 H V L B F1 "NC7SZ86P5X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -250 200 P 2 1 0 0 -50 -200 -250 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -500 0 320 -385 385 1 1 0 N -250 -200 -250 200 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZ125M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZ125M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: BUFFER_/TRISTATE F0 "IC" 100 125 50 H V L B F1 "NC7SZ125M5X" 100 -200 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 200 0 -200 200 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X /OE 1 0 300 200 D 40 40 1 1 I I X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 T # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZ125P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZ125P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: BUFFER_/TRISTATE F0 "IC" 100 125 50 H V L B F1 "NC7SZ125P5X" 100 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 200 0 -200 200 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X /OE 1 0 300 200 D 40 40 1 1 I I X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 T # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZ126M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZ126M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: BUFFER_TRISTATE F0 "IC" 100 125 50 H V L B F1 "NC7SZ126M5X" 100 -200 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 200 0 -200 200 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 T X OE 1 0 300 200 D 40 40 1 1 I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZ126P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZ126P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: BUFFER_TRISTATE F0 "IC" 100 125 50 H V L B F1 "NC7SZ126P5X" 100 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 200 0 -200 200 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 T X OE 1 0 300 200 D 40 40 1 1 I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZ332P6X # Package Name: SOT65P210X110-6AN_SC88_SC70-6 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZ332P6X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: 3OR F0 "IC" -300 225 50 H V L B F1 "NC7SZ332P6X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-6AN_SC88_SC70-6" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -300 200 P 2 1 0 0 -50 -200 -300 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 P 2 1 0 0 -300 0 -230 0 X A 1 -500 100 200 R 40 40 1 1 I X B 3 -500 0 200 R 40 40 1 1 I X C 6 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 2 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZ386P6X # Package Name: SOT65P210X110-6AN_SC88_SC70-6 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZ386P6X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: 3XOR F0 "IC" -300 225 50 H V L B F1 "NC7SZ386P6X" -300 -300 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-6AN_SC88_SC70-6" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -250 200 P 2 1 0 0 -50 -200 -250 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -510 0 320 -385 385 1 1 0 N -260 -200 -260 200 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 P 2 1 0 0 -300 0 -225 0 X A 1 -500 100 200 R 40 40 1 1 I X B 3 -500 0 200 R 40 40 1 1 I X C 6 -500 -100 200 R 40 40 1 1 I X Y 4 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 2 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZU04M5X # Package Name: SOT95P270X145-5N_SC74A_SOT23-5 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZU04M5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7SZU04M5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT95P270X145-5N_SC74A_SOT23-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7SZU04P5X # Package Name: SOT65P210X110-5AN_SC88A_SC70-5 # Dev Tech: Z # Dev Prefix: IC # Gate count = 2 # DEF NC7SZU04P5X IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7SZU04P5X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-5AN_SC88A_SC70-5" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 4 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 3 0 -300 200 U 40 40 2 1 W X VCC 5 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NC7WP00K8X # Package Name: TSSOP50P310X90-8N_MAB08A_US8 # Dev Tech: P # Dev Prefix: IC # Gate count = 3 # DEF NC7WP00K8X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: NAND F0 "IC" -300 225 50 H V L B F1 "NC7WP00K8X" -300 -300 50 H V L B F2 "fairchild-tinylogic-TSSOP50P310X90-8N_MAB08A_US8" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 7 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: NAND P 2 2 0 0 -300 200 -300 -200 P 2 2 0 0 -300 -200 100 -200 A 100 0 200 -899 899 2 1 0 N 100 -200 100 200 P 2 2 0 0 100 200 -300 200 X A 5 -500 100 200 R 40 40 2 1 I X B 6 -500 -100 200 R 40 40 2 1 I X Y 3 500 0 200 L 40 40 2 1 O I # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 4 0 -300 200 U 40 40 3 1 W X VCC 8 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WP02K8X # Package Name: TSSOP50P310X90-8N_MAB08A_US8 # Dev Tech: P # Dev Prefix: IC # Gate count = 3 # DEF NC7WP02K8X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: NOR F0 "IC" -300 225 50 H V L B F1 "NC7WP02K8X" -300 -300 50 H V L B F2 "fairchild-tinylogic-TSSOP50P310X90-8N_MAB08A_US8" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -300 200 P 2 1 0 0 -50 -200 -300 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 7 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: NOR P 2 2 0 0 -50 200 -300 200 P 2 2 0 0 -50 -200 -300 -200 P 2 2 0 0 -300 100 -250 100 P 2 2 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 2 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 2 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 2 1 0 N -300 -200 -300 200 X A 5 -500 100 200 R 40 40 2 1 I X B 6 -500 -100 200 R 40 40 2 1 I X Y 3 500 0 200 L 40 40 2 1 O I # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 4 0 -300 200 U 40 40 3 1 W X VCC 8 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WP08K8X # Package Name: TSSOP50P310X90-8N_MAB08A_US8 # Dev Tech: P # Dev Prefix: IC # Gate count = 3 # DEF NC7WP08K8X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: AND F0 "IC" -300 225 50 H V L B F1 "NC7WP08K8X" -300 -300 50 H V L B F2 "fairchild-tinylogic-TSSOP50P310X90-8N_MAB08A_US8" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 7 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: AND P 2 2 0 0 -300 200 -300 -200 P 2 2 0 0 -300 -200 100 -200 A 100 0 200 -899 899 2 1 0 N 100 -200 100 200 P 2 2 0 0 100 200 -300 200 X A 5 -500 100 200 R 40 40 2 1 I X B 6 -500 -100 200 R 40 40 2 1 I X Y 3 500 0 200 L 40 40 2 1 O # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 4 0 -300 200 U 40 40 3 1 W X VCC 8 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WP14P6X # Package Name: SOT65P210X110-6AN_SC88_SC70-6 # Dev Tech: P # Dev Prefix: IC # Gate count = 3 # DEF NC7WP14P6X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: INVERTER_SCHMITT F0 "IC" 50 125 50 H V L B F1 "NC7WP14P6X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-6AN_SC88_SC70-6" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 P 2 1 0 0 -30 -50 -70 50 P 2 1 0 0 -80 -50 -120 50 P 2 1 0 0 -80 -50 -30 -50 P 2 1 0 0 -30 -50 5 -50 P 2 1 0 0 -155 50 -120 50 P 2 1 0 0 -120 50 -70 50 X I 1 -400 0 200 R 40 40 1 1 I X O 6 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: INVERTER_SCHMITT P 2 2 0 0 -200 200 200 0 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 P 2 2 0 0 -30 -50 -70 50 P 2 2 0 0 -80 -50 -120 50 P 2 2 0 0 -80 -50 -30 -50 P 2 2 0 0 -30 -50 5 -50 P 2 2 0 0 -155 50 -120 50 P 2 2 0 0 -120 50 -70 50 X I 3 -400 0 200 R 40 40 2 1 I X O 4 400 0 200 L 40 40 2 1 O I # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 2 0 -300 200 U 40 40 3 1 W X VCC 5 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WP32K8X # Package Name: TSSOP50P310X90-8N_MAB08A_US8 # Dev Tech: P # Dev Prefix: IC # Gate count = 3 # DEF NC7WP32K8X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: OR F0 "IC" -300 225 50 H V L B F1 "NC7WP32K8X" -300 -300 50 H V L B F2 "fairchild-tinylogic-TSSOP50P310X90-8N_MAB08A_US8" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -300 200 P 2 1 0 0 -50 -200 -300 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 7 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: OR P 2 2 0 0 -50 200 -300 200 P 2 2 0 0 -50 -200 -300 -200 P 2 2 0 0 -300 100 -250 100 P 2 2 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 2 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 2 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 2 1 0 N -300 -200 -300 200 X A 5 -500 100 200 R 40 40 2 1 I X B 6 -500 -100 200 R 40 40 2 1 I X Y 3 500 0 200 L 40 40 2 1 O # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 4 0 -300 200 U 40 40 3 1 W X VCC 8 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WP86K8X # Package Name: TSSOP50P310X90-8N_MAB08A_US8 # Dev Tech: P # Dev Prefix: IC # Gate count = 3 # DEF NC7WP86K8X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: XOR F0 "IC" -300 225 50 H V L B F1 "NC7WP86K8X" -300 -300 50 H V L B F2 "fairchild-tinylogic-TSSOP50P310X90-8N_MAB08A_US8" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -250 200 P 2 1 0 0 -50 -200 -250 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -500 0 320 -385 385 1 1 0 N -250 -200 -250 200 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 7 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: XOR P 2 2 0 0 -50 200 -250 200 P 2 2 0 0 -50 -200 -250 -200 P 2 2 0 0 -300 100 -250 100 P 2 2 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 2 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 2 1 0 N 297 -1 -49 199 A -500 0 320 -385 385 2 1 0 N -250 -200 -250 200 A -550 0 320 -385 385 2 1 0 N -300 -200 -300 200 X A 5 -500 100 200 R 40 40 2 1 I X B 6 -500 -100 200 R 40 40 2 1 I X Y 3 500 0 200 L 40 40 2 1 O # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 4 0 -300 200 U 40 40 3 1 W X VCC 8 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WP125K8X # Package Name: TSSOP50P310X90-8N_MAB08A_US8 # Dev Tech: P # Dev Prefix: IC # Gate count = 3 # DEF NC7WP125K8X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: BUFFER_/TRISTATE F0 "IC" 100 125 50 H V L B F1 "NC7WP125K8X" 100 -200 50 H V L B F2 "fairchild-tinylogic-TSSOP50P310X90-8N_MAB08A_US8" 0 150 50 H I C C DRAW P 2 1 0 0 200 0 -200 200 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X /OE 1 0 300 200 D 40 40 1 1 I I X I 2 -400 0 200 R 40 40 1 1 I X O 6 400 0 200 L 40 40 1 1 T # Gate Name: G$2 # Symbol Name: BUFFER_/TRISTATE P 2 2 0 0 200 0 -200 200 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 X /OE 7 0 300 200 D 40 40 2 1 I I X I 5 -400 0 200 R 40 40 2 1 I X O 3 400 0 200 L 40 40 2 1 T # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 4 0 -300 200 U 40 40 3 1 W X VCC 8 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WP240K8X # Package Name: TSSOP50P310X90-8N_MAB08A_US8 # Dev Tech: P # Dev Prefix: IC # Gate count = 3 # DEF NC7WP240K8X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: INVERTER_/TRISTATE F0 "IC" 100 125 50 H V L B F1 "NC7WP240K8X" 100 -200 50 H V L B F2 "fairchild-tinylogic-TSSOP50P310X90-8N_MAB08A_US8" 0 150 50 H I C C DRAW P 2 1 0 0 200 0 -200 200 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X /OE 1 0 300 200 D 40 40 1 1 I I X I 2 -400 0 200 R 40 40 1 1 I X O 6 400 0 200 L 40 40 1 1 T I # Gate Name: G$2 # Symbol Name: INVERTER_/TRISTATE P 2 2 0 0 200 0 -200 200 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 X /OE 7 0 300 200 D 40 40 2 1 I I X I 5 -400 0 200 R 40 40 2 1 I X O 3 400 0 200 L 40 40 2 1 T I # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 4 0 -300 200 U 40 40 3 1 W X VCC 8 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WV04P6X # Package Name: SOT65P210X110-6AN_SC88_SC70-6 # Dev Tech: V # Dev Prefix: IC # Gate count = 3 # DEF NC7WV04P6X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7WV04P6X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-6AN_SC88_SC70-6" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 1 -400 0 200 R 40 40 1 1 I X O 6 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: INVERTER P 2 2 0 0 -200 200 200 0 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 X I 3 -400 0 200 R 40 40 2 1 I X O 4 400 0 200 L 40 40 2 1 O I # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 2 0 -300 200 U 40 40 3 1 W X VCC 5 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WV07P6X # Package Name: SOT65P210X110-6AN_SC88_SC70-6 # Dev Tech: V # Dev Prefix: IC # Gate count = 3 # DEF NC7WV07P6X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: BUFFER F0 "IC" 50 125 50 H V L B F1 "NC7WV07P6X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-6AN_SC88_SC70-6" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 1 -400 0 200 R 40 40 1 1 I X O 6 400 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: BUFFER P 2 2 0 0 -200 200 200 0 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 X I 3 -400 0 200 R 40 40 2 1 I X O 4 400 0 200 L 40 40 2 1 O # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 2 0 -300 200 U 40 40 3 1 W X VCC 5 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WV14P6X # Package Name: SOT65P210X110-6AN_SC88_SC70-6 # Dev Tech: V # Dev Prefix: IC # Gate count = 3 # DEF NC7WV14P6X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: INVERTER_SCHMITT F0 "IC" 50 125 50 H V L B F1 "NC7WV14P6X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-6AN_SC88_SC70-6" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 P 2 1 0 0 -30 -50 -70 50 P 2 1 0 0 -80 -50 -120 50 P 2 1 0 0 -80 -50 -30 -50 P 2 1 0 0 -30 -50 5 -50 P 2 1 0 0 -155 50 -120 50 P 2 1 0 0 -120 50 -70 50 X I 1 -400 0 200 R 40 40 1 1 I X O 6 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: INVERTER_SCHMITT P 2 2 0 0 -200 200 200 0 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 P 2 2 0 0 -30 -50 -70 50 P 2 2 0 0 -80 -50 -120 50 P 2 2 0 0 -80 -50 -30 -50 P 2 2 0 0 -30 -50 5 -50 P 2 2 0 0 -155 50 -120 50 P 2 2 0 0 -120 50 -70 50 X I 3 -400 0 200 R 40 40 2 1 I X O 4 400 0 200 L 40 40 2 1 O I # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 2 0 -300 200 U 40 40 3 1 W X VCC 5 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WV16P6X # Package Name: SOT65P210X110-6AN_SC88_SC70-6 # Dev Tech: V # Dev Prefix: IC # Gate count = 3 # DEF NC7WV16P6X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: BUFFER F0 "IC" 50 125 50 H V L B F1 "NC7WV16P6X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-6AN_SC88_SC70-6" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 1 -400 0 200 R 40 40 1 1 I X O 6 400 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: BUFFER P 2 2 0 0 -200 200 200 0 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 X I 3 -400 0 200 R 40 40 2 1 I X O 4 400 0 200 L 40 40 2 1 O # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 2 0 -300 200 U 40 40 3 1 W X VCC 5 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WV17P6X # Package Name: SOT65P210X110-6AN_SC88_SC70-6 # Dev Tech: V # Dev Prefix: IC # Gate count = 3 # DEF NC7WV17P6X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: BUFFER_SCHMITT F0 "IC" 50 125 50 H V L B F1 "NC7WV17P6X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-6AN_SC88_SC70-6" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 P 2 1 0 0 -30 -50 -70 50 P 2 1 0 0 -80 -50 -120 50 P 2 1 0 0 -80 -50 -30 -50 P 2 1 0 0 -30 -50 5 -50 P 2 1 0 0 -155 50 -120 50 P 2 1 0 0 -120 50 -70 50 X I 1 -400 0 200 R 40 40 1 1 I X O 6 400 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: BUFFER_SCHMITT P 2 2 0 0 -200 200 200 0 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 P 2 2 0 0 -30 -50 -70 50 P 2 2 0 0 -80 -50 -120 50 P 2 2 0 0 -80 -50 -30 -50 P 2 2 0 0 -30 -50 5 -50 P 2 2 0 0 -155 50 -120 50 P 2 2 0 0 -120 50 -70 50 X I 3 -400 0 200 R 40 40 2 1 I X O 4 400 0 200 L 40 40 2 1 O # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 2 0 -300 200 U 40 40 3 1 W X VCC 5 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WV125K8X # Package Name: TSSOP50P310X90-8N_MAB08A_US8 # Dev Tech: V # Dev Prefix: IC # Gate count = 3 # DEF NC7WV125K8X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: BUFFER_/TRISTATE F0 "IC" 100 125 50 H V L B F1 "NC7WV125K8X" 100 -200 50 H V L B F2 "fairchild-tinylogic-TSSOP50P310X90-8N_MAB08A_US8" 0 150 50 H I C C DRAW P 2 1 0 0 200 0 -200 200 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X /OE 1 0 300 200 D 40 40 1 1 I I X I 2 -400 0 200 R 40 40 1 1 I X O 6 400 0 200 L 40 40 1 1 T # Gate Name: G$2 # Symbol Name: BUFFER_/TRISTATE P 2 2 0 0 200 0 -200 200 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 X /OE 7 0 300 200 D 40 40 2 1 I I X I 5 -400 0 200 R 40 40 2 1 I X O 3 400 0 200 L 40 40 2 1 T # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 4 0 -300 200 U 40 40 3 1 W X VCC 8 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WZ00K8X # Package Name: TSSOP50P310X90-8N_MAB08A_US8 # Dev Tech: Z # Dev Prefix: IC # Gate count = 3 # DEF NC7WZ00K8X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: NAND F0 "IC" -300 225 50 H V L B F1 "NC7WZ00K8X" -300 -300 50 H V L B F2 "fairchild-tinylogic-TSSOP50P310X90-8N_MAB08A_US8" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 7 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: NAND P 2 2 0 0 -300 200 -300 -200 P 2 2 0 0 -300 -200 100 -200 A 100 0 200 -899 899 2 1 0 N 100 -200 100 200 P 2 2 0 0 100 200 -300 200 X A 5 -500 100 200 R 40 40 2 1 I X B 6 -500 -100 200 R 40 40 2 1 I X Y 3 500 0 200 L 40 40 2 1 O I # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 4 0 -300 200 U 40 40 3 1 W X VCC 8 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WZ02K8X # Package Name: TSSOP50P310X90-8N_MAB08A_US8 # Dev Tech: Z # Dev Prefix: IC # Gate count = 3 # DEF NC7WZ02K8X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: NOR F0 "IC" -300 225 50 H V L B F1 "NC7WZ02K8X" -300 -300 50 H V L B F2 "fairchild-tinylogic-TSSOP50P310X90-8N_MAB08A_US8" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -300 200 P 2 1 0 0 -50 -200 -300 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 7 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: NOR P 2 2 0 0 -50 200 -300 200 P 2 2 0 0 -50 -200 -300 -200 P 2 2 0 0 -300 100 -250 100 P 2 2 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 2 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 2 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 2 1 0 N -300 -200 -300 200 X A 5 -500 100 200 R 40 40 2 1 I X B 6 -500 -100 200 R 40 40 2 1 I X Y 3 500 0 200 L 40 40 2 1 O I # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 4 0 -300 200 U 40 40 3 1 W X VCC 8 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WZ04P6X # Package Name: SOT65P210X110-6AN_SC88_SC70-6 # Dev Tech: Z # Dev Prefix: IC # Gate count = 3 # DEF NC7WZ04P6X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7WZ04P6X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-6AN_SC88_SC70-6" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 1 -400 0 200 R 40 40 1 1 I X O 6 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: INVERTER P 2 2 0 0 -200 200 200 0 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 X I 3 -400 0 200 R 40 40 2 1 I X O 4 400 0 200 L 40 40 2 1 O I # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 2 0 -300 200 U 40 40 3 1 W X VCC 5 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WZ07P6X # Package Name: SOT65P210X110-6AN_SC88_SC70-6 # Dev Tech: Z # Dev Prefix: IC # Gate count = 3 # DEF NC7WZ07P6X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: BUFFER F0 "IC" 50 125 50 H V L B F1 "NC7WZ07P6X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-6AN_SC88_SC70-6" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 1 -400 0 200 R 40 40 1 1 I X O 6 400 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: BUFFER P 2 2 0 0 -200 200 200 0 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 X I 3 -400 0 200 R 40 40 2 1 I X O 4 400 0 200 L 40 40 2 1 O # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 2 0 -300 200 U 40 40 3 1 W X VCC 5 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WZ08K8X # Package Name: TSSOP50P310X90-8N_MAB08A_US8 # Dev Tech: Z # Dev Prefix: IC # Gate count = 3 # DEF NC7WZ08K8X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: AND F0 "IC" -300 225 50 H V L B F1 "NC7WZ08K8X" -300 -300 50 H V L B F2 "fairchild-tinylogic-TSSOP50P310X90-8N_MAB08A_US8" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 7 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: AND P 2 2 0 0 -300 200 -300 -200 P 2 2 0 0 -300 -200 100 -200 A 100 0 200 -899 899 2 1 0 N 100 -200 100 200 P 2 2 0 0 100 200 -300 200 X A 5 -500 100 200 R 40 40 2 1 I X B 6 -500 -100 200 R 40 40 2 1 I X Y 3 500 0 200 L 40 40 2 1 O # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 4 0 -300 200 U 40 40 3 1 W X VCC 8 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WZ14P6X # Package Name: SOT65P210X110-6AN_SC88_SC70-6 # Dev Tech: Z # Dev Prefix: IC # Gate count = 3 # DEF NC7WZ14P6X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: INVERTER_SCHMITT F0 "IC" 50 125 50 H V L B F1 "NC7WZ14P6X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-6AN_SC88_SC70-6" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 P 2 1 0 0 -30 -50 -70 50 P 2 1 0 0 -80 -50 -120 50 P 2 1 0 0 -80 -50 -30 -50 P 2 1 0 0 -30 -50 5 -50 P 2 1 0 0 -155 50 -120 50 P 2 1 0 0 -120 50 -70 50 X I 1 -400 0 200 R 40 40 1 1 I X O 6 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: INVERTER_SCHMITT P 2 2 0 0 -200 200 200 0 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 P 2 2 0 0 -30 -50 -70 50 P 2 2 0 0 -80 -50 -120 50 P 2 2 0 0 -80 -50 -30 -50 P 2 2 0 0 -30 -50 5 -50 P 2 2 0 0 -155 50 -120 50 P 2 2 0 0 -120 50 -70 50 X I 3 -400 0 200 R 40 40 2 1 I X O 4 400 0 200 L 40 40 2 1 O I # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 2 0 -300 200 U 40 40 3 1 W X VCC 5 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WZ16P6X # Package Name: SOT65P210X110-6AN_SC88_SC70-6 # Dev Tech: Z # Dev Prefix: IC # Gate count = 3 # DEF NC7WZ16P6X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: BUFFER F0 "IC" 50 125 50 H V L B F1 "NC7WZ16P6X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-6AN_SC88_SC70-6" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 1 -400 0 200 R 40 40 1 1 I X O 6 400 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: BUFFER P 2 2 0 0 -200 200 200 0 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 X I 3 -400 0 200 R 40 40 2 1 I X O 4 400 0 200 L 40 40 2 1 O # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 2 0 -300 200 U 40 40 3 1 W X VCC 5 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WZ17P6X # Package Name: SOT65P210X110-6AN_SC88_SC70-6 # Dev Tech: Z # Dev Prefix: IC # Gate count = 3 # DEF NC7WZ17P6X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: BUFFER_SCHMITT F0 "IC" 50 125 50 H V L B F1 "NC7WZ17P6X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-6AN_SC88_SC70-6" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 P 2 1 0 0 -30 -50 -70 50 P 2 1 0 0 -80 -50 -120 50 P 2 1 0 0 -80 -50 -30 -50 P 2 1 0 0 -30 -50 5 -50 P 2 1 0 0 -155 50 -120 50 P 2 1 0 0 -120 50 -70 50 X I 1 -400 0 200 R 40 40 1 1 I X O 6 400 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: BUFFER_SCHMITT P 2 2 0 0 -200 200 200 0 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 P 2 2 0 0 -30 -50 -70 50 P 2 2 0 0 -80 -50 -120 50 P 2 2 0 0 -80 -50 -30 -50 P 2 2 0 0 -30 -50 5 -50 P 2 2 0 0 -155 50 -120 50 P 2 2 0 0 -120 50 -70 50 X I 3 -400 0 200 R 40 40 2 1 I X O 4 400 0 200 L 40 40 2 1 O # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 2 0 -300 200 U 40 40 3 1 W X VCC 5 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WZ32K8X # Package Name: TSSOP50P310X90-8N_MAB08A_US8 # Dev Tech: Z # Dev Prefix: IC # Gate count = 3 # DEF NC7WZ32K8X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: OR F0 "IC" -300 225 50 H V L B F1 "NC7WZ32K8X" -300 -300 50 H V L B F2 "fairchild-tinylogic-TSSOP50P310X90-8N_MAB08A_US8" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -300 200 P 2 1 0 0 -50 -200 -300 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 7 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: OR P 2 2 0 0 -50 200 -300 200 P 2 2 0 0 -50 -200 -300 -200 P 2 2 0 0 -300 100 -250 100 P 2 2 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 2 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 2 1 0 N 297 -1 -49 199 A -550 0 320 -385 385 2 1 0 N -300 -200 -300 200 X A 5 -500 100 200 R 40 40 2 1 I X B 6 -500 -100 200 R 40 40 2 1 I X Y 3 500 0 200 L 40 40 2 1 O # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 4 0 -300 200 U 40 40 3 1 W X VCC 8 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WZ38K8X # Package Name: TSSOP50P310X90-8N_MAB08A_US8 # Dev Tech: Z # Dev Prefix: IC # Gate count = 3 # DEF NC7WZ38K8X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: NAND F0 "IC" -300 225 50 H V L B F1 "NC7WZ38K8X" -300 -300 50 H V L B F2 "fairchild-tinylogic-TSSOP50P310X90-8N_MAB08A_US8" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 -300 -200 P 2 1 0 0 -300 -200 100 -200 A 100 0 200 -899 899 1 1 0 N 100 -200 100 200 P 2 1 0 0 100 200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 7 500 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: NAND P 2 2 0 0 -300 200 -300 -200 P 2 2 0 0 -300 -200 100 -200 A 100 0 200 -899 899 2 1 0 N 100 -200 100 200 P 2 2 0 0 100 200 -300 200 X A 5 -500 100 200 R 40 40 2 1 I X B 6 -500 -100 200 R 40 40 2 1 I X Y 3 500 0 200 L 40 40 2 1 O I # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 4 0 -300 200 U 40 40 3 1 W X VCC 8 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WZ86K8X # Package Name: TSSOP50P310X90-8N_MAB08A_US8 # Dev Tech: Z # Dev Prefix: IC # Gate count = 3 # DEF NC7WZ86K8X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: XOR F0 "IC" -300 225 50 H V L B F1 "NC7WZ86K8X" -300 -300 50 H V L B F2 "fairchild-tinylogic-TSSOP50P310X90-8N_MAB08A_US8" 0 150 50 H I C C DRAW P 2 1 0 0 -50 200 -250 200 P 2 1 0 0 -50 -200 -250 -200 P 2 1 0 0 -300 100 -250 100 P 2 1 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 1 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 1 1 0 N 297 -1 -49 199 A -500 0 320 -385 385 1 1 0 N -250 -200 -250 200 A -550 0 320 -385 385 1 1 0 N -300 -200 -300 200 X A 1 -500 100 200 R 40 40 1 1 I X B 2 -500 -100 200 R 40 40 1 1 I X Y 7 500 0 200 L 40 40 1 1 O # Gate Name: G$2 # Symbol Name: XOR P 2 2 0 0 -50 200 -250 200 P 2 2 0 0 -50 -200 -250 -200 P 2 2 0 0 -300 100 -250 100 P 2 2 0 0 -300 -100 -250 -100 A -49 199 399 -897 -298 2 1 0 N -49 -199 297 1 A -49 -199 399 -3301 -2702 2 1 0 N 297 -1 -49 199 A -500 0 320 -385 385 2 1 0 N -250 -200 -250 200 A -550 0 320 -385 385 2 1 0 N -300 -200 -300 200 X A 5 -500 100 200 R 40 40 2 1 I X B 6 -500 -100 200 R 40 40 2 1 I X Y 3 500 0 200 L 40 40 2 1 O # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 4 0 -300 200 U 40 40 3 1 W X VCC 8 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WZ125K8X # Package Name: TSSOP50P310X90-8N_MAB08A_US8 # Dev Tech: Z # Dev Prefix: IC # Gate count = 3 # DEF NC7WZ125K8X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: BUFFER_/TRISTATE F0 "IC" 100 125 50 H V L B F1 "NC7WZ125K8X" 100 -200 50 H V L B F2 "fairchild-tinylogic-TSSOP50P310X90-8N_MAB08A_US8" 0 150 50 H I C C DRAW P 2 1 0 0 200 0 -200 200 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X /OE 1 0 300 200 D 40 40 1 1 I I X I 2 -400 0 200 R 40 40 1 1 I X O 6 400 0 200 L 40 40 1 1 T # Gate Name: G$2 # Symbol Name: BUFFER_/TRISTATE P 2 2 0 0 200 0 -200 200 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 X /OE 7 0 300 200 D 40 40 2 1 I I X I 5 -400 0 200 R 40 40 2 1 I X O 3 400 0 200 L 40 40 2 1 T # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 4 0 -300 200 U 40 40 3 1 W X VCC 8 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WZ126K8X # Package Name: TSSOP50P310X90-8N_MAB08A_US8 # Dev Tech: Z # Dev Prefix: IC # Gate count = 3 # DEF NC7WZ126K8X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: BUFFER_TRISTATE F0 "IC" 100 125 50 H V L B F1 "NC7WZ126K8X" 100 -200 50 H V L B F2 "fairchild-tinylogic-TSSOP50P310X90-8N_MAB08A_US8" 0 150 50 H I C C DRAW P 2 1 0 0 200 0 -200 200 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 2 -400 0 200 R 40 40 1 1 I X O 6 400 0 200 L 40 40 1 1 T X OE 1 0 300 200 D 40 40 1 1 I # Gate Name: G$2 # Symbol Name: BUFFER_TRISTATE P 2 2 0 0 200 0 -200 200 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 X I 5 -400 0 200 R 40 40 2 1 I X O 3 400 0 200 L 40 40 2 1 T X OE 7 0 300 200 D 40 40 2 1 I # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 4 0 -300 200 U 40 40 3 1 W X VCC 8 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WZ240K8X # Package Name: TSSOP50P310X90-8N_MAB08A_US8 # Dev Tech: Z # Dev Prefix: IC # Gate count = 3 # DEF NC7WZ240K8X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: INVERTER_/TRISTATE F0 "IC" 100 125 50 H V L B F1 "NC7WZ240K8X" 100 -200 50 H V L B F2 "fairchild-tinylogic-TSSOP50P310X90-8N_MAB08A_US8" 0 150 50 H I C C DRAW P 2 1 0 0 200 0 -200 200 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X /OE 1 0 300 200 D 40 40 1 1 I I X I 2 -400 0 200 R 40 40 1 1 I X O 6 400 0 200 L 40 40 1 1 T I # Gate Name: G$2 # Symbol Name: INVERTER_/TRISTATE P 2 2 0 0 200 0 -200 200 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 X /OE 7 0 300 200 D 40 40 2 1 I I X I 5 -400 0 200 R 40 40 2 1 I X O 3 400 0 200 L 40 40 2 1 T I # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 4 0 -300 200 U 40 40 3 1 W X VCC 8 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WZ241K8X # Package Name: TSSOP50P310X90-8N_MAB08A_US8 # Dev Tech: Z # Dev Prefix: IC # Gate count = 3 # DEF NC7WZ241K8X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: BUFFER_/TRISTATE F0 "IC" 100 125 50 H V L B F1 "NC7WZ241K8X" 100 -200 50 H V L B F2 "fairchild-tinylogic-TSSOP50P310X90-8N_MAB08A_US8" 0 150 50 H I C C DRAW P 2 1 0 0 200 0 -200 200 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X /OE 1 0 300 200 D 40 40 1 1 I I X I 2 -400 0 200 R 40 40 1 1 I X O 6 400 0 200 L 40 40 1 1 T # Gate Name: G$2 # Symbol Name: BUFFER_TRISTATE P 2 2 0 0 200 0 -200 200 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 X I 5 -400 0 200 R 40 40 2 1 I X O 3 400 0 200 L 40 40 2 1 T X OE 7 0 300 200 D 40 40 2 1 I # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 4 0 -300 200 U 40 40 3 1 W X VCC 8 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF # # Dev Name: NC7WZU04P6X # Package Name: SOT65P210X110-6AN_SC88_SC70-6 # Dev Tech: Z # Dev Prefix: IC # Gate count = 3 # DEF NC7WZU04P6X IC 0 40 Y Y 3 L N # Gate Name: G$1 # Symbol Name: INVERTER F0 "IC" 50 125 50 H V L B F1 "NC7WZU04P6X" 50 -200 50 H V L B F2 "fairchild-tinylogic-SOT65P210X110-6AN_SC88_SC70-6" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 0 P 2 1 0 0 200 0 -200 -200 P 2 1 0 0 -200 -200 -200 200 X I 1 -400 0 200 R 40 40 1 1 I X O 6 400 0 200 L 40 40 1 1 O I # Gate Name: G$2 # Symbol Name: INVERTER P 2 2 0 0 -200 200 200 0 P 2 2 0 0 200 0 -200 -200 P 2 2 0 0 -200 -200 -200 200 X I 3 -400 0 200 R 40 40 2 1 I X O 4 400 0 200 L 40 40 2 1 O I # Gate Name: G$3 # Symbol Name: PWRN T 1 50 -155 50 0 3 0 GND T 1 50 175 50 0 3 0 VCC X GND 2 0 -300 200 U 40 40 3 1 W X VCC 5 0 300 200 D 40 40 3 1 W ENDDRAW ENDDEF #End Library