EESchema-LIBRARY Version 2.3 29/04/2008-12:23:02 # Converted with eagle2kicad.ulp Version 0.9 # Device count = 94 # # Dev Name: DSPIC30F2010/MMG # Package Name: QFN-S28-6X6 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F2010/MMG IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F2010 F0 "IC" -1300 800 50 H V L B F1 "DSPIC30F2010/MMG" -1300 -900 50 H V L B F2 "microchip-dspic-QFN-S28-6X6" 0 150 50 H I C C DRAW P 2 1 0 0 -1400 700 1400 700 P 2 1 0 0 1400 700 1400 -700 P 2 1 0 0 1400 -700 -1400 -700 P 2 1 0 0 -1400 -700 -1400 700 X AVDD 25 200 800 100 D 40 40 1 1 W X AVSS 24 200 -800 100 U 40 40 1 1 W X INT0/FLTA/SCK1/OCFA/RE8 13 1500 0 100 L 40 40 1 1 B X INT2/EMUD2/OC2/IC2/RD1 11 1500 -600 100 L 40 40 1 1 B X OSC1/CLKI 6 -1500 -400 100 R 40 40 1 1 I X PGC/EMUC/RX/SDI1/SDA/RF2 15 1500 -200 100 L 40 40 1 1 B X PGD/EMUD/TX/SDO1/SCL/RF3 14 1500 -300 100 L 40 40 1 1 B X PWM1H/RE1 22 1500 500 100 L 40 40 1 1 B X PWM1L/RE0 23 1500 600 100 L 40 40 1 1 B X PWM2H/RE3 20 1500 300 100 L 40 40 1 1 B X PWM2L/RE2 21 1500 400 100 L 40 40 1 1 B X PWM3H/RE5 18 1500 100 100 L 40 40 1 1 B X PWM3L/RE4 19 1500 200 100 L 40 40 1 1 B X RB0/CN2/AN0/EMUD3/VR+ 27 -1500 600 100 R 40 40 1 1 B X RB1/CN3/AN1/EMUC3/VR- 28 -1500 500 100 R 40 40 1 1 B X RB2/CN4/AN2/SS1 1 -1500 400 100 R 40 40 1 1 B X RB3/CN5/AN3/INDX 2 -1500 300 100 R 40 40 1 1 B X RB4/CN6/AN4/QEA/IC7 3 -1500 200 100 R 40 40 1 1 B X RB5/CN7/AN5/QEB/IC8 4 -1500 100 100 R 40 40 1 1 B X RC13/CN1/EMUD1/ATX/T2C 8 -1500 -100 100 R 40 40 1 1 B X RC14/CN0/EMUC1/ARX/T1C 9 -1500 -200 100 R 40 40 1 1 B X RC15/OSC2/CLKO 7 -1500 -300 100 R 40 40 1 1 B X RD0/INT1/EMUC2/OC1/IC1 12 -1500 -600 100 R 40 40 1 1 B X VDD 10 -100 800 100 D 40 40 1 1 W X VDD@1 17 0 800 100 D 40 40 1 1 W X VPP/MCLR 26 1500 -400 100 L 40 40 1 1 I X VSS 5 -100 -800 100 U 40 40 1 1 W X VSS@1 16 0 -800 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F2010/SOG # Package Name: SO-28W # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F2010/SOG IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F2010 F0 "IC" -1300 800 50 H V L B F1 "DSPIC30F2010/SOG" -1300 -900 50 H V L B F2 "microchip-dspic-SO-28W" 0 150 50 H I C C DRAW P 2 1 0 0 -1400 700 1400 700 P 2 1 0 0 1400 700 1400 -700 P 2 1 0 0 1400 -700 -1400 -700 P 2 1 0 0 -1400 -700 -1400 700 X AVDD 28 200 800 100 D 40 40 1 1 W X AVSS 27 200 -800 100 U 40 40 1 1 W X INT0/FLTA/SCK1/OCFA/RE8 16 1500 0 100 L 40 40 1 1 B X INT2/EMUD2/OC2/IC2/RD1 14 1500 -600 100 L 40 40 1 1 B X OSC1/CLKI 9 -1500 -400 100 R 40 40 1 1 I X PGC/EMUC/RX/SDI1/SDA/RF2 18 1500 -200 100 L 40 40 1 1 B X PGD/EMUD/TX/SDO1/SCL/RF3 17 1500 -300 100 L 40 40 1 1 B X PWM1H/RE1 25 1500 500 100 L 40 40 1 1 B X PWM1L/RE0 26 1500 600 100 L 40 40 1 1 B X PWM2H/RE3 23 1500 300 100 L 40 40 1 1 B X PWM2L/RE2 24 1500 400 100 L 40 40 1 1 B X PWM3H/RE5 21 1500 100 100 L 40 40 1 1 B X PWM3L/RE4 22 1500 200 100 L 40 40 1 1 B X RB0/CN2/AN0/EMUD3/VR+ 2 -1500 600 100 R 40 40 1 1 B X RB1/CN3/AN1/EMUC3/VR- 3 -1500 500 100 R 40 40 1 1 B X RB2/CN4/AN2/SS1 4 -1500 400 100 R 40 40 1 1 B X RB3/CN5/AN3/INDX 5 -1500 300 100 R 40 40 1 1 B X RB4/CN6/AN4/QEA/IC7 6 -1500 200 100 R 40 40 1 1 B X RB5/CN7/AN5/QEB/IC8 7 -1500 100 100 R 40 40 1 1 B X RC13/CN1/EMUD1/ATX/T2C 11 -1500 -100 100 R 40 40 1 1 B X RC14/CN0/EMUC1/ARX/T1C 12 -1500 -200 100 R 40 40 1 1 B X RC15/OSC2/CLKO 10 -1500 -300 100 R 40 40 1 1 B X RD0/INT1/EMUC2/OC1/IC1 15 -1500 -600 100 R 40 40 1 1 B X VDD 13 -100 800 100 D 40 40 1 1 W X VDD@1 20 0 800 100 D 40 40 1 1 W X VPP/MCLR 1 1500 -400 100 L 40 40 1 1 I X VSS 8 -100 -800 100 U 40 40 1 1 W X VSS@1 19 0 -800 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F2010/SPG # Package Name: DIL28-3 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F2010/SPG IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F2010 F0 "IC" -1300 800 50 H V L B F1 "DSPIC30F2010/SPG" -1300 -900 50 H V L B F2 "microchip-dspic-DIL28-3" 0 150 50 H I C C DRAW P 2 1 0 0 -1400 700 1400 700 P 2 1 0 0 1400 700 1400 -700 P 2 1 0 0 1400 -700 -1400 -700 P 2 1 0 0 -1400 -700 -1400 700 X AVDD 28 200 800 100 D 40 40 1 1 W X AVSS 27 200 -800 100 U 40 40 1 1 W X INT0/FLTA/SCK1/OCFA/RE8 16 1500 0 100 L 40 40 1 1 B X INT2/EMUD2/OC2/IC2/RD1 14 1500 -600 100 L 40 40 1 1 B X OSC1/CLKI 9 -1500 -400 100 R 40 40 1 1 I X PGC/EMUC/RX/SDI1/SDA/RF2 18 1500 -200 100 L 40 40 1 1 B X PGD/EMUD/TX/SDO1/SCL/RF3 17 1500 -300 100 L 40 40 1 1 B X PWM1H/RE1 25 1500 500 100 L 40 40 1 1 B X PWM1L/RE0 26 1500 600 100 L 40 40 1 1 B X PWM2H/RE3 23 1500 300 100 L 40 40 1 1 B X PWM2L/RE2 24 1500 400 100 L 40 40 1 1 B X PWM3H/RE5 21 1500 100 100 L 40 40 1 1 B X PWM3L/RE4 22 1500 200 100 L 40 40 1 1 B X RB0/CN2/AN0/EMUD3/VR+ 2 -1500 600 100 R 40 40 1 1 B X RB1/CN3/AN1/EMUC3/VR- 3 -1500 500 100 R 40 40 1 1 B X RB2/CN4/AN2/SS1 4 -1500 400 100 R 40 40 1 1 B X RB3/CN5/AN3/INDX 5 -1500 300 100 R 40 40 1 1 B X RB4/CN6/AN4/QEA/IC7 6 -1500 200 100 R 40 40 1 1 B X RB5/CN7/AN5/QEB/IC8 7 -1500 100 100 R 40 40 1 1 B X RC13/CN1/EMUD1/ATX/T2C 11 -1500 -100 100 R 40 40 1 1 B X RC14/CN0/EMUC1/ARX/T1C 12 -1500 -200 100 R 40 40 1 1 B X RC15/OSC2/CLKO 10 -1500 -300 100 R 40 40 1 1 B X RD0/INT1/EMUC2/OC1/IC1 15 -1500 -600 100 R 40 40 1 1 B X VDD 13 -100 800 100 D 40 40 1 1 W X VDD@1 20 0 800 100 D 40 40 1 1 W X VPP/MCLR 1 1500 -400 100 L 40 40 1 1 I X VSS 8 -100 -800 100 U 40 40 1 1 W X VSS@1 19 0 -800 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F2011/ML # Package Name: QFN-S28-6X6 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F2011/ML IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F2011/3012 F0 "IC" -1500 600 50 H V L B F1 "DSPIC30F2011/ML" -1500 -700 50 H V L B F2 "microchip-dspic-QFN-S28-6X6" 0 150 50 H I C C DRAW P 2 1 0 0 -1500 500 1600 500 P 2 1 0 0 1600 500 1600 -500 P 2 1 0 0 1600 -500 -1500 -500 P 2 1 0 0 -1500 -500 -1500 500 X AVDD 25 -200 600 100 D 40 40 1 1 W X AVSS 24 -200 -600 100 U 40 40 1 1 W X CLKI/OSC1 6 1700 0 100 L 40 40 1 1 B X EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14 9 1700 300 100 L 40 40 1 1 B X EMUC2/OC1/IC1/INT1/RD0 12 1700 -200 100 L 40 40 1 1 B X EMUD1/SOSCI/T2CK/U1ATX/CN1/RC13 8 1700 400 100 L 40 40 1 1 B X RB0/AN0/CN2/VR+ 27 -1600 400 100 R 40 40 1 1 B X RB1/AN1/CN3/VR- 28 -1600 300 100 R 40 40 1 1 B X RB2/AN2/CN4/LVDIN/SS1 1 -1600 200 100 R 40 40 1 1 B X RB3/AN3/CN5 2 -1600 100 100 R 40 40 1 1 B X RB4/AN4/CN6/U1TX/SDO1/SCL/EMUD/PGD 14 -1600 0 100 R 40 40 1 1 B X RB5/AN5/CN7/U1RX/SDI1/SDA/EMUC/PGC 15 -1600 -100 100 R 40 40 1 1 B X RB6/AN6/INT0/SCK1/OCFA 23 -1600 -200 100 R 40 40 1 1 B X RB7/AN7/IC2/OC2/EMUD2 22 -1600 -300 100 R 40 40 1 1 B X RC15/CLKO/OSC2 7 1700 100 100 L 40 40 1 1 B X VDD 10 -300 600 100 D 40 40 1 1 W X VPP/MCLR 26 1700 -400 100 L 40 40 1 1 I X VSS 5 -300 -600 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F2011/P # Package Name: DIL18 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F2011/P IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F2011/3012 F0 "IC" -1500 600 50 H V L B F1 "DSPIC30F2011/P" -1500 -700 50 H V L B F2 "microchip-dspic-DIL18" 0 150 50 H I C C DRAW P 2 1 0 0 -1500 500 1600 500 P 2 1 0 0 1600 500 1600 -500 P 2 1 0 0 1600 -500 -1500 -500 P 2 1 0 0 -1500 -500 -1500 500 X AVDD 18 -200 600 100 D 40 40 1 1 W X AVSS 17 -200 -600 100 U 40 40 1 1 W X CLKI/OSC1 6 1700 0 100 L 40 40 1 1 B X EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14 9 1700 300 100 L 40 40 1 1 B X EMUC2/OC1/IC1/INT1/RD0 10 1700 -200 100 L 40 40 1 1 B X EMUD1/SOSCI/T2CK/U1ATX/CN1/RC13 8 1700 400 100 L 40 40 1 1 B X RB0/AN0/CN2/VR+ 2 -1600 400 100 R 40 40 1 1 B X RB1/AN1/CN3/VR- 3 -1600 300 100 R 40 40 1 1 B X RB2/AN2/CN4/LVDIN/SS1 4 -1600 200 100 R 40 40 1 1 B X RB3/AN3/CN5 5 -1600 100 100 R 40 40 1 1 B X RB4/AN4/CN6/U1TX/SDO1/SCL/EMUD/PGD 11 -1600 0 100 R 40 40 1 1 B X RB5/AN5/CN7/U1RX/SDI1/SDA/EMUC/PGC 12 -1600 -100 100 R 40 40 1 1 B X RB6/AN6/INT0/SCK1/OCFA 16 -1600 -200 100 R 40 40 1 1 B X RB7/AN7/IC2/OC2/EMUD2 15 -1600 -300 100 R 40 40 1 1 B X RC15/CLKO/OSC2 7 1700 100 100 L 40 40 1 1 B X VDD 14 -300 600 100 D 40 40 1 1 W X VPP/MCLR 1 1700 -400 100 L 40 40 1 1 I X VSS 13 -300 -600 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F2011/SO # Package Name: SO-18W # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F2011/SO IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F2011/3012 F0 "IC" -1500 600 50 H V L B F1 "DSPIC30F2011/SO" -1500 -700 50 H V L B F2 "microchip-dspic-SO-18W" 0 150 50 H I C C DRAW P 2 1 0 0 -1500 500 1600 500 P 2 1 0 0 1600 500 1600 -500 P 2 1 0 0 1600 -500 -1500 -500 P 2 1 0 0 -1500 -500 -1500 500 X AVDD 18 -200 600 100 D 40 40 1 1 W X AVSS 17 -200 -600 100 U 40 40 1 1 W X CLKI/OSC1 6 1700 0 100 L 40 40 1 1 B X EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14 9 1700 300 100 L 40 40 1 1 B X EMUC2/OC1/IC1/INT1/RD0 10 1700 -200 100 L 40 40 1 1 B X EMUD1/SOSCI/T2CK/U1ATX/CN1/RC13 8 1700 400 100 L 40 40 1 1 B X RB0/AN0/CN2/VR+ 2 -1600 400 100 R 40 40 1 1 B X RB1/AN1/CN3/VR- 3 -1600 300 100 R 40 40 1 1 B X RB2/AN2/CN4/LVDIN/SS1 4 -1600 200 100 R 40 40 1 1 B X RB3/AN3/CN5 5 -1600 100 100 R 40 40 1 1 B X RB4/AN4/CN6/U1TX/SDO1/SCL/EMUD/PGD 11 -1600 0 100 R 40 40 1 1 B X RB5/AN5/CN7/U1RX/SDI1/SDA/EMUC/PGC 12 -1600 -100 100 R 40 40 1 1 B X RB6/AN6/INT0/SCK1/OCFA 16 -1600 -200 100 R 40 40 1 1 B X RB7/AN7/IC2/OC2/EMUD2 15 -1600 -300 100 R 40 40 1 1 B X RC15/CLKO/OSC2 7 1700 100 100 L 40 40 1 1 B X VDD 14 -300 600 100 D 40 40 1 1 W X VPP/MCLR 1 1700 -400 100 L 40 40 1 1 I X VSS 13 -300 -600 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F2012/ML # Package Name: QFN-S28-6X6 # Dev Tech: '' # Dev Prefix: # Gate count = 1 # DEF DSPIC30F2012/ML ?? 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F2012 DRAW P 2 1 0 0 -1200 900 -1200 -900 P 2 1 0 0 -1200 -900 1200 -900 P 2 1 0 0 1200 -900 1200 900 P 2 1 0 0 1200 900 -1200 900 X AVDD 25 600 1000 100 D 40 40 1 1 W X AVSS 24 600 -1000 100 U 40 40 1 1 W X CN17/RF4 19 1300 -100 100 L 40 40 1 1 B X CN18/RF5 18 1300 -200 100 L 40 40 1 1 B X EMUC2/IC1/INT1/RD8 12 1300 400 100 L 40 40 1 1 B X IC2/INT2/RD9 11 1300 300 100 L 40 40 1 1 B X MCLR/VPP 26 1300 -500 100 L 40 40 1 1 I X OSC1/CLKI 6 -1300 -700 100 R 40 40 1 1 I X OSC2/CLKO/RC15 7 -1300 -600 100 R 40 40 1 1 B X PGC/EMUC/U1RX/SDI1/SDA/RF2 15 1300 100 100 L 40 40 1 1 B X PGD/EMUD/U1TX/SDO1/SCL/RF3 14 1300 0 100 L 40 40 1 1 B X RB0/AN0/CN2/EMUD3/VR+ 27 -1300 700 100 R 40 40 1 1 B X RB1/AN1/CN3/EMUC3/VR- 28 -1300 600 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 1 -1300 500 100 R 40 40 1 1 B X RB3/AN3/CN5 2 -1300 400 100 R 40 40 1 1 B X RB4/AN4/CN6 3 -1300 300 100 R 40 40 1 1 B X RB5/AN5/CN7 4 -1300 200 100 R 40 40 1 1 B X RB6/AN6/OCFA 23 -1300 100 100 R 40 40 1 1 B X RB7/AN7/EMUD2 22 -1300 0 100 R 40 40 1 1 B X RB8/AN8/OC1 21 -1300 -100 100 R 40 40 1 1 B X RB9/AN9/OC2 20 -1300 -200 100 R 40 40 1 1 B X RC13/CN1/EMUD1/SOSCI/T2CK/U1ATX 8 -1300 -400 100 R 40 40 1 1 B X RC14/CN0/EMUC1/SOSCO/T1CK/U1ARX 9 -1300 -500 100 R 40 40 1 1 B X SCK1/INT0/RF6 13 1300 -300 100 L 40 40 1 1 B X VDD 10 300 1000 100 D 40 40 1 1 W X VDD@1 17 400 1000 100 D 40 40 1 1 W X VSS 5 300 -1000 100 U 40 40 1 1 W X VSS@1 16 400 -1000 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F2012/SO # Package Name: SO-28W # Dev Tech: '' # Dev Prefix: # Gate count = 1 # DEF DSPIC30F2012/SO ?? 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F2012 DRAW P 2 1 0 0 -1200 900 -1200 -900 P 2 1 0 0 -1200 -900 1200 -900 P 2 1 0 0 1200 -900 1200 900 P 2 1 0 0 1200 900 -1200 900 X AVDD 28 600 1000 100 D 40 40 1 1 W X AVSS 27 600 -1000 100 U 40 40 1 1 W X CN17/RF4 22 1300 -100 100 L 40 40 1 1 B X CN18/RF5 21 1300 -200 100 L 40 40 1 1 B X EMUC2/IC1/INT1/RD8 15 1300 400 100 L 40 40 1 1 B X IC2/INT2/RD9 14 1300 300 100 L 40 40 1 1 B X MCLR/VPP 1 1300 -500 100 L 40 40 1 1 I X OSC1/CLKI 9 -1300 -700 100 R 40 40 1 1 I X OSC2/CLKO/RC15 10 -1300 -600 100 R 40 40 1 1 B X PGC/EMUC/U1RX/SDI1/SDA/RF2 18 1300 100 100 L 40 40 1 1 B X PGD/EMUD/U1TX/SDO1/SCL/RF3 17 1300 0 100 L 40 40 1 1 B X RB0/AN0/CN2/EMUD3/VR+ 2 -1300 700 100 R 40 40 1 1 B X RB1/AN1/CN3/EMUC3/VR- 3 -1300 600 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 4 -1300 500 100 R 40 40 1 1 B X RB3/AN3/CN5 5 -1300 400 100 R 40 40 1 1 B X RB4/AN4/CN6 6 -1300 300 100 R 40 40 1 1 B X RB5/AN5/CN7 7 -1300 200 100 R 40 40 1 1 B X RB6/AN6/OCFA 26 -1300 100 100 R 40 40 1 1 B X RB7/AN7/EMUD2 25 -1300 0 100 R 40 40 1 1 B X RB8/AN8/OC1 24 -1300 -100 100 R 40 40 1 1 B X RB9/AN9/OC2 23 -1300 -200 100 R 40 40 1 1 B X RC13/CN1/EMUD1/SOSCI/T2CK/U1ATX 11 -1300 -400 100 R 40 40 1 1 B X RC14/CN0/EMUC1/SOSCO/T1CK/U1ARX 12 -1300 -500 100 R 40 40 1 1 B X SCK1/INT0/RF6 16 1300 -300 100 L 40 40 1 1 B X VDD 13 300 1000 100 D 40 40 1 1 W X VDD@1 20 400 1000 100 D 40 40 1 1 W X VSS 8 300 -1000 100 U 40 40 1 1 W X VSS@1 19 400 -1000 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F2012/SP # Package Name: DIL28-3 # Dev Tech: '' # Dev Prefix: # Gate count = 1 # DEF DSPIC30F2012/SP ?? 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F2012 DRAW P 2 1 0 0 -1200 900 -1200 -900 P 2 1 0 0 -1200 -900 1200 -900 P 2 1 0 0 1200 -900 1200 900 P 2 1 0 0 1200 900 -1200 900 X AVDD 28 600 1000 100 D 40 40 1 1 W X AVSS 27 600 -1000 100 U 40 40 1 1 W X CN17/RF4 22 1300 -100 100 L 40 40 1 1 B X CN18/RF5 21 1300 -200 100 L 40 40 1 1 B X EMUC2/IC1/INT1/RD8 15 1300 400 100 L 40 40 1 1 B X IC2/INT2/RD9 14 1300 300 100 L 40 40 1 1 B X MCLR/VPP 1 1300 -500 100 L 40 40 1 1 I X OSC1/CLKI 9 -1300 -700 100 R 40 40 1 1 I X OSC2/CLKO/RC15 10 -1300 -600 100 R 40 40 1 1 B X PGC/EMUC/U1RX/SDI1/SDA/RF2 18 1300 100 100 L 40 40 1 1 B X PGD/EMUD/U1TX/SDO1/SCL/RF3 17 1300 0 100 L 40 40 1 1 B X RB0/AN0/CN2/EMUD3/VR+ 2 -1300 700 100 R 40 40 1 1 B X RB1/AN1/CN3/EMUC3/VR- 3 -1300 600 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 4 -1300 500 100 R 40 40 1 1 B X RB3/AN3/CN5 5 -1300 400 100 R 40 40 1 1 B X RB4/AN4/CN6 6 -1300 300 100 R 40 40 1 1 B X RB5/AN5/CN7 7 -1300 200 100 R 40 40 1 1 B X RB6/AN6/OCFA 26 -1300 100 100 R 40 40 1 1 B X RB7/AN7/EMUD2 25 -1300 0 100 R 40 40 1 1 B X RB8/AN8/OC1 24 -1300 -100 100 R 40 40 1 1 B X RB9/AN9/OC2 23 -1300 -200 100 R 40 40 1 1 B X RC13/CN1/EMUD1/SOSCI/T2CK/U1ATX 11 -1300 -400 100 R 40 40 1 1 B X RC14/CN0/EMUC1/SOSCO/T1CK/U1ARX 12 -1300 -500 100 R 40 40 1 1 B X SCK1/INT0/RF6 16 1300 -300 100 L 40 40 1 1 B X VDD 13 300 1000 100 D 40 40 1 1 W X VDD@1 20 400 1000 100 D 40 40 1 1 W X VSS 8 300 -1000 100 U 40 40 1 1 W X VSS@1 19 400 -1000 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F3010/SO # Package Name: SO-28W # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F3010/SO IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F2010 F0 "IC" -1300 800 50 H V L B F1 "DSPIC30F3010/SO" -1300 -900 50 H V L B F2 "microchip-dspic-SO-28W" 0 150 50 H I C C DRAW P 2 1 0 0 -1400 700 1400 700 P 2 1 0 0 1400 700 1400 -700 P 2 1 0 0 1400 -700 -1400 -700 P 2 1 0 0 -1400 -700 -1400 700 X AVDD 28 200 800 100 D 40 40 1 1 W X AVSS 27 200 -800 100 U 40 40 1 1 W X INT0/FLTA/SCK1/OCFA/RE8 16 1500 0 100 L 40 40 1 1 B X INT2/EMUD2/OC2/IC2/RD1 14 1500 -600 100 L 40 40 1 1 B X OSC1/CLKI 9 -1500 -400 100 R 40 40 1 1 I X PGC/EMUC/RX/SDI1/SDA/RF2 18 1500 -200 100 L 40 40 1 1 B X PGD/EMUD/TX/SDO1/SCL/RF3 17 1500 -300 100 L 40 40 1 1 B X PWM1H/RE1 25 1500 500 100 L 40 40 1 1 B X PWM1L/RE0 26 1500 600 100 L 40 40 1 1 B X PWM2H/RE3 23 1500 300 100 L 40 40 1 1 B X PWM2L/RE2 24 1500 400 100 L 40 40 1 1 B X PWM3H/RE5 21 1500 100 100 L 40 40 1 1 B X PWM3L/RE4 22 1500 200 100 L 40 40 1 1 B X RB0/CN2/AN0/EMUD3/VR+ 2 -1500 600 100 R 40 40 1 1 B X RB1/CN3/AN1/EMUC3/VR- 3 -1500 500 100 R 40 40 1 1 B X RB2/CN4/AN2/SS1 4 -1500 400 100 R 40 40 1 1 B X RB3/CN5/AN3/INDX 5 -1500 300 100 R 40 40 1 1 B X RB4/CN6/AN4/QEA/IC7 6 -1500 200 100 R 40 40 1 1 B X RB5/CN7/AN5/QEB/IC8 7 -1500 100 100 R 40 40 1 1 B X RC13/CN1/EMUD1/ATX/T2C 11 -1500 -100 100 R 40 40 1 1 B X RC14/CN0/EMUC1/ARX/T1C 12 -1500 -200 100 R 40 40 1 1 B X RC15/OSC2/CLKO 10 -1500 -300 100 R 40 40 1 1 B X RD0/INT1/EMUC2/OC1/IC1 15 -1500 -600 100 R 40 40 1 1 B X VDD 13 -100 800 100 D 40 40 1 1 W X VDD@1 20 0 800 100 D 40 40 1 1 W X VPP/MCLR 1 1500 -400 100 L 40 40 1 1 I X VSS 8 -100 -800 100 U 40 40 1 1 W X VSS@1 19 0 -800 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F3010/SP # Package Name: DIL28-3 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F3010/SP IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F2010 F0 "IC" -1300 800 50 H V L B F1 "DSPIC30F3010/SP" -1300 -900 50 H V L B F2 "microchip-dspic-DIL28-3" 0 150 50 H I C C DRAW P 2 1 0 0 -1400 700 1400 700 P 2 1 0 0 1400 700 1400 -700 P 2 1 0 0 1400 -700 -1400 -700 P 2 1 0 0 -1400 -700 -1400 700 X AVDD 28 200 800 100 D 40 40 1 1 W X AVSS 27 200 -800 100 U 40 40 1 1 W X INT0/FLTA/SCK1/OCFA/RE8 16 1500 0 100 L 40 40 1 1 B X INT2/EMUD2/OC2/IC2/RD1 14 1500 -600 100 L 40 40 1 1 B X OSC1/CLKI 9 -1500 -400 100 R 40 40 1 1 I X PGC/EMUC/RX/SDI1/SDA/RF2 18 1500 -200 100 L 40 40 1 1 B X PGD/EMUD/TX/SDO1/SCL/RF3 17 1500 -300 100 L 40 40 1 1 B X PWM1H/RE1 25 1500 500 100 L 40 40 1 1 B X PWM1L/RE0 26 1500 600 100 L 40 40 1 1 B X PWM2H/RE3 23 1500 300 100 L 40 40 1 1 B X PWM2L/RE2 24 1500 400 100 L 40 40 1 1 B X PWM3H/RE5 21 1500 100 100 L 40 40 1 1 B X PWM3L/RE4 22 1500 200 100 L 40 40 1 1 B X RB0/CN2/AN0/EMUD3/VR+ 2 -1500 600 100 R 40 40 1 1 B X RB1/CN3/AN1/EMUC3/VR- 3 -1500 500 100 R 40 40 1 1 B X RB2/CN4/AN2/SS1 4 -1500 400 100 R 40 40 1 1 B X RB3/CN5/AN3/INDX 5 -1500 300 100 R 40 40 1 1 B X RB4/CN6/AN4/QEA/IC7 6 -1500 200 100 R 40 40 1 1 B X RB5/CN7/AN5/QEB/IC8 7 -1500 100 100 R 40 40 1 1 B X RC13/CN1/EMUD1/ATX/T2C 11 -1500 -100 100 R 40 40 1 1 B X RC14/CN0/EMUC1/ARX/T1C 12 -1500 -200 100 R 40 40 1 1 B X RC15/OSC2/CLKO 10 -1500 -300 100 R 40 40 1 1 B X RD0/INT1/EMUC2/OC1/IC1 15 -1500 -600 100 R 40 40 1 1 B X VDD 13 -100 800 100 D 40 40 1 1 W X VDD@1 20 0 800 100 D 40 40 1 1 W X VPP/MCLR 1 1500 -400 100 L 40 40 1 1 I X VSS 8 -100 -800 100 U 40 40 1 1 W X VSS@1 19 0 -800 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F3011/ML # Package Name: QFN44-8X8 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F3011/ML IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F3011 F0 "IC" -1100 1200 50 H V L B F1 "DSPIC30F3011/ML" -1100 -1200 50 H V L B F2 "microchip-dspic-QFN44-8X8" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 1100 1100 1100 P 2 1 0 0 1100 1100 1100 -1000 P 2 1 0 0 1100 -1000 -1100 -1000 P 2 1 0 0 -1100 -1000 -1100 1100 X AVDD 17 400 1200 100 D 40 40 1 1 W X AVSS 16 200 -1100 100 U 40 40 1 1 W X CN17/U2RX/RF4 3 1200 -700 100 L 40 40 1 1 B X CN18/U2TX/RF5 2 1200 -800 100 L 40 40 1 1 B X FLTA/INT0/RE8 36 1200 400 100 L 40 40 1 1 B X OSC1/CLKI 32 -1200 -900 100 R 40 40 1 1 I X OSC2/CLKO/RC15 33 -1200 -800 100 R 40 40 1 1 B X PGC/EMUC/SDI1/SDA/U1RX/RF2 1 1200 -500 100 L 40 40 1 1 B X PGD/EMUD/SDO1/SCL/U1TX/RF3 44 1200 -600 100 L 40 40 1 1 B X PWM1H/RE1 14 1200 900 100 L 40 40 1 1 B X PWM1L/RE0 15 1200 1000 100 L 40 40 1 1 B X PWM2H/RE3 11 1200 700 100 L 40 40 1 1 B X PWM2L/RE2 12 1200 800 100 L 40 40 1 1 B X PWM3H/RE5 9 1200 500 100 L 40 40 1 1 B X PWM3L/RE4 10 1200 600 100 L 40 40 1 1 B X RB0/AN0/CN2/EMUD3/VR+ 19 -1200 1000 100 R 40 40 1 1 B X RB1/AN1/CN3/EMUC3/VR- 20 -1200 900 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1 21 -1200 800 100 R 40 40 1 1 B X RB3/AN3/CN5/INDX 22 -1200 700 100 R 40 40 1 1 B X RB4/AN4/CN6/IC7/QEA 23 -1200 600 100 R 40 40 1 1 B X RB5/AN5/CN7/IC8/QEB 24 -1200 500 100 R 40 40 1 1 B X RB6/AN6/OCFA 25 -1200 400 100 R 40 40 1 1 B X RB7/AN7 26 -1200 300 100 R 40 40 1 1 B X RB8/AN8 27 -1200 200 100 R 40 40 1 1 B X RC13/CN1/T2CK/U1ATX/SOSCI/EMUD1 34 -1200 0 100 R 40 40 1 1 B X RC14/CN0/T1CK/U1ARX/SOSCO/EMUC1 35 -1200 -100 100 R 40 40 1 1 B X RD0/INT1/IC1/OC1/EMUC2 42 -1200 -300 100 R 40 40 1 1 B X RD1/INT2/IC2/OC2/EMUD2 37 -1200 -400 100 R 40 40 1 1 B X RD2/OC3 41 -1200 -500 100 R 40 40 1 1 B X RD3/OC4 38 -1200 -600 100 R 40 40 1 1 B X RF0 5 1200 -300 100 L 40 40 1 1 B X RF1 4 1200 -400 100 L 40 40 1 1 B X SCK1/RF6 43 1200 -900 100 L 40 40 1 1 B X VDD 7 100 1200 100 D 40 40 1 1 W X VDD@1 28 200 1200 100 D 40 40 1 1 W X VDD@2 40 300 1200 100 D 40 40 1 1 W X VPP/MCLR 18 1200 200 100 L 40 40 1 1 I X VSS 6 -100 -1100 100 U 40 40 1 1 W X VSS@1 30 0 -1100 100 U 40 40 1 1 W X VSS@2 39 100 -1100 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F3011/P # Package Name: DIL40 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F3011/P IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F3011 F0 "IC" -1100 1200 50 H V L B F1 "DSPIC30F3011/P" -1100 -1200 50 H V L B F2 "microchip-dspic-DIL40" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 1100 1100 1100 P 2 1 0 0 1100 1100 1100 -1000 P 2 1 0 0 1100 -1000 -1100 -1000 P 2 1 0 0 -1100 -1000 -1100 1100 X AVDD 40 400 1200 100 D 40 40 1 1 W X AVSS 39 200 -1100 100 U 40 40 1 1 W X CN17/U2RX/RF4 28 1200 -700 100 L 40 40 1 1 B X CN18/U2TX/RF5 27 1200 -800 100 L 40 40 1 1 B X FLTA/INT0/RE8 17 1200 400 100 L 40 40 1 1 B X OSC1/CLKI 13 -1200 -900 100 R 40 40 1 1 I X OSC2/CLKO/RC15 14 -1200 -800 100 R 40 40 1 1 B X PGC/EMUC/SDI1/SDA/U1RX/RF2 26 1200 -500 100 L 40 40 1 1 B X PGD/EMUD/SDO1/SCL/U1TX/RF3 25 1200 -600 100 L 40 40 1 1 B X PWM1H/RE1 37 1200 900 100 L 40 40 1 1 B X PWM1L/RE0 38 1200 1000 100 L 40 40 1 1 B X PWM2H/RE3 35 1200 700 100 L 40 40 1 1 B X PWM2L/RE2 36 1200 800 100 L 40 40 1 1 B X PWM3H/RE5 33 1200 500 100 L 40 40 1 1 B X PWM3L/RE4 34 1200 600 100 L 40 40 1 1 B X RB0/AN0/CN2/EMUD3/VR+ 2 -1200 1000 100 R 40 40 1 1 B X RB1/AN1/CN3/EMUC3/VR- 3 -1200 900 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1 4 -1200 800 100 R 40 40 1 1 B X RB3/AN3/CN5/INDX 5 -1200 700 100 R 40 40 1 1 B X RB4/AN4/CN6/IC7/QEA 6 -1200 600 100 R 40 40 1 1 B X RB5/AN5/CN7/IC8/QEB 7 -1200 500 100 R 40 40 1 1 B X RB6/AN6/OCFA 8 -1200 400 100 R 40 40 1 1 B X RB7/AN7 9 -1200 300 100 R 40 40 1 1 B X RB8/AN8 10 -1200 200 100 R 40 40 1 1 B X RC13/CN1/T2CK/U1ATX/SOSCI/EMUD1 15 -1200 0 100 R 40 40 1 1 B X RC14/CN0/T1CK/U1ARX/SOSCO/EMUC1 16 -1200 -100 100 R 40 40 1 1 B X RD0/INT1/IC1/OC1/EMUC2 23 -1200 -300 100 R 40 40 1 1 B X RD1/INT2/IC2/OC2/EMUD2 18 -1200 -400 100 R 40 40 1 1 B X RD2/OC3 22 -1200 -500 100 R 40 40 1 1 B X RD3/OC4 19 -1200 -600 100 R 40 40 1 1 B X RF0 30 1200 -300 100 L 40 40 1 1 B X RF1 29 1200 -400 100 L 40 40 1 1 B X SCK1/RF6 24 1200 -900 100 L 40 40 1 1 B X VDD 11 100 1200 100 D 40 40 1 1 W X VDD@1 21 200 1200 100 D 40 40 1 1 W X VDD@2 32 300 1200 100 D 40 40 1 1 W X VPP/MCLR 1 1200 200 100 L 40 40 1 1 I X VSS 12 -100 -1100 100 U 40 40 1 1 W X VSS@1 20 0 -1100 100 U 40 40 1 1 W X VSS@2 31 100 -1100 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F3011/PT # Package Name: TQFP44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F3011/PT IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F3011 F0 "IC" -1100 1200 50 H V L B F1 "DSPIC30F3011/PT" -1100 -1200 50 H V L B F2 "microchip-dspic-TQFP44" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 1100 1100 1100 P 2 1 0 0 1100 1100 1100 -1000 P 2 1 0 0 1100 -1000 -1100 -1000 P 2 1 0 0 -1100 -1000 -1100 1100 X AVDD 17 400 1200 100 D 40 40 1 1 W X AVSS 16 200 -1100 100 U 40 40 1 1 W X CN17/U2RX/RF4 3 1200 -700 100 L 40 40 1 1 B X CN18/U2TX/RF5 2 1200 -800 100 L 40 40 1 1 B X FLTA/INT0/RE8 36 1200 400 100 L 40 40 1 1 B X OSC1/CLKI 30 -1200 -900 100 R 40 40 1 1 I X OSC2/CLKO/RC15 31 -1200 -800 100 R 40 40 1 1 B X PGC/EMUC/SDI1/SDA/U1RX/RF2 1 1200 -500 100 L 40 40 1 1 B X PGD/EMUD/SDO1/SCL/U1TX/RF3 44 1200 -600 100 L 40 40 1 1 B X PWM1H/RE1 14 1200 900 100 L 40 40 1 1 B X PWM1L/RE0 15 1200 1000 100 L 40 40 1 1 B X PWM2H/RE3 10 1200 700 100 L 40 40 1 1 B X PWM2L/RE2 11 1200 800 100 L 40 40 1 1 B X PWM3H/RE5 8 1200 500 100 L 40 40 1 1 B X PWM3L/RE4 9 1200 600 100 L 40 40 1 1 B X RB0/AN0/CN2/EMUD3/VR+ 19 -1200 1000 100 R 40 40 1 1 B X RB1/AN1/CN3/EMUC3/VR- 20 -1200 900 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1 21 -1200 800 100 R 40 40 1 1 B X RB3/AN3/CN5/INDX 22 -1200 700 100 R 40 40 1 1 B X RB4/AN4/CN6/IC7/QEA 23 -1200 600 100 R 40 40 1 1 B X RB5/AN5/CN7/IC8/QEB 24 -1200 500 100 R 40 40 1 1 B X RB6/AN6/OCFA 25 -1200 400 100 R 40 40 1 1 B X RB7/AN7 26 -1200 300 100 R 40 40 1 1 B X RB8/AN8 27 -1200 200 100 R 40 40 1 1 B X RC13/CN1/T2CK/U1ATX/SOSCI/EMUD1 32 -1200 0 100 R 40 40 1 1 B X RC14/CN0/T1CK/U1ARX/SOSCO/EMUC1 35 -1200 -100 100 R 40 40 1 1 B X RD0/INT1/IC1/OC1/EMUC2 42 -1200 -300 100 R 40 40 1 1 B X RD1/INT2/IC2/OC2/EMUD2 37 -1200 -400 100 R 40 40 1 1 B X RD2/OC3 41 -1200 -500 100 R 40 40 1 1 B X RD3/OC4 38 -1200 -600 100 R 40 40 1 1 B X RF0 5 1200 -300 100 L 40 40 1 1 B X RF1 4 1200 -400 100 L 40 40 1 1 B X SCK1/RF6 43 1200 -900 100 L 40 40 1 1 B X VDD 7 100 1200 100 D 40 40 1 1 W X VDD@1 28 200 1200 100 D 40 40 1 1 W X VDD@2 40 300 1200 100 D 40 40 1 1 W X VPP/MCLR 18 1200 200 100 L 40 40 1 1 I X VSS 6 -100 -1100 100 U 40 40 1 1 W X VSS@1 29 0 -1100 100 U 40 40 1 1 W X VSS@2 39 100 -1100 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F3012/ML # Package Name: QFN44-8X8 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F3012/ML IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F2011/3012 F0 "IC" -1500 600 50 H V L B F1 "DSPIC30F3012/ML" -1500 -700 50 H V L B F2 "microchip-dspic-QFN44-8X8" 0 150 50 H I C C DRAW P 2 1 0 0 -1500 500 1600 500 P 2 1 0 0 1600 500 1600 -500 P 2 1 0 0 1600 -500 -1500 -500 P 2 1 0 0 -1500 -500 -1500 500 X AVDD 17 -200 600 100 D 40 40 1 1 W X AVSS 16 -200 -600 100 U 40 40 1 1 W X CLKI/OSC1 32 1700 0 100 L 40 40 1 1 B X EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14 35 1700 300 100 L 40 40 1 1 B X EMUC2/OC1/IC1/INT1/RD0 42 1700 -200 100 L 40 40 1 1 B X EMUD1/SOSCI/T2CK/U1ATX/CN1/RC13 34 1700 400 100 L 40 40 1 1 B X RB0/AN0/CN2/VR+ 19 -1600 400 100 R 40 40 1 1 B X RB1/AN1/CN3/VR- 20 -1600 300 100 R 40 40 1 1 B X RB2/AN2/CN4/LVDIN/SS1 23 -1600 200 100 R 40 40 1 1 B X RB3/AN3/CN5 25 -1600 100 100 R 40 40 1 1 B X RB4/AN4/CN6/U1TX/SDO1/SCL/EMUD/PGD 44 -1600 0 100 R 40 40 1 1 B X RB5/AN5/CN7/U1RX/SDI1/SDA/EMUC/PGC 1 -1600 -100 100 R 40 40 1 1 B X RB6/AN6/INT0/SCK1/OCFA 14 -1600 -200 100 R 40 40 1 1 B X RB7/AN7/IC2/OC2/EMUD2 12 -1600 -300 100 R 40 40 1 1 B X RC15/CLKO/OSC2 33 1700 100 100 L 40 40 1 1 B X VDD 4 -300 600 100 D 40 40 1 1 W X VPP/MCLR 18 1700 -400 100 L 40 40 1 1 I X VSS 30 -300 -600 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F3012/P # Package Name: DIL18 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F3012/P IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F2011/3012 F0 "IC" -1500 600 50 H V L B F1 "DSPIC30F3012/P" -1500 -700 50 H V L B F2 "microchip-dspic-DIL18" 0 150 50 H I C C DRAW P 2 1 0 0 -1500 500 1600 500 P 2 1 0 0 1600 500 1600 -500 P 2 1 0 0 1600 -500 -1500 -500 P 2 1 0 0 -1500 -500 -1500 500 X AVDD 18 -200 600 100 D 40 40 1 1 W X AVSS 17 -200 -600 100 U 40 40 1 1 W X CLKI/OSC1 6 1700 0 100 L 40 40 1 1 B X EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14 9 1700 300 100 L 40 40 1 1 B X EMUC2/OC1/IC1/INT1/RD0 10 1700 -200 100 L 40 40 1 1 B X EMUD1/SOSCI/T2CK/U1ATX/CN1/RC13 8 1700 400 100 L 40 40 1 1 B X RB0/AN0/CN2/VR+ 2 -1600 400 100 R 40 40 1 1 B X RB1/AN1/CN3/VR- 3 -1600 300 100 R 40 40 1 1 B X RB2/AN2/CN4/LVDIN/SS1 4 -1600 200 100 R 40 40 1 1 B X RB3/AN3/CN5 5 -1600 100 100 R 40 40 1 1 B X RB4/AN4/CN6/U1TX/SDO1/SCL/EMUD/PGD 11 -1600 0 100 R 40 40 1 1 B X RB5/AN5/CN7/U1RX/SDI1/SDA/EMUC/PGC 12 -1600 -100 100 R 40 40 1 1 B X RB6/AN6/INT0/SCK1/OCFA 16 -1600 -200 100 R 40 40 1 1 B X RB7/AN7/IC2/OC2/EMUD2 15 -1600 -300 100 R 40 40 1 1 B X RC15/CLKO/OSC2 7 1700 100 100 L 40 40 1 1 B X VDD 14 -300 600 100 D 40 40 1 1 W X VPP/MCLR 1 1700 -400 100 L 40 40 1 1 I X VSS 13 -300 -600 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F3012/SO # Package Name: SO-18W # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F3012/SO IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F2011/3012 F0 "IC" -1500 600 50 H V L B F1 "DSPIC30F3012/SO" -1500 -700 50 H V L B F2 "microchip-dspic-SO-18W" 0 150 50 H I C C DRAW P 2 1 0 0 -1500 500 1600 500 P 2 1 0 0 1600 500 1600 -500 P 2 1 0 0 1600 -500 -1500 -500 P 2 1 0 0 -1500 -500 -1500 500 X AVDD 18 -200 600 100 D 40 40 1 1 W X AVSS 17 -200 -600 100 U 40 40 1 1 W X CLKI/OSC1 6 1700 0 100 L 40 40 1 1 B X EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14 9 1700 300 100 L 40 40 1 1 B X EMUC2/OC1/IC1/INT1/RD0 10 1700 -200 100 L 40 40 1 1 B X EMUD1/SOSCI/T2CK/U1ATX/CN1/RC13 8 1700 400 100 L 40 40 1 1 B X RB0/AN0/CN2/VR+ 2 -1600 400 100 R 40 40 1 1 B X RB1/AN1/CN3/VR- 3 -1600 300 100 R 40 40 1 1 B X RB2/AN2/CN4/LVDIN/SS1 4 -1600 200 100 R 40 40 1 1 B X RB3/AN3/CN5 5 -1600 100 100 R 40 40 1 1 B X RB4/AN4/CN6/U1TX/SDO1/SCL/EMUD/PGD 11 -1600 0 100 R 40 40 1 1 B X RB5/AN5/CN7/U1RX/SDI1/SDA/EMUC/PGC 12 -1600 -100 100 R 40 40 1 1 B X RB6/AN6/INT0/SCK1/OCFA 16 -1600 -200 100 R 40 40 1 1 B X RB7/AN7/IC2/OC2/EMUD2 15 -1600 -300 100 R 40 40 1 1 B X RC15/CLKO/OSC2 7 1700 100 100 L 40 40 1 1 B X VDD 14 -300 600 100 D 40 40 1 1 W X VPP/MCLR 1 1700 -400 100 L 40 40 1 1 I X VSS 13 -300 -600 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F3013/ML # Package Name: QFN44-8X8 # Dev Tech: '' # Dev Prefix: # Gate count = 1 # DEF DSPIC30F3013/ML ?? 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F3013 DRAW P 2 1 0 0 -1200 900 -1200 -900 P 2 1 0 0 -1200 -900 1200 -900 P 2 1 0 0 1200 -900 1200 900 P 2 1 0 0 1200 900 -1200 900 X AVDD 17 600 1000 100 D 40 40 1 1 W X AVSS 16 600 -1000 100 U 40 40 1 1 W X EMUC2/IC1/INT1/RD8 42 1300 400 100 L 40 40 1 1 B X IC2/INT2/RD9 37 1300 300 100 L 40 40 1 1 B X MCLR/VPP 18 1300 -500 100 L 40 40 1 1 I X OSC1/CLKI 32 -1300 -700 100 R 40 40 1 1 I X OSC2/CLKO/RC15 33 -1300 -600 100 R 40 40 1 1 B X PGC/EMUC/U1RX/SDI1/SDA/RF2 1 1300 100 100 L 40 40 1 1 B X PGD/EMUD/U1TX/SDO1/SCL/RF3 44 1300 0 100 L 40 40 1 1 B X RB0/AN0/CN2/EMUD3/VR+ 19 -1300 700 100 R 40 40 1 1 B X RB1/AN1/CN3/EMUC3/VR- 20 -1300 600 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 23 -1300 500 100 R 40 40 1 1 B X RB3/AN3/CN5 25 -1300 400 100 R 40 40 1 1 B X RB4/AN4/CN6 26 -1300 300 100 R 40 40 1 1 B X RB5/AN5/CN7 27 -1300 200 100 R 40 40 1 1 B X RB6/AN6/OCFA 14 -1300 100 100 R 40 40 1 1 B X RB7/AN7/EMUD2 12 -1300 0 100 R 40 40 1 1 B X RB8/AN8/OC1 11 -1300 -100 100 R 40 40 1 1 B X RB9/AN9/OC2 10 -1300 -200 100 R 40 40 1 1 B X RC13/CN1/EMUD1/SOSCI/T2CK/U1ATX 34 -1300 -400 100 R 40 40 1 1 B X RC14/CN0/EMUC1/SOSCO/T1CK/U1ARX 35 -1300 -500 100 R 40 40 1 1 B X SCK1/INT0/RF6 43 1300 -300 100 L 40 40 1 1 B X U2RX/CN17/RF4 9 1300 -100 100 L 40 40 1 1 B X U2TX/CN18/RF5 7 1300 -200 100 L 40 40 1 1 B X VDD 4 300 1000 100 D 40 40 1 1 W X VDD@1 36 400 1000 100 D 40 40 1 1 W X VSS 2 300 -1000 100 U 40 40 1 1 W X VSS@1 30 400 -1000 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F3013/SO # Package Name: SO-28W # Dev Tech: '' # Dev Prefix: # Gate count = 1 # DEF DSPIC30F3013/SO ?? 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F3013 DRAW P 2 1 0 0 -1200 900 -1200 -900 P 2 1 0 0 -1200 -900 1200 -900 P 2 1 0 0 1200 -900 1200 900 P 2 1 0 0 1200 900 -1200 900 X AVDD 28 600 1000 100 D 40 40 1 1 W X AVSS 27 600 -1000 100 U 40 40 1 1 W X EMUC2/IC1/INT1/RD8 15 1300 400 100 L 40 40 1 1 B X IC2/INT2/RD9 14 1300 300 100 L 40 40 1 1 B X MCLR/VPP 1 1300 -500 100 L 40 40 1 1 I X OSC1/CLKI 9 -1300 -700 100 R 40 40 1 1 I X OSC2/CLKO/RC15 10 -1300 -600 100 R 40 40 1 1 B X PGC/EMUC/U1RX/SDI1/SDA/RF2 18 1300 100 100 L 40 40 1 1 B X PGD/EMUD/U1TX/SDO1/SCL/RF3 17 1300 0 100 L 40 40 1 1 B X RB0/AN0/CN2/EMUD3/VR+ 2 -1300 700 100 R 40 40 1 1 B X RB1/AN1/CN3/EMUC3/VR- 3 -1300 600 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 4 -1300 500 100 R 40 40 1 1 B X RB3/AN3/CN5 5 -1300 400 100 R 40 40 1 1 B X RB4/AN4/CN6 6 -1300 300 100 R 40 40 1 1 B X RB5/AN5/CN7 7 -1300 200 100 R 40 40 1 1 B X RB6/AN6/OCFA 26 -1300 100 100 R 40 40 1 1 B X RB7/AN7/EMUD2 25 -1300 0 100 R 40 40 1 1 B X RB8/AN8/OC1 24 -1300 -100 100 R 40 40 1 1 B X RB9/AN9/OC2 23 -1300 -200 100 R 40 40 1 1 B X RC13/CN1/EMUD1/SOSCI/T2CK/U1ATX 11 -1300 -400 100 R 40 40 1 1 B X RC14/CN0/EMUC1/SOSCO/T1CK/U1ARX 12 -1300 -500 100 R 40 40 1 1 B X SCK1/INT0/RF6 16 1300 -300 100 L 40 40 1 1 B X U2RX/CN17/RF4 22 1300 -100 100 L 40 40 1 1 B X U2TX/CN18/RF5 21 1300 -200 100 L 40 40 1 1 B X VDD 13 300 1000 100 D 40 40 1 1 W X VDD@1 20 400 1000 100 D 40 40 1 1 W X VSS 8 300 -1000 100 U 40 40 1 1 W X VSS@1 19 400 -1000 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F3013/SP # Package Name: DIL28-3 # Dev Tech: '' # Dev Prefix: # Gate count = 1 # DEF DSPIC30F3013/SP ?? 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F3013 DRAW P 2 1 0 0 -1200 900 -1200 -900 P 2 1 0 0 -1200 -900 1200 -900 P 2 1 0 0 1200 -900 1200 900 P 2 1 0 0 1200 900 -1200 900 X AVDD 28 600 1000 100 D 40 40 1 1 W X AVSS 27 600 -1000 100 U 40 40 1 1 W X EMUC2/IC1/INT1/RD8 15 1300 400 100 L 40 40 1 1 B X IC2/INT2/RD9 14 1300 300 100 L 40 40 1 1 B X MCLR/VPP 1 1300 -500 100 L 40 40 1 1 I X OSC1/CLKI 9 -1300 -700 100 R 40 40 1 1 I X OSC2/CLKO/RC15 10 -1300 -600 100 R 40 40 1 1 B X PGC/EMUC/U1RX/SDI1/SDA/RF2 18 1300 100 100 L 40 40 1 1 B X PGD/EMUD/U1TX/SDO1/SCL/RF3 17 1300 0 100 L 40 40 1 1 B X RB0/AN0/CN2/EMUD3/VR+ 2 -1300 700 100 R 40 40 1 1 B X RB1/AN1/CN3/EMUC3/VR- 3 -1300 600 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 4 -1300 500 100 R 40 40 1 1 B X RB3/AN3/CN5 5 -1300 400 100 R 40 40 1 1 B X RB4/AN4/CN6 6 -1300 300 100 R 40 40 1 1 B X RB5/AN5/CN7 7 -1300 200 100 R 40 40 1 1 B X RB6/AN6/OCFA 26 -1300 100 100 R 40 40 1 1 B X RB7/AN7/EMUD2 25 -1300 0 100 R 40 40 1 1 B X RB8/AN8/OC1 24 -1300 -100 100 R 40 40 1 1 B X RB9/AN9/OC2 23 -1300 -200 100 R 40 40 1 1 B X RC13/CN1/EMUD1/SOSCI/T2CK/U1ATX 11 -1300 -400 100 R 40 40 1 1 B X RC14/CN0/EMUC1/SOSCO/T1CK/U1ARX 12 -1300 -500 100 R 40 40 1 1 B X SCK1/INT0/RF6 16 1300 -300 100 L 40 40 1 1 B X U2RX/CN17/RF4 22 1300 -100 100 L 40 40 1 1 B X U2TX/CN18/RF5 21 1300 -200 100 L 40 40 1 1 B X VDD 13 300 1000 100 D 40 40 1 1 W X VDD@1 20 400 1000 100 D 40 40 1 1 W X VSS 8 300 -1000 100 U 40 40 1 1 W X VSS@1 19 400 -1000 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F3014/ML # Package Name: QFN44-8X8 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F3014/ML IC 0 40 Y Y 1 L N # Gate Name: A # Symbol Name: DSPIC30F3014 F0 "IC" -1100 1200 50 H V L B F1 "DSPIC30F3014/ML" -1100 -1300 50 H V L B F2 "microchip-dspic-QFN44-8X8" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 1100 -1100 -1100 P 2 1 0 0 -1100 -1100 1100 -1100 P 2 1 0 0 1100 -1100 1100 1100 P 2 1 0 0 1100 1100 -1100 1100 X AVDD 17 100 1200 100 D 40 40 1 1 W X AVSS 16 400 -1200 100 U 40 40 1 1 W X EMUC2/OC1/RD0 10 1200 1000 100 L 40 40 1 1 B X EMUC3/SCK1/RF6 43 1200 -400 100 L 40 40 1 1 B X EMUD2/OC2/RD1 9 1200 900 100 L 40 40 1 1 B X EMUD3/U1TX/SDO1/SCL/RF3 44 1200 -100 100 L 40 40 1 1 B X INT1/IC1/RD8 42 1200 500 100 L 40 40 1 1 B X INT2/IC2/RD9 37 1200 400 100 L 40 40 1 1 B X MCLR 18 1200 -900 100 L 40 40 1 1 I X OSC1/CLKIN 32 -1200 -1000 100 R 40 40 1 1 I X OSC2/CLKO/RC15 33 -1200 -900 100 R 40 40 1 1 B X RA11/INT0 36 -1200 1000 100 R 40 40 1 1 B X RB0/AN0/CN2 19 -1200 800 100 R 40 40 1 1 B X RB1/AN1/CN3 20 -1200 700 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 21 -1200 600 100 R 40 40 1 1 B X RB3/AN3/CN5 22 -1200 500 100 R 40 40 1 1 B X RB4/AN4/CN6 23 -1200 400 100 R 40 40 1 1 B X RB5/AN5/CN7 24 -1200 300 100 R 40 40 1 1 B X RB6/AN6/EMUC/PGC/OCFA 25 -1200 200 100 R 40 40 1 1 B X RB7/AN7/EMUD/PGD 26 -1200 100 100 R 40 40 1 1 B X RB8/AN8 27 -1200 0 100 R 40 40 1 1 B X RB9/AN9 15 -1200 -100 100 R 40 40 1 1 B X RB10/AN10 14 -1200 -200 100 R 40 40 1 1 B X RB11/AN11 12 -1200 -300 100 R 40 40 1 1 B X RB12/AN12 11 -1200 -400 100 R 40 40 1 1 B X RC13/CN1/EMUD1/SOSCI/T2CK/U1ATX 34 -1200 -600 100 R 40 40 1 1 B X RC14/CN0/EMUC1/SOSCO/T1CK/U1ARX 35 -1200 -700 100 R 40 40 1 1 B X RD2 41 1200 800 100 L 40 40 1 1 B X RD3 38 1200 700 100 L 40 40 1 1 B X RF0 5 1200 200 100 L 40 40 1 1 B X RF1 4 1200 100 100 L 40 40 1 1 B X U1RX/SDI1/SDA/RF2 1 1200 0 100 L 40 40 1 1 B X U2RX/CN17/RF4 3 1200 -200 100 L 40 40 1 1 B X U2TX/CN18/RF5 2 1200 -300 100 L 40 40 1 1 B X VDD 7 -300 1200 100 D 40 40 1 1 W X VDD@1 28 -200 1200 100 D 40 40 1 1 W X VDD@2 40 -100 1200 100 D 40 40 1 1 W X VSS 6 0 -1200 100 U 40 40 1 1 W X VSS@1 30 100 -1200 100 U 40 40 1 1 W X VSS@2 39 200 -1200 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F3014/P # Package Name: DIL40 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F3014/P IC 0 40 Y Y 1 L N # Gate Name: A # Symbol Name: DSPIC30F3014 F0 "IC" -1100 1200 50 H V L B F1 "DSPIC30F3014/P" -1100 -1300 50 H V L B F2 "microchip-dspic-DIL40" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 1100 -1100 -1100 P 2 1 0 0 -1100 -1100 1100 -1100 P 2 1 0 0 1100 -1100 1100 1100 P 2 1 0 0 1100 1100 -1100 1100 X AVDD 40 100 1200 100 D 40 40 1 1 W X AVSS 39 400 -1200 100 U 40 40 1 1 W X EMUC2/OC1/RD0 34 1200 1000 100 L 40 40 1 1 B X EMUC3/SCK1/RF6 24 1200 -400 100 L 40 40 1 1 B X EMUD2/OC2/RD1 33 1200 900 100 L 40 40 1 1 B X EMUD3/U1TX/SDO1/SCL/RF3 25 1200 -100 100 L 40 40 1 1 B X INT1/IC1/RD8 23 1200 500 100 L 40 40 1 1 B X INT2/IC2/RD9 18 1200 400 100 L 40 40 1 1 B X MCLR 1 1200 -900 100 L 40 40 1 1 I X OSC1/CLKIN 13 -1200 -1000 100 R 40 40 1 1 I X OSC2/CLKO/RC15 14 -1200 -900 100 R 40 40 1 1 B X RA11/INT0 17 -1200 1000 100 R 40 40 1 1 B X RB0/AN0/CN2 2 -1200 800 100 R 40 40 1 1 B X RB1/AN1/CN3 3 -1200 700 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 4 -1200 600 100 R 40 40 1 1 B X RB3/AN3/CN5 5 -1200 500 100 R 40 40 1 1 B X RB4/AN4/CN6 6 -1200 400 100 R 40 40 1 1 B X RB5/AN5/CN7 7 -1200 300 100 R 40 40 1 1 B X RB6/AN6/EMUC/PGC/OCFA 8 -1200 200 100 R 40 40 1 1 B X RB7/AN7/EMUD/PGD 9 -1200 100 100 R 40 40 1 1 B X RB8/AN8 10 -1200 0 100 R 40 40 1 1 B X RB9/AN9 38 -1200 -100 100 R 40 40 1 1 B X RB10/AN10 37 -1200 -200 100 R 40 40 1 1 B X RB11/AN11 36 -1200 -300 100 R 40 40 1 1 B X RB12/AN12 35 -1200 -400 100 R 40 40 1 1 B X RC13/CN1/EMUD1/SOSCI/T2CK/U1ATX 15 -1200 -600 100 R 40 40 1 1 B X RC14/CN0/EMUC1/SOSCO/T1CK/U1ARX 16 -1200 -700 100 R 40 40 1 1 B X RD2 22 1200 800 100 L 40 40 1 1 B X RD3 19 1200 700 100 L 40 40 1 1 B X RF0 30 1200 200 100 L 40 40 1 1 B X RF1 29 1200 100 100 L 40 40 1 1 B X U1RX/SDI1/SDA/RF2 26 1200 0 100 L 40 40 1 1 B X U2RX/CN17/RF4 28 1200 -200 100 L 40 40 1 1 B X U2TX/CN18/RF5 27 1200 -300 100 L 40 40 1 1 B X VDD 11 -300 1200 100 D 40 40 1 1 W X VDD@1 21 -200 1200 100 D 40 40 1 1 W X VDD@2 32 -100 1200 100 D 40 40 1 1 W X VSS 12 0 -1200 100 U 40 40 1 1 W X VSS@1 20 100 -1200 100 U 40 40 1 1 W X VSS@2 31 200 -1200 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F3014/PT # Package Name: TQFP44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F3014/PT IC 0 40 Y Y 1 L N # Gate Name: A # Symbol Name: DSPIC30F3014 F0 "IC" -1100 1200 50 H V L B F1 "DSPIC30F3014/PT" -1100 -1300 50 H V L B F2 "microchip-dspic-TQFP44" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 1100 -1100 -1100 P 2 1 0 0 -1100 -1100 1100 -1100 P 2 1 0 0 1100 -1100 1100 1100 P 2 1 0 0 1100 1100 -1100 1100 X AVDD 17 100 1200 100 D 40 40 1 1 W X AVSS 16 400 -1200 100 U 40 40 1 1 W X EMUC2/OC1/RD0 9 1200 1000 100 L 40 40 1 1 B X EMUC3/SCK1/RF6 43 1200 -400 100 L 40 40 1 1 B X EMUD2/OC2/RD1 8 1200 900 100 L 40 40 1 1 B X EMUD3/U1TX/SDO1/SCL/RF3 44 1200 -100 100 L 40 40 1 1 B X INT1/IC1/RD8 42 1200 500 100 L 40 40 1 1 B X INT2/IC2/RD9 37 1200 400 100 L 40 40 1 1 B X MCLR 18 1200 -900 100 L 40 40 1 1 I X OSC1/CLKIN 30 -1200 -1000 100 R 40 40 1 1 I X OSC2/CLKO/RC15 31 -1200 -900 100 R 40 40 1 1 B X RA11/INT0 36 -1200 1000 100 R 40 40 1 1 B X RB0/AN0/CN2 19 -1200 800 100 R 40 40 1 1 B X RB1/AN1/CN3 20 -1200 700 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 21 -1200 600 100 R 40 40 1 1 B X RB3/AN3/CN5 22 -1200 500 100 R 40 40 1 1 B X RB4/AN4/CN6 23 -1200 400 100 R 40 40 1 1 B X RB5/AN5/CN7 24 -1200 300 100 R 40 40 1 1 B X RB6/AN6/EMUC/PGC/OCFA 25 -1200 200 100 R 40 40 1 1 B X RB7/AN7/EMUD/PGD 26 -1200 100 100 R 40 40 1 1 B X RB8/AN8 27 -1200 0 100 R 40 40 1 1 B X RB9/AN9 15 -1200 -100 100 R 40 40 1 1 B X RB10/AN10 14 -1200 -200 100 R 40 40 1 1 B X RB11/AN11 11 -1200 -300 100 R 40 40 1 1 B X RB12/AN12 10 -1200 -400 100 R 40 40 1 1 B X RC13/CN1/EMUD1/SOSCI/T2CK/U1ATX 32 -1200 -600 100 R 40 40 1 1 B X RC14/CN0/EMUC1/SOSCO/T1CK/U1ARX 35 -1200 -700 100 R 40 40 1 1 B X RD2 41 1200 800 100 L 40 40 1 1 B X RD3 38 1200 700 100 L 40 40 1 1 B X RF0 5 1200 200 100 L 40 40 1 1 B X RF1 4 1200 100 100 L 40 40 1 1 B X U1RX/SDI1/SDA/RF2 1 1200 0 100 L 40 40 1 1 B X U2RX/CN17/RF4 3 1200 -200 100 L 40 40 1 1 B X U2TX/CN18/RF5 2 1200 -300 100 L 40 40 1 1 B X VDD 7 -300 1200 100 D 40 40 1 1 W X VDD@1 28 -200 1200 100 D 40 40 1 1 W X VDD@2 40 -100 1200 100 D 40 40 1 1 W X VSS 6 0 -1200 100 U 40 40 1 1 W X VSS@1 29 100 -1200 100 U 40 40 1 1 W X VSS@2 39 200 -1200 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F4011/ML # Package Name: QFN44-8X8 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F4011/ML IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F4011 F0 "IC" -1100 1200 50 H V L B F1 "DSPIC30F4011/ML" -1100 -1200 50 H V L B F2 "microchip-dspic-QFN44-8X8" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 1100 1100 1100 P 2 1 0 0 1100 1100 1100 -1000 P 2 1 0 0 1100 -1000 -1100 -1000 P 2 1 0 0 -1100 -1000 -1100 1100 X AVDD 17 400 1200 100 D 40 40 1 1 W X AVSS 16 200 -1100 100 U 40 40 1 1 W X C1RX/RF0 5 1200 -300 100 L 40 40 1 1 B X C1TX/RF1 4 1200 -400 100 L 40 40 1 1 B X CN17/U2RX/RF4 3 1200 -700 100 L 40 40 1 1 B X CN18/U2TX/RF5 2 1200 -800 100 L 40 40 1 1 B X FLTA/INT0/RE8 36 1200 400 100 L 40 40 1 1 B X OSC1/CLKI 32 -1200 -900 100 R 40 40 1 1 I X OSC2/CLKO/RC15 33 -1200 -800 100 R 40 40 1 1 B X PGC/EMUC/SDI1/SDA/U1RX/RF2 1 1200 -500 100 L 40 40 1 1 B X PGD/EMUD/SDO1/SCL/U1TX/RF3 44 1200 -600 100 L 40 40 1 1 B X PWM1H/RE1 14 1200 900 100 L 40 40 1 1 B X PWM1L/RE0 15 1200 1000 100 L 40 40 1 1 B X PWM2H/RE3 11 1200 700 100 L 40 40 1 1 B X PWM2L/RE2 12 1200 800 100 L 40 40 1 1 B X PWM3H/RE5 9 1200 500 100 L 40 40 1 1 B X PWM3L/RE4 10 1200 600 100 L 40 40 1 1 B X RB0/AN0/CN2/EMUD3/VR+ 19 -1200 1000 100 R 40 40 1 1 B X RB1/AN1/CN3/EMUC3/VR- 20 -1200 900 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1 21 -1200 800 100 R 40 40 1 1 B X RB3/AN3/CN5/INDX 22 -1200 700 100 R 40 40 1 1 B X RB4/AN4/CN6/IC7/QEA 23 -1200 600 100 R 40 40 1 1 B X RB5/AN5/CN7/IC8/QEB 24 -1200 500 100 R 40 40 1 1 B X RB6/AN6/OCFA 25 -1200 400 100 R 40 40 1 1 B X RB7/AN7 26 -1200 300 100 R 40 40 1 1 B X RB8/AN8 27 -1200 200 100 R 40 40 1 1 B X RC13/CN1/T2CK/U1ATX/SOSCI/EMUD1 34 -1200 0 100 R 40 40 1 1 B X RC14/CN0/T1CK/U1ARX/SOSCO/EMUC1 35 -1200 -100 100 R 40 40 1 1 B X RD0/INT1/IC1/OC1/EMUC2 42 -1200 -300 100 R 40 40 1 1 B X RD1/INT2/IC2/OC2/EMUD2 37 -1200 -400 100 R 40 40 1 1 B X RD2/OC3 41 -1200 -500 100 R 40 40 1 1 B X RD3/OC4 38 -1200 -600 100 R 40 40 1 1 B X SCK1/RF6 43 1200 -900 100 L 40 40 1 1 B X VDD 7 100 1200 100 D 40 40 1 1 W X VDD@1 28 200 1200 100 D 40 40 1 1 W X VDD@2 40 300 1200 100 D 40 40 1 1 W X VPP/MCLR 18 1200 200 100 L 40 40 1 1 I X VSS 6 -100 -1100 100 U 40 40 1 1 W X VSS@1 30 0 -1100 100 U 40 40 1 1 W X VSS@2 39 100 -1100 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F4011/P # Package Name: DIL40 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F4011/P IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F4011 F0 "IC" -1100 1200 50 H V L B F1 "DSPIC30F4011/P" -1100 -1200 50 H V L B F2 "microchip-dspic-DIL40" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 1100 1100 1100 P 2 1 0 0 1100 1100 1100 -1000 P 2 1 0 0 1100 -1000 -1100 -1000 P 2 1 0 0 -1100 -1000 -1100 1100 X AVDD 40 400 1200 100 D 40 40 1 1 W X AVSS 39 200 -1100 100 U 40 40 1 1 W X C1RX/RF0 30 1200 -300 100 L 40 40 1 1 B X C1TX/RF1 29 1200 -400 100 L 40 40 1 1 B X CN17/U2RX/RF4 28 1200 -700 100 L 40 40 1 1 B X CN18/U2TX/RF5 27 1200 -800 100 L 40 40 1 1 B X FLTA/INT0/RE8 17 1200 400 100 L 40 40 1 1 B X OSC1/CLKI 13 -1200 -900 100 R 40 40 1 1 I X OSC2/CLKO/RC15 14 -1200 -800 100 R 40 40 1 1 B X PGC/EMUC/SDI1/SDA/U1RX/RF2 26 1200 -500 100 L 40 40 1 1 B X PGD/EMUD/SDO1/SCL/U1TX/RF3 25 1200 -600 100 L 40 40 1 1 B X PWM1H/RE1 37 1200 900 100 L 40 40 1 1 B X PWM1L/RE0 38 1200 1000 100 L 40 40 1 1 B X PWM2H/RE3 35 1200 700 100 L 40 40 1 1 B X PWM2L/RE2 36 1200 800 100 L 40 40 1 1 B X PWM3H/RE5 33 1200 500 100 L 40 40 1 1 B X PWM3L/RE4 34 1200 600 100 L 40 40 1 1 B X RB0/AN0/CN2/EMUD3/VR+ 2 -1200 1000 100 R 40 40 1 1 B X RB1/AN1/CN3/EMUC3/VR- 3 -1200 900 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1 4 -1200 800 100 R 40 40 1 1 B X RB3/AN3/CN5/INDX 5 -1200 700 100 R 40 40 1 1 B X RB4/AN4/CN6/IC7/QEA 6 -1200 600 100 R 40 40 1 1 B X RB5/AN5/CN7/IC8/QEB 7 -1200 500 100 R 40 40 1 1 B X RB6/AN6/OCFA 8 -1200 400 100 R 40 40 1 1 B X RB7/AN7 9 -1200 300 100 R 40 40 1 1 B X RB8/AN8 10 -1200 200 100 R 40 40 1 1 B X RC13/CN1/T2CK/U1ATX/SOSCI/EMUD1 15 -1200 0 100 R 40 40 1 1 B X RC14/CN0/T1CK/U1ARX/SOSCO/EMUC1 16 -1200 -100 100 R 40 40 1 1 B X RD0/INT1/IC1/OC1/EMUC2 23 -1200 -300 100 R 40 40 1 1 B X RD1/INT2/IC2/OC2/EMUD2 18 -1200 -400 100 R 40 40 1 1 B X RD2/OC3 22 -1200 -500 100 R 40 40 1 1 B X RD3/OC4 19 -1200 -600 100 R 40 40 1 1 B X SCK1/RF6 24 1200 -900 100 L 40 40 1 1 B X VDD 11 100 1200 100 D 40 40 1 1 W X VDD@1 21 200 1200 100 D 40 40 1 1 W X VDD@2 32 300 1200 100 D 40 40 1 1 W X VPP/MCLR 1 1200 200 100 L 40 40 1 1 I X VSS 12 -100 -1100 100 U 40 40 1 1 W X VSS@1 20 0 -1100 100 U 40 40 1 1 W X VSS@2 31 100 -1100 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F4011/PT # Package Name: TQFP44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F4011/PT IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F4011 F0 "IC" -1100 1200 50 H V L B F1 "DSPIC30F4011/PT" -1100 -1200 50 H V L B F2 "microchip-dspic-TQFP44" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 1100 1100 1100 P 2 1 0 0 1100 1100 1100 -1000 P 2 1 0 0 1100 -1000 -1100 -1000 P 2 1 0 0 -1100 -1000 -1100 1100 X AVDD 17 400 1200 100 D 40 40 1 1 W X AVSS 16 200 -1100 100 U 40 40 1 1 W X C1RX/RF0 5 1200 -300 100 L 40 40 1 1 B X C1TX/RF1 4 1200 -400 100 L 40 40 1 1 B X CN17/U2RX/RF4 3 1200 -700 100 L 40 40 1 1 B X CN18/U2TX/RF5 2 1200 -800 100 L 40 40 1 1 B X FLTA/INT0/RE8 36 1200 400 100 L 40 40 1 1 B X OSC1/CLKI 30 -1200 -900 100 R 40 40 1 1 I X OSC2/CLKO/RC15 31 -1200 -800 100 R 40 40 1 1 B X PGC/EMUC/SDI1/SDA/U1RX/RF2 1 1200 -500 100 L 40 40 1 1 B X PGD/EMUD/SDO1/SCL/U1TX/RF3 44 1200 -600 100 L 40 40 1 1 B X PWM1H/RE1 14 1200 900 100 L 40 40 1 1 B X PWM1L/RE0 15 1200 1000 100 L 40 40 1 1 B X PWM2H/RE3 10 1200 700 100 L 40 40 1 1 B X PWM2L/RE2 11 1200 800 100 L 40 40 1 1 B X PWM3H/RE5 8 1200 500 100 L 40 40 1 1 B X PWM3L/RE4 9 1200 600 100 L 40 40 1 1 B X RB0/AN0/CN2/EMUD3/VR+ 19 -1200 1000 100 R 40 40 1 1 B X RB1/AN1/CN3/EMUC3/VR- 20 -1200 900 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1 21 -1200 800 100 R 40 40 1 1 B X RB3/AN3/CN5/INDX 22 -1200 700 100 R 40 40 1 1 B X RB4/AN4/CN6/IC7/QEA 23 -1200 600 100 R 40 40 1 1 B X RB5/AN5/CN7/IC8/QEB 24 -1200 500 100 R 40 40 1 1 B X RB6/AN6/OCFA 25 -1200 400 100 R 40 40 1 1 B X RB7/AN7 26 -1200 300 100 R 40 40 1 1 B X RB8/AN8 27 -1200 200 100 R 40 40 1 1 B X RC13/CN1/T2CK/U1ATX/SOSCI/EMUD1 32 -1200 0 100 R 40 40 1 1 B X RC14/CN0/T1CK/U1ARX/SOSCO/EMUC1 35 -1200 -100 100 R 40 40 1 1 B X RD0/INT1/IC1/OC1/EMUC2 42 -1200 -300 100 R 40 40 1 1 B X RD1/INT2/IC2/OC2/EMUD2 37 -1200 -400 100 R 40 40 1 1 B X RD2/OC3 41 -1200 -500 100 R 40 40 1 1 B X RD3/OC4 38 -1200 -600 100 R 40 40 1 1 B X SCK1/RF6 43 1200 -900 100 L 40 40 1 1 B X VDD 7 100 1200 100 D 40 40 1 1 W X VDD@1 28 200 1200 100 D 40 40 1 1 W X VDD@2 40 300 1200 100 D 40 40 1 1 W X VPP/MCLR 18 1200 200 100 L 40 40 1 1 I X VSS 6 -100 -1100 100 U 40 40 1 1 W X VSS@1 29 0 -1100 100 U 40 40 1 1 W X VSS@2 39 100 -1100 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F4012/ML # Package Name: QFN44-8X8 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F4012/ML IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F2010 F0 "IC" -1300 800 50 H V L B F1 "DSPIC30F4012/ML" -1300 -900 50 H V L B F2 "microchip-dspic-QFN44-8X8" 0 150 50 H I C C DRAW P 2 1 0 0 -1400 700 1400 700 P 2 1 0 0 1400 700 1400 -700 P 2 1 0 0 1400 -700 -1400 -700 P 2 1 0 0 -1400 -700 -1400 700 X AVDD 17 200 800 100 D 40 40 1 1 W X AVSS 16 200 -800 100 U 40 40 1 1 W X INT0/FLTA/SCK1/OCFA/RE8 43 1500 0 100 L 40 40 1 1 B X INT2/EMUD2/OC2/IC2/RD1 37 1500 -600 100 L 40 40 1 1 B X OSC1/CLKI 32 -1500 -400 100 R 40 40 1 1 I X PGC/EMUC/RX/SDI1/SDA/RF2 1 1500 -200 100 L 40 40 1 1 B X PGD/EMUD/TX/SDO1/SCL/RF3 44 1500 -300 100 L 40 40 1 1 B X PWM1H/RE1 14 1500 500 100 L 40 40 1 1 B X PWM1L/RE0 15 1500 600 100 L 40 40 1 1 B X PWM2H/RE3 11 1500 300 100 L 40 40 1 1 B X PWM2L/RE2 12 1500 400 100 L 40 40 1 1 B X PWM3H/RE5 9 1500 100 100 L 40 40 1 1 B X PWM3L/RE4 10 1500 200 100 L 40 40 1 1 B X RB0/CN2/AN0/EMUD3/VR+ 19 -1500 600 100 R 40 40 1 1 B X RB1/CN3/AN1/EMUC3/VR- 20 -1500 500 100 R 40 40 1 1 B X RB2/CN4/AN2/SS1 21 -1500 400 100 R 40 40 1 1 B X RB3/CN5/AN3/INDX 22 -1500 300 100 R 40 40 1 1 B X RB4/CN6/AN4/QEA/IC7 23 -1500 200 100 R 40 40 1 1 B X RB5/CN7/AN5/QEB/IC8 24 -1500 100 100 R 40 40 1 1 B X RC13/CN1/EMUD1/ATX/T2C 34 -1500 -100 100 R 40 40 1 1 B X RC14/CN0/EMUC1/ARX/T1C 35 -1500 -200 100 R 40 40 1 1 B X RC15/OSC2/CLKO 33 -1500 -300 100 R 40 40 1 1 B X RD0/INT1/EMUC2/OC1/IC1 42 -1500 -600 100 R 40 40 1 1 B X VDD 7 -100 800 100 D 40 40 1 1 W X VDD@1 28 0 800 100 D 40 40 1 1 W X VPP/MCLR 18 1500 -400 100 L 40 40 1 1 I X VSS 6 -100 -800 100 U 40 40 1 1 W X VSS@1 30 0 -800 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F4012/SO # Package Name: SO-28W # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F4012/SO IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F2010 F0 "IC" -1300 800 50 H V L B F1 "DSPIC30F4012/SO" -1300 -900 50 H V L B F2 "microchip-dspic-SO-28W" 0 150 50 H I C C DRAW P 2 1 0 0 -1400 700 1400 700 P 2 1 0 0 1400 700 1400 -700 P 2 1 0 0 1400 -700 -1400 -700 P 2 1 0 0 -1400 -700 -1400 700 X AVDD 28 200 800 100 D 40 40 1 1 W X AVSS 27 200 -800 100 U 40 40 1 1 W X INT0/FLTA/SCK1/OCFA/RE8 16 1500 0 100 L 40 40 1 1 B X INT2/EMUD2/OC2/IC2/RD1 14 1500 -600 100 L 40 40 1 1 B X OSC1/CLKI 9 -1500 -400 100 R 40 40 1 1 I X PGC/EMUC/RX/SDI1/SDA/RF2 18 1500 -200 100 L 40 40 1 1 B X PGD/EMUD/TX/SDO1/SCL/RF3 17 1500 -300 100 L 40 40 1 1 B X PWM1H/RE1 25 1500 500 100 L 40 40 1 1 B X PWM1L/RE0 26 1500 600 100 L 40 40 1 1 B X PWM2H/RE3 23 1500 300 100 L 40 40 1 1 B X PWM2L/RE2 24 1500 400 100 L 40 40 1 1 B X PWM3H/RE5 21 1500 100 100 L 40 40 1 1 B X PWM3L/RE4 22 1500 200 100 L 40 40 1 1 B X RB0/CN2/AN0/EMUD3/VR+ 2 -1500 600 100 R 40 40 1 1 B X RB1/CN3/AN1/EMUC3/VR- 3 -1500 500 100 R 40 40 1 1 B X RB2/CN4/AN2/SS1 4 -1500 400 100 R 40 40 1 1 B X RB3/CN5/AN3/INDX 5 -1500 300 100 R 40 40 1 1 B X RB4/CN6/AN4/QEA/IC7 6 -1500 200 100 R 40 40 1 1 B X RB5/CN7/AN5/QEB/IC8 7 -1500 100 100 R 40 40 1 1 B X RC13/CN1/EMUD1/ATX/T2C 11 -1500 -100 100 R 40 40 1 1 B X RC14/CN0/EMUC1/ARX/T1C 12 -1500 -200 100 R 40 40 1 1 B X RC15/OSC2/CLKO 10 -1500 -300 100 R 40 40 1 1 B X RD0/INT1/EMUC2/OC1/IC1 15 -1500 -600 100 R 40 40 1 1 B X VDD 13 -100 800 100 D 40 40 1 1 W X VDD@1 20 0 800 100 D 40 40 1 1 W X VPP/MCLR 1 1500 -400 100 L 40 40 1 1 I X VSS 8 -100 -800 100 U 40 40 1 1 W X VSS@1 19 0 -800 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F4012/SP # Package Name: DIL28-3 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F4012/SP IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F2010 F0 "IC" -1300 800 50 H V L B F1 "DSPIC30F4012/SP" -1300 -900 50 H V L B F2 "microchip-dspic-DIL28-3" 0 150 50 H I C C DRAW P 2 1 0 0 -1400 700 1400 700 P 2 1 0 0 1400 700 1400 -700 P 2 1 0 0 1400 -700 -1400 -700 P 2 1 0 0 -1400 -700 -1400 700 X AVDD 28 200 800 100 D 40 40 1 1 W X AVSS 27 200 -800 100 U 40 40 1 1 W X INT0/FLTA/SCK1/OCFA/RE8 16 1500 0 100 L 40 40 1 1 B X INT2/EMUD2/OC2/IC2/RD1 14 1500 -600 100 L 40 40 1 1 B X OSC1/CLKI 9 -1500 -400 100 R 40 40 1 1 I X PGC/EMUC/RX/SDI1/SDA/RF2 18 1500 -200 100 L 40 40 1 1 B X PGD/EMUD/TX/SDO1/SCL/RF3 17 1500 -300 100 L 40 40 1 1 B X PWM1H/RE1 25 1500 500 100 L 40 40 1 1 B X PWM1L/RE0 26 1500 600 100 L 40 40 1 1 B X PWM2H/RE3 23 1500 300 100 L 40 40 1 1 B X PWM2L/RE2 24 1500 400 100 L 40 40 1 1 B X PWM3H/RE5 21 1500 100 100 L 40 40 1 1 B X PWM3L/RE4 22 1500 200 100 L 40 40 1 1 B X RB0/CN2/AN0/EMUD3/VR+ 2 -1500 600 100 R 40 40 1 1 B X RB1/CN3/AN1/EMUC3/VR- 3 -1500 500 100 R 40 40 1 1 B X RB2/CN4/AN2/SS1 4 -1500 400 100 R 40 40 1 1 B X RB3/CN5/AN3/INDX 5 -1500 300 100 R 40 40 1 1 B X RB4/CN6/AN4/QEA/IC7 6 -1500 200 100 R 40 40 1 1 B X RB5/CN7/AN5/QEB/IC8 7 -1500 100 100 R 40 40 1 1 B X RC13/CN1/EMUD1/ATX/T2C 11 -1500 -100 100 R 40 40 1 1 B X RC14/CN0/EMUC1/ARX/T1C 12 -1500 -200 100 R 40 40 1 1 B X RC15/OSC2/CLKO 10 -1500 -300 100 R 40 40 1 1 B X RD0/INT1/EMUC2/OC1/IC1 15 -1500 -600 100 R 40 40 1 1 B X VDD 13 -100 800 100 D 40 40 1 1 W X VDD@1 20 0 800 100 D 40 40 1 1 W X VPP/MCLR 1 1500 -400 100 L 40 40 1 1 I X VSS 8 -100 -800 100 U 40 40 1 1 W X VSS@1 19 0 -800 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F4013/ML # Package Name: QFN44-8X8 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F4013/ML IC 0 40 Y Y 1 L N # Gate Name: A # Symbol Name: DSPIC30F4013 F0 "IC" -1100 1200 50 H V L B F1 "DSPIC30F4013/ML" -1100 -1300 50 H V L B F2 "microchip-dspic-QFN44-8X8" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 1100 -1100 -1100 P 2 1 0 0 -1100 -1100 1100 -1100 P 2 1 0 0 1100 -1100 1100 1100 P 2 1 0 0 1100 1100 -1100 1100 X AVDD 17 100 1200 100 D 40 40 1 1 W X AVSS 16 400 -1200 100 U 40 40 1 1 W X C1RX/RF0 5 1200 200 100 L 40 40 1 1 B X C1TX/RF1 4 1200 100 100 L 40 40 1 1 B X EMUC2/OC1/RD0 10 1200 1000 100 L 40 40 1 1 B X EMUC3/SCK1/RF6 43 1200 -400 100 L 40 40 1 1 B X EMUD2/OC2/RD1 9 1200 900 100 L 40 40 1 1 B X EMUD3/U1TX/SDO1/SCL/RF3 44 1200 -100 100 L 40 40 1 1 B X INT1/IC1/RD8 42 1200 500 100 L 40 40 1 1 B X INT2/IC2/RD9 37 1200 400 100 L 40 40 1 1 B X MCLR 18 1200 -900 100 L 40 40 1 1 I X OC3/RD2 41 1200 800 100 L 40 40 1 1 B X OC4/RD3 38 1200 700 100 L 40 40 1 1 B X OSC1/CLKIN 32 -1200 -1000 100 R 40 40 1 1 I X OSC2/CLKO/RC15 33 -1200 -900 100 R 40 40 1 1 B X RA11/INT0 36 -1200 1000 100 R 40 40 1 1 B X RB0/AN0/CN2 19 -1200 800 100 R 40 40 1 1 B X RB1/AN1/CN3 20 -1200 700 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 21 -1200 600 100 R 40 40 1 1 B X RB3/AN3/CN5 22 -1200 500 100 R 40 40 1 1 B X RB4/AN4/CN6/IC7 23 -1200 400 100 R 40 40 1 1 B X RB5/AN5/CN7/IC8 24 -1200 300 100 R 40 40 1 1 B X RB6/AN6/EMUC/PGC/OCFA 25 -1200 200 100 R 40 40 1 1 B X RB7/AN7/EMUD/PGD 26 -1200 100 100 R 40 40 1 1 B X RB8/AN8 27 -1200 0 100 R 40 40 1 1 B X RB9/AN9/CSCK 15 -1200 -100 100 R 40 40 1 1 B X RB10/AN10/CSDI 14 -1200 -200 100 R 40 40 1 1 B X RB11/AN11/CSDO 12 -1200 -300 100 R 40 40 1 1 B X RB12/AN12/COFS 11 -1200 -400 100 R 40 40 1 1 B X RC13/CN1/EMUD1/SOSCI/T2CK/U1ATX 34 -1200 -600 100 R 40 40 1 1 B X RC14/CN0/EMUC1/SOSCO/T1CK/U1ARX 35 -1200 -700 100 R 40 40 1 1 B X U1RX/SDI1/SDA/RF2 1 1200 0 100 L 40 40 1 1 B X U2RX/CN17/RF4 3 1200 -200 100 L 40 40 1 1 B X U2TX/CN18/RF5 2 1200 -300 100 L 40 40 1 1 B X VDD 7 -300 1200 100 D 40 40 1 1 W X VDD@1 28 -200 1200 100 D 40 40 1 1 W X VDD@2 40 -100 1200 100 D 40 40 1 1 W X VSS 6 0 -1200 100 U 40 40 1 1 W X VSS@1 30 100 -1200 100 U 40 40 1 1 W X VSS@2 39 200 -1200 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F4013/P # Package Name: DIL40 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F4013/P IC 0 40 Y Y 1 L N # Gate Name: A # Symbol Name: DSPIC30F4013 F0 "IC" -1100 1200 50 H V L B F1 "DSPIC30F4013/P" -1100 -1300 50 H V L B F2 "microchip-dspic-DIL40" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 1100 -1100 -1100 P 2 1 0 0 -1100 -1100 1100 -1100 P 2 1 0 0 1100 -1100 1100 1100 P 2 1 0 0 1100 1100 -1100 1100 X AVDD 40 100 1200 100 D 40 40 1 1 W X AVSS 39 400 -1200 100 U 40 40 1 1 W X C1RX/RF0 30 1200 200 100 L 40 40 1 1 B X C1TX/RF1 29 1200 100 100 L 40 40 1 1 B X EMUC2/OC1/RD0 34 1200 1000 100 L 40 40 1 1 B X EMUC3/SCK1/RF6 24 1200 -400 100 L 40 40 1 1 B X EMUD2/OC2/RD1 33 1200 900 100 L 40 40 1 1 B X EMUD3/U1TX/SDO1/SCL/RF3 25 1200 -100 100 L 40 40 1 1 B X INT1/IC1/RD8 23 1200 500 100 L 40 40 1 1 B X INT2/IC2/RD9 18 1200 400 100 L 40 40 1 1 B X MCLR 1 1200 -900 100 L 40 40 1 1 I X OC3/RD2 22 1200 800 100 L 40 40 1 1 B X OC4/RD3 19 1200 700 100 L 40 40 1 1 B X OSC1/CLKIN 13 -1200 -1000 100 R 40 40 1 1 I X OSC2/CLKO/RC15 14 -1200 -900 100 R 40 40 1 1 B X RA11/INT0 17 -1200 1000 100 R 40 40 1 1 B X RB0/AN0/CN2 2 -1200 800 100 R 40 40 1 1 B X RB1/AN1/CN3 3 -1200 700 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 4 -1200 600 100 R 40 40 1 1 B X RB3/AN3/CN5 5 -1200 500 100 R 40 40 1 1 B X RB4/AN4/CN6/IC7 6 -1200 400 100 R 40 40 1 1 B X RB5/AN5/CN7/IC8 7 -1200 300 100 R 40 40 1 1 B X RB6/AN6/EMUC/PGC/OCFA 8 -1200 200 100 R 40 40 1 1 B X RB7/AN7/EMUD/PGD 9 -1200 100 100 R 40 40 1 1 B X RB8/AN8 10 -1200 0 100 R 40 40 1 1 B X RB9/AN9/CSCK 38 -1200 -100 100 R 40 40 1 1 B X RB10/AN10/CSDI 37 -1200 -200 100 R 40 40 1 1 B X RB11/AN11/CSDO 36 -1200 -300 100 R 40 40 1 1 B X RB12/AN12/COFS 35 -1200 -400 100 R 40 40 1 1 B X RC13/CN1/EMUD1/SOSCI/T2CK/U1ATX 15 -1200 -600 100 R 40 40 1 1 B X RC14/CN0/EMUC1/SOSCO/T1CK/U1ARX 16 -1200 -700 100 R 40 40 1 1 B X U1RX/SDI1/SDA/RF2 26 1200 0 100 L 40 40 1 1 B X U2RX/CN17/RF4 28 1200 -200 100 L 40 40 1 1 B X U2TX/CN18/RF5 27 1200 -300 100 L 40 40 1 1 B X VDD 11 -300 1200 100 D 40 40 1 1 W X VDD@1 21 -200 1200 100 D 40 40 1 1 W X VDD@2 32 -100 1200 100 D 40 40 1 1 W X VSS 12 0 -1200 100 U 40 40 1 1 W X VSS@1 20 100 -1200 100 U 40 40 1 1 W X VSS@2 31 200 -1200 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F4013/PT # Package Name: TQFP44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F4013/PT IC 0 40 Y Y 1 L N # Gate Name: A # Symbol Name: DSPIC30F4013 F0 "IC" -1100 1200 50 H V L B F1 "DSPIC30F4013/PT" -1100 -1300 50 H V L B F2 "microchip-dspic-TQFP44" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 1100 -1100 -1100 P 2 1 0 0 -1100 -1100 1100 -1100 P 2 1 0 0 1100 -1100 1100 1100 P 2 1 0 0 1100 1100 -1100 1100 X AVDD 17 100 1200 100 D 40 40 1 1 W X AVSS 16 400 -1200 100 U 40 40 1 1 W X C1RX/RF0 5 1200 200 100 L 40 40 1 1 B X C1TX/RF1 4 1200 100 100 L 40 40 1 1 B X EMUC2/OC1/RD0 9 1200 1000 100 L 40 40 1 1 B X EMUC3/SCK1/RF6 43 1200 -400 100 L 40 40 1 1 B X EMUD2/OC2/RD1 8 1200 900 100 L 40 40 1 1 B X EMUD3/U1TX/SDO1/SCL/RF3 44 1200 -100 100 L 40 40 1 1 B X INT1/IC1/RD8 42 1200 500 100 L 40 40 1 1 B X INT2/IC2/RD9 37 1200 400 100 L 40 40 1 1 B X MCLR 18 1200 -900 100 L 40 40 1 1 I X OC3/RD2 41 1200 800 100 L 40 40 1 1 B X OC4/RD3 38 1200 700 100 L 40 40 1 1 B X OSC1/CLKIN 30 -1200 -1000 100 R 40 40 1 1 I X OSC2/CLKO/RC15 31 -1200 -900 100 R 40 40 1 1 B X RA11/INT0 36 -1200 1000 100 R 40 40 1 1 B X RB0/AN0/CN2 19 -1200 800 100 R 40 40 1 1 B X RB1/AN1/CN3 20 -1200 700 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 21 -1200 600 100 R 40 40 1 1 B X RB3/AN3/CN5 22 -1200 500 100 R 40 40 1 1 B X RB4/AN4/CN6/IC7 23 -1200 400 100 R 40 40 1 1 B X RB5/AN5/CN7/IC8 24 -1200 300 100 R 40 40 1 1 B X RB6/AN6/EMUC/PGC/OCFA 25 -1200 200 100 R 40 40 1 1 B X RB7/AN7/EMUD/PGD 26 -1200 100 100 R 40 40 1 1 B X RB8/AN8 27 -1200 0 100 R 40 40 1 1 B X RB9/AN9/CSCK 15 -1200 -100 100 R 40 40 1 1 B X RB10/AN10/CSDI 14 -1200 -200 100 R 40 40 1 1 B X RB11/AN11/CSDO 11 -1200 -300 100 R 40 40 1 1 B X RB12/AN12/COFS 10 -1200 -400 100 R 40 40 1 1 B X RC13/CN1/EMUD1/SOSCI/T2CK/U1ATX 32 -1200 -600 100 R 40 40 1 1 B X RC14/CN0/EMUC1/SOSCO/T1CK/U1ARX 35 -1200 -700 100 R 40 40 1 1 B X U1RX/SDI1/SDA/RF2 1 1200 0 100 L 40 40 1 1 B X U2RX/CN17/RF4 3 1200 -200 100 L 40 40 1 1 B X U2TX/CN18/RF5 2 1200 -300 100 L 40 40 1 1 B X VDD 7 -300 1200 100 D 40 40 1 1 W X VDD@1 28 -200 1200 100 D 40 40 1 1 W X VDD@2 40 -100 1200 100 D 40 40 1 1 W X VSS 6 0 -1200 100 U 40 40 1 1 W X VSS@1 29 100 -1200 100 U 40 40 1 1 W X VSS@2 39 200 -1200 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F5011/PTG # Package Name: TQFP64-10X10 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F5011/PTG IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F5011 F0 "IC" -1200 1700 50 H V L B F1 "DSPIC30F5011/PTG" 0 0 50 H V L B F2 "microchip-dspic-TQFP64-10X10" 0 150 50 H I C C DRAW P 2 1 0 0 -1200 1600 1200 1600 P 2 1 0 0 1200 1600 1200 -1500 P 2 1 0 0 1200 -1500 -1200 -1500 P 2 1 0 0 -1200 -1500 -1200 1600 T 1 7 66 86 0 1 0 dsPIC30F5011 T 0 355 1485 70 0 1 0 VDD T 0 55 -1415 70 0 1 0 VSS X AVDD 19 0 1700 100 D 40 40 1 1 W X AVSS 20 -300 -1600 100 U 40 40 1 1 W X C1RX/RF0 58 1300 500 100 L 40 40 1 1 B X C1TX/RF1 59 1300 400 100 L 40 40 1 1 B X C2RX/RG0 61 1300 -300 100 L 40 40 1 1 B X C2TX/RG1 60 1300 -400 100 L 40 40 1 1 B X CLKI/OSC1 39 1300 1300 100 L 40 40 1 1 I X CN8/SCK2/RG6 4 1300 -700 100 L 40 40 1 1 B X CN9/SDI2/RG7 5 1300 -800 100 L 40 40 1 1 B X CN10/SDO2/RG8 6 1300 -900 100 L 40 40 1 1 B X CN11/SS2/RG9 8 1300 -1000 100 L 40 40 1 1 B X CN17/U2RX/RF4 31 1300 100 100 L 40 40 1 1 B X CN18/U2TX/RF5 32 1300 0 100 L 40 40 1 1 B X COFS/RG15 1 1300 -1400 100 L 40 40 1 1 B X CSCK/RG14 62 1300 -1300 100 L 40 40 1 1 B X CSDI/RG12 63 1300 -1100 100 L 40 40 1 1 B X CSDO/RG13 64 1300 -1200 100 L 40 40 1 1 B X EMUD3/SDO1/U1TX/RF3 33 1300 200 100 L 40 40 1 1 B X INT0/EMUC3/SCK1/RF6 35 1300 -100 100 L 40 40 1 1 B X RB0/AN0/CN2/VR+ 16 -1300 1500 100 R 40 40 1 1 B X RB1/AN1/CN3/VR- 15 -1300 1400 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 14 -1300 1300 100 R 40 40 1 1 B X RB3/AN3/CN5 13 -1300 1200 100 R 40 40 1 1 B X RB4/AN4/CN6 12 -1300 1100 100 R 40 40 1 1 B X RB5/AN5/CN7 11 -1300 1000 100 R 40 40 1 1 B X RB6/AN6/OCFA/EMUC/PGC 17 -1300 900 100 R 40 40 1 1 B X RB7/AN7/EMUD/PGD 18 -1300 800 100 R 40 40 1 1 B X RB8/AN8 21 -1300 700 100 R 40 40 1 1 B X RB9/AN9 22 -1300 600 100 R 40 40 1 1 B X RB10/AN10 23 -1300 500 100 R 40 40 1 1 B X RB11/AN11 24 -1300 400 100 R 40 40 1 1 B X RB12/AN12 27 -1300 300 100 R 40 40 1 1 B X RB13/AN13 28 -1300 200 100 R 40 40 1 1 B X RB14/AN14 29 -1300 100 100 R 40 40 1 1 B X RB15/AN15/CN12/OCFB 30 -1300 0 100 R 40 40 1 1 B X RC15/CLKO/OSC2 40 1300 1200 100 L 40 40 1 1 B X RD0/OC1/EMUC2 46 -1300 -200 100 R 40 40 1 1 B X RD1/OC2/EMUD2 49 -1300 -300 100 R 40 40 1 1 B X RD2/OC3 50 -1300 -400 100 R 40 40 1 1 B X RD3/OC4 51 -1300 -500 100 R 40 40 1 1 B X RD4/OC5/IC5/CN13 52 -1300 -600 100 R 40 40 1 1 B X RD5/OC6/IC6/CN14 53 -1300 -700 100 R 40 40 1 1 B X RD6/OC7/CN15 54 -1300 -800 100 R 40 40 1 1 B X RD7/OC8/CN16 55 -1300 -900 100 R 40 40 1 1 B X RD8/IC1/INT1 42 -1300 -1000 100 R 40 40 1 1 B X RD9/IC2/INT2 43 -1300 -1100 100 R 40 40 1 1 B X RD10/IC3/INT3 44 -1300 -1200 100 R 40 40 1 1 B X RD11/IC4/INT4 45 -1300 -1300 100 R 40 40 1 1 B X SCL/RG2 37 1300 -500 100 L 40 40 1 1 B X SDA/RG3 36 1300 -600 100 L 40 40 1 1 B X SDI1/U1RX/RF2 34 1300 300 100 L 40 40 1 1 B X SOSCI/T4CK/EMUD1/CN1/RC13 47 1300 800 100 L 40 40 1 1 B X SOSCO/T1CK/EMUC1/CN0/RC14 48 1300 700 100 L 40 40 1 1 B X T2CK/RC1 2 1300 1000 100 L 40 40 1 1 B X T3CK/RC2 3 1300 900 100 L 40 40 1 1 B X VDD 10 200 1700 100 D 40 40 1 1 W X VDD@1 26 300 1700 100 D 40 40 1 1 W X VDD@2 38 400 1700 100 D 40 40 1 1 W X VDD@3 57 500 1700 100 D 40 40 1 1 W X VPP/MCLR 7 1300 1500 100 L 40 40 1 1 I X VSS 9 -100 -1600 100 U 40 40 1 1 W X VSS@1 25 0 -1600 100 U 40 40 1 1 W X VSS@2 41 100 -1600 100 U 40 40 1 1 W X VSS@3 56 200 -1600 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F5013/PT # Package Name: TQFP80-12X12 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F5013/PT IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F5013 F0 "IC" -1100 2100 50 H V L B F1 "DSPIC30F5013/PT" 0 0 50 H V L B F2 "microchip-dspic-TQFP80-12X12" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 2000 1100 2000 P 2 1 0 0 1100 2000 1100 -2000 P 2 1 0 0 1100 -2000 -1100 -2000 P 2 1 0 0 -1100 -2000 -1100 2000 T 1 57 316 86 0 1 0 dsPIC30F5013 X AVDD 25 100 2100 100 D 40 40 1 1 W X AVSS 26 100 -2100 100 U 40 40 1 1 W X C1RX/RF0 72 1200 200 100 L 40 40 1 1 B X C1TX/RF1 73 1200 100 100 L 40 40 1 1 B X C2RX/RG0 75 1200 -800 100 L 40 40 1 1 B X C2TX/RG1 74 1200 -900 100 L 40 40 1 1 B X CN8/SCK2/RG6 6 1200 -1200 100 L 40 40 1 1 B X CN9/SDI2/RG7 7 1200 -1300 100 L 40 40 1 1 B X CN10/SDO2/RG8 8 1200 -1400 100 L 40 40 1 1 B X CN11/SS2/RG9 10 1200 -1500 100 L 40 40 1 1 B X CN13/OC5/RD4 66 1200 1500 100 L 40 40 1 1 B X CN14/OC6/RD5 67 1200 1400 100 L 40 40 1 1 B X CN15/OC7/RD6 68 1200 1300 100 L 40 40 1 1 B X CN16/OC8/RD7 69 1200 1200 100 L 40 40 1 1 B X CN17/U2RX/RF4 39 1200 -200 100 L 40 40 1 1 B X CN18/U2TX/RF5 40 1200 -300 100 L 40 40 1 1 B X CN19/IC6/RD13 65 1200 600 100 L 40 40 1 1 B X CN20/IC7/RD14 37 1200 500 100 L 40 40 1 1 B X CN21/IC8/RD15 38 1200 400 100 L 40 40 1 1 B X COFS/RG15 1 1200 -1900 100 L 40 40 1 1 B X CSCK/RG14 78 1200 -1800 100 L 40 40 1 1 B X CSDI/RG12 79 1200 -1600 100 L 40 40 1 1 B X CSDO/RG13 80 1200 -1700 100 L 40 40 1 1 B X EMUC2/OC1/RD0 58 1200 1900 100 L 40 40 1 1 B X EMUC3/SCK1/INT0/RF6 45 1200 -400 100 L 40 40 1 1 B X EMUD2/OC2/RD1 61 1200 1800 100 L 40 40 1 1 B X EMUD3/SDO1/RF8 43 1200 -600 100 L 40 40 1 1 B X IC1/RD8 54 1200 1100 100 L 40 40 1 1 B X IC2/RD9 55 1200 1000 100 L 40 40 1 1 B X IC3/RD10 56 1200 900 100 L 40 40 1 1 B X IC4/RD11 57 1200 800 100 L 40 40 1 1 B X IC5/RD12 64 1200 700 100 L 40 40 1 1 B X MCLR/VPP 9 -1200 -1700 100 R 40 40 1 1 I X OC3/RD2 62 1200 1700 100 L 40 40 1 1 B X OC4/RD3 63 1200 1600 100 L 40 40 1 1 B X OSC1/CLKI 49 -1200 -1500 100 R 40 40 1 1 I X OSC2/CLKO/RC15 50 -1200 -1400 100 R 40 40 1 1 B X RA6/CN22 76 -1200 1900 100 R 40 40 1 1 B X RA7/CN23 77 -1200 1800 100 R 40 40 1 1 B X RA9/VR- 23 -1200 1700 100 R 40 40 1 1 B X RA10/VR+ 24 -1200 1600 100 R 40 40 1 1 B X RA12/INT1 13 -1200 1500 100 R 40 40 1 1 B X RA13/INT2 14 -1200 1400 100 R 40 40 1 1 B X RA14/INT3 52 -1200 1300 100 R 40 40 1 1 B X RA15/INT4 53 -1200 1200 100 R 40 40 1 1 B X RB0/AN0/CN2/EMUD/PGD 20 -1200 1000 100 R 40 40 1 1 B X RB1/AN1/CN3/EMUC/PGC 19 -1200 900 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 18 -1200 800 100 R 40 40 1 1 B X RB3/AN3/CN5 17 -1200 700 100 R 40 40 1 1 B X RB4/AN4/CN6 16 -1200 600 100 R 40 40 1 1 B X RB5/AN5/CN7 15 -1200 500 100 R 40 40 1 1 B X RB6/AN6/OCFA 21 -1200 400 100 R 40 40 1 1 B X RB7/AN7 22 -1200 300 100 R 40 40 1 1 B X RB8/AN8 27 -1200 200 100 R 40 40 1 1 B X RB9/AN9 28 -1200 100 100 R 40 40 1 1 B X RB10/AN10 29 -1200 0 100 R 40 40 1 1 B X RB11/AN11 30 -1200 -100 100 R 40 40 1 1 B X RB12/AN12 33 -1200 -200 100 R 40 40 1 1 B X RB13/AN13 34 -1200 -300 100 R 40 40 1 1 B X RB14/AN14 35 -1200 -400 100 R 40 40 1 1 B X RB15/AN15/CN12/OCFB 36 -1200 -500 100 R 40 40 1 1 B X RC1/T2CK 2 -1200 -700 100 R 40 40 1 1 B X RC2/T3CK 3 -1200 -800 100 R 40 40 1 1 B X RC3/T4CK 4 -1200 -900 100 R 40 40 1 1 B X RC4/T5CK 5 -1200 -1000 100 R 40 40 1 1 B X RC13/CN1/EMUD1/SOSCI 59 -1200 -1100 100 R 40 40 1 1 B X RC14/CN0/EMUC1/SOSCO/T1CK 60 -1200 -1200 100 R 40 40 1 1 B X SCL/RG2 47 1200 -1000 100 L 40 40 1 1 B X SDA/RG3 46 1200 -1100 100 L 40 40 1 1 B X SDI1/RF7 44 1200 -500 100 L 40 40 1 1 B X U1RX/RF2 42 1200 0 100 L 40 40 1 1 B X U1TX/RF3 41 1200 -100 100 L 40 40 1 1 B X VDD 12 -400 2100 100 D 40 40 1 1 W X VDD@1 32 -300 2100 100 D 40 40 1 1 W X VDD@2 48 -200 2100 100 D 40 40 1 1 W X VDD@3 71 -100 2100 100 D 40 40 1 1 W X VSS 11 -400 -2100 100 U 40 40 1 1 W X VSS@1 31 -300 -2100 100 U 40 40 1 1 W X VSS@2 51 -200 -2100 100 U 40 40 1 1 W X VSS@3 70 -100 -2100 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F5015/PF # Package Name: TQFP64-10X10 # Dev Tech: '' # Dev Prefix: # Gate count = 1 # DEF DSPIC30F5015/PF ?? 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F5015 DRAW P 2 1 0 0 -1200 1500 -1200 -1500 P 2 1 0 0 -1200 -1500 1200 -1500 P 2 1 0 0 1200 -1500 1200 1500 P 2 1 0 0 1200 1500 -1200 1500 X AVDD 19 300 1600 100 D 40 40 1 1 W X AVSS 20 300 -1600 100 U 40 40 1 1 W X CN15/RD6 54 1300 800 100 L 40 40 1 1 B X EMUC2/OC1/RD0 46 1300 1400 100 L 40 40 1 1 B X EMUD2/OC2/RD1 49 1300 1300 100 L 40 40 1 1 B X FLTA/IC1/INT1/RD8 42 1300 600 100 L 40 40 1 1 B X FLTB/IC2/INT2/RD9 43 1300 500 100 L 40 40 1 1 B X IC3/INT3/RD10 44 1300 400 100 L 40 40 1 1 B X IC4/INT4/RD11 45 1300 300 100 L 40 40 1 1 B X IC5/CN13/RD4 52 1300 1000 100 L 40 40 1 1 B X IC6/CN14/RD5 53 1300 900 100 L 40 40 1 1 B X OC3/RD2 50 1300 1200 100 L 40 40 1 1 B X OC4/RD3 51 1300 1100 100 L 40 40 1 1 B X OSC1/CLKI 39 -1300 -600 100 R 40 40 1 1 I X OSC2/CLKO/RC15 40 -1300 -500 100 R 40 40 1 1 B X PWM1H/RE1 61 1300 0 100 L 40 40 1 1 B X PWM1L/RE0 60 1300 100 100 L 40 40 1 1 B X PWM2H/RE3 63 1300 -200 100 L 40 40 1 1 B X PWM2L/RE2 62 1300 -100 100 L 40 40 1 1 B X PWM3H/RE5 1 1300 -400 100 L 40 40 1 1 B X PWM3L/RE4 64 1300 -300 100 L 40 40 1 1 B X PWM4H/RE7 3 1300 -600 100 L 40 40 1 1 B X PWM4L/RE6 2 1300 -500 100 L 40 40 1 1 B X RB0/AN0/CN2/VR+ 16 -1300 1400 100 R 40 40 1 1 B X RB1/AN1/CN3/VR- 15 -1300 1300 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1 14 -1300 1200 100 R 40 40 1 1 B X RB3/AN3/CN5/INDX 13 -1300 1100 100 R 40 40 1 1 B X RB4/AN4/CN6/QEA 12 -1300 1000 100 R 40 40 1 1 B X RB5/AN5/CN7/QEB 11 -1300 900 100 R 40 40 1 1 B X RB6/AN6/EMUC/OCFA/PGC 17 -1300 800 100 R 40 40 1 1 B X RB7/AN7/EMUD/PGD 18 -1300 700 100 R 40 40 1 1 B X RB8/AN8 21 -1300 600 100 R 40 40 1 1 B X RB9/AN9 22 -1300 500 100 R 40 40 1 1 B X RB10/AN10 23 -1300 400 100 R 40 40 1 1 B X RB11/AN11 24 -1300 300 100 R 40 40 1 1 B X RB12/AN12 27 -1300 200 100 R 40 40 1 1 B X RB13/AN13 28 -1300 100 100 R 40 40 1 1 B X RB14/AN14 29 -1300 0 100 R 40 40 1 1 B X RB15/AN15/CN12 30 -1300 -100 100 R 40 40 1 1 B X RC13/CN1/EMUD1/SOSCI/T4CK 47 -1300 -300 100 R 40 40 1 1 B X RC14/CN0/EMUC1/SOSCO/T1CK 48 -1300 -400 100 R 40 40 1 1 B X RF0/C1RX 58 -1300 -800 100 R 40 40 1 1 B X RF1/C1TX 59 -1300 -900 100 R 40 40 1 1 B X RF2/U1RX/SDI1 34 -1300 -1000 100 R 40 40 1 1 B X RF3/U1TX/SDO1/EMUD3 33 -1300 -1100 100 R 40 40 1 1 B X RF4/CN17 31 -1300 -1200 100 R 40 40 1 1 B X RF5/CN18 32 -1300 -1300 100 R 40 40 1 1 B X RF6/INT0/SCK1/EMUC3 35 -1300 -1400 100 R 40 40 1 1 B X SCK2/CN8/RG6 4 1300 -1000 100 L 40 40 1 1 B X SCL/RG2 37 1300 -800 100 L 40 40 1 1 B X SDA/RG3 36 1300 -900 100 L 40 40 1 1 B X SDI2/CN9/RG7 5 1300 -1100 100 L 40 40 1 1 B X SDO2/CN10/RG8 6 1300 -1200 100 L 40 40 1 1 B X SS2/CN11/RG9 8 1300 -1300 100 L 40 40 1 1 B X UPDN/CN16/RD7 55 1300 700 100 L 40 40 1 1 B X VDD 10 -200 1600 100 D 40 40 1 1 W X VDD@1 26 -100 1600 100 D 40 40 1 1 W X VDD@2 38 0 1600 100 D 40 40 1 1 W X VDD@3 57 100 1600 100 D 40 40 1 1 W X VPP/MCLR 7 1300 -1400 100 L 40 40 1 1 I X VSS 9 -200 -1600 100 U 40 40 1 1 W X VSS@1 25 -100 -1600 100 U 40 40 1 1 W X VSS@2 41 0 -1600 100 U 40 40 1 1 W X VSS@3 56 100 -1600 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F5016/PF # Package Name: TQFP80-12X12 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F5016/PF IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F5016 F0 "IC" -1100 2100 50 H V L B F1 "DSPIC30F5016/PF" 0 0 50 H V L B F2 "microchip-dspic-TQFP80-12X12" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 2000 1100 2000 P 2 1 0 0 1100 2000 1100 -2000 P 2 1 0 0 1100 -2000 -1100 -2000 P 2 1 0 0 -1100 -2000 -1100 2000 T 1 50 400 100 0 1 0 dsPIC30F5016 X AVDD 25 100 2100 100 D 40 40 1 1 W X AVSS 26 300 -2100 100 U 40 40 1 1 W X C1RX/RF0 72 1200 200 100 L 40 40 1 1 B X C1TX/RF1 73 1200 100 100 L 40 40 1 1 B X CN8/SCK2/RG6 6 1200 -1200 100 L 40 40 1 1 B X CN9/SDI2/RG7 7 1200 -1300 100 L 40 40 1 1 B X CN10/SDO2/RG8 8 1200 -1400 100 L 40 40 1 1 B X CN11/SS2/RG9 10 1200 -1500 100 L 40 40 1 1 B X CN13/RD4 66 1200 1500 100 L 40 40 1 1 B X CN14/RD5 67 1200 1400 100 L 40 40 1 1 B X CN15/RD6 68 1200 1300 100 L 40 40 1 1 B X CN17/RF4 39 1200 -200 100 L 40 40 1 1 B X CN18/RF5 40 1200 -300 100 L 40 40 1 1 B X CN19/RD13 65 1200 600 100 L 40 40 1 1 B X CN20/RD14 37 1200 500 100 L 40 40 1 1 B X CN21/RD15 38 1200 400 100 L 40 40 1 1 B X EMUC2/OC1/RD0 58 1200 1900 100 L 40 40 1 1 B X EMUC3/SCK1/INT0/RF6 45 1200 -400 100 L 40 40 1 1 B X EMUD2/OC2/RD1 61 1200 1800 100 L 40 40 1 1 B X EMUD3/SDO1/RF8 43 1200 -600 100 L 40 40 1 1 B X IC1/RD8 54 1200 1100 100 L 40 40 1 1 B X IC2/RD9 55 1200 1000 100 L 40 40 1 1 B X IC3/RD10 56 1200 900 100 L 40 40 1 1 B X IC4/RD11 57 1200 800 100 L 40 40 1 1 B X OC3/RD2 62 1200 1700 100 L 40 40 1 1 B X OC4/RD3 63 1200 1600 100 L 40 40 1 1 B X OSC1/CLKI 49 -1200 -300 100 R 40 40 1 1 I X OSC2/CLKO/RC15 50 -1200 -400 100 R 40 40 1 1 B X RA9/VR- 23 -1200 1900 100 R 40 40 1 1 B X RA10/VR+ 24 -1200 1800 100 R 40 40 1 1 B X RA14/INT3 52 -1200 1700 100 R 40 40 1 1 B X RA15/INT4 53 -1200 1600 100 R 40 40 1 1 B X RB0/AN0/CN2/EMUD/PGD 20 -1200 1400 100 R 40 40 1 1 B X RB1/AN1/CN3/EMUC/PGC 19 -1200 1300 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1 18 -1200 1200 100 R 40 40 1 1 B X RB3/AN3/CN5/INDX 17 -1200 1100 100 R 40 40 1 1 B X RB4/AN4/CN6/QEA 16 -1200 1000 100 R 40 40 1 1 B X RB5/AN5/CN7/QEB 15 -1200 900 100 R 40 40 1 1 B X RB6/AN6/OCFA 21 -1200 800 100 R 40 40 1 1 B X RB7/AN7 22 -1200 700 100 R 40 40 1 1 B X RB8/AN8 27 -1200 600 100 R 40 40 1 1 B X RB9/AN9 28 -1200 500 100 R 40 40 1 1 B X RB10/AN10 29 -1200 400 100 R 40 40 1 1 B X RB11/AN11 30 -1200 300 100 R 40 40 1 1 B X RB12/AN12 33 -1200 200 100 R 40 40 1 1 B X RB13/AN13 34 -1200 100 100 R 40 40 1 1 B X RB14/AN14 35 -1200 0 100 R 40 40 1 1 B X RB15/AN15/CN12 36 -1200 -100 100 R 40 40 1 1 B X RC1/T2CK 4 -1200 -500 100 R 40 40 1 1 B X RC3/T4CK 5 -1200 -600 100 R 40 40 1 1 B X RC13/CN1/EMUD1/SOSCI 59 -1200 -700 100 R 40 40 1 1 B X RC14/CN0/EMUC1/SOSCO/T1CK 60 -1200 -800 100 R 40 40 1 1 B X RD12 64 1200 700 100 L 40 40 1 1 B X RE0/PWM1L 76 -1200 -1000 100 R 40 40 1 1 B X RE1/PWM1H 77 -1200 -1100 100 R 40 40 1 1 B X RE2/PWM2L 78 -1200 -1200 100 R 40 40 1 1 B X RE3/PWM2H 79 -1200 -1300 100 R 40 40 1 1 B X RE4/PWM3L 80 -1200 -1400 100 R 40 40 1 1 B X RE5/PWM3H 1 -1200 -1500 100 R 40 40 1 1 B X RE6/PWM4L 2 -1200 -1600 100 R 40 40 1 1 B X RE7/PWM4H 3 -1200 -1700 100 R 40 40 1 1 B X RE8/INT1/FLTA 13 -1200 -1800 100 R 40 40 1 1 B X RE9/INT2/FLTB 14 -1200 -1900 100 R 40 40 1 1 B X RG0 75 1200 -800 100 L 40 40 1 1 B X RG1 74 1200 -900 100 L 40 40 1 1 B X SCL/RG2 47 1200 -1000 100 L 40 40 1 1 B X SDA/RG3 46 1200 -1100 100 L 40 40 1 1 B X SDI1/RF7 44 1200 -500 100 L 40 40 1 1 B X U1RX/RF2 42 1200 0 100 L 40 40 1 1 B X U1TX/RF3 41 1200 -100 100 L 40 40 1 1 B X UPDN/CN16/RD7 69 1200 1200 100 L 40 40 1 1 B X VDD 12 -400 2100 100 D 40 40 1 1 W X VDD@1 32 -300 2100 100 D 40 40 1 1 W X VDD@2 48 -200 2100 100 D 40 40 1 1 W X VDD@3 71 -100 2100 100 D 40 40 1 1 W X VPP/MCLR 9 1200 -1700 100 L 40 40 1 1 I X VSS 11 -200 -2100 100 U 40 40 1 1 W X VSS@1 31 -100 -2100 100 U 40 40 1 1 W X VSS@2 51 0 -2100 100 U 40 40 1 1 W X VSS@3 70 100 -2100 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F6010/PF # Package Name: TQFP80-917 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F6010/PF IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F6010 F0 "IC" -1100 2100 50 H V L B F1 "DSPIC30F6010/PF" 0 0 50 H V L B F2 "microchip-dspic-TQFP80-917" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 2000 1100 2000 P 2 1 0 0 1100 2000 1100 -2000 P 2 1 0 0 1100 -2000 -1100 -2000 P 2 1 0 0 -1100 -2000 -1100 2000 T 1 50 400 100 0 1 0 dsPIC30F6010 X AVDD 25 100 2100 100 D 40 40 1 1 W X AVSS 26 300 -2100 100 U 40 40 1 1 W X C1RX/RF0 72 1200 200 100 L 40 40 1 1 B X C1TX/RF1 73 1200 100 100 L 40 40 1 1 B X C2RX/RG0 75 1200 -800 100 L 40 40 1 1 B X C2TX/RG1 74 1200 -900 100 L 40 40 1 1 B X CN8/SCK2/RG6 6 1200 -1200 100 L 40 40 1 1 B X CN9/SDI2/RG7 7 1200 -1300 100 L 40 40 1 1 B X CN10/SDO2/RG8 8 1200 -1400 100 L 40 40 1 1 B X CN11/SS2/RG9 10 1200 -1500 100 L 40 40 1 1 B X CN13/OC5/RD4 66 1200 1500 100 L 40 40 1 1 B X CN14/OC6/RD5 67 1200 1400 100 L 40 40 1 1 B X CN15/OC7/RD6 68 1200 1300 100 L 40 40 1 1 B X CN17/U2RX/RF4 39 1200 -200 100 L 40 40 1 1 B X CN18/U2TX/RF5 40 1200 -300 100 L 40 40 1 1 B X CN19/IC6/RD13 65 1200 600 100 L 40 40 1 1 B X CN20/IC7/RD14 37 1200 500 100 L 40 40 1 1 B X CN21/IC8/RD15 38 1200 400 100 L 40 40 1 1 B X EMUC2/OC1/RD0 58 1200 1900 100 L 40 40 1 1 B X EMUC3/SCK1/INT0/RF6 45 1200 -400 100 L 40 40 1 1 B X EMUD2/OC2/RD1 61 1200 1800 100 L 40 40 1 1 B X EMUD3/SDO1/RF8 43 1200 -600 100 L 40 40 1 1 B X IC1/RD8 54 1200 1100 100 L 40 40 1 1 B X IC2/RD9 55 1200 1000 100 L 40 40 1 1 B X IC3/RD10 56 1200 900 100 L 40 40 1 1 B X IC4/RD11 57 1200 800 100 L 40 40 1 1 B X IC5/RD12 64 1200 700 100 L 40 40 1 1 B X OC3/RD2 62 1200 1700 100 L 40 40 1 1 B X OC4/RD3 63 1200 1600 100 L 40 40 1 1 B X OSC1/CLKI 49 -1200 -300 100 R 40 40 1 1 I X OSC2/CLKO/RC15 50 -1200 -400 100 R 40 40 1 1 B X RA9/VR- 23 -1200 1900 100 R 40 40 1 1 B X RA10/VR+ 24 -1200 1800 100 R 40 40 1 1 B X RA14/INT3 52 -1200 1700 100 R 40 40 1 1 B X RA15/INT4 53 -1200 1600 100 R 40 40 1 1 B X RB0/AN0/CN2/EMUD/PGD 20 -1200 1400 100 R 40 40 1 1 B X RB1/AN1/CN3/EMUC/PGC 19 -1200 1300 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 18 -1200 1200 100 R 40 40 1 1 B X RB3/AN3/CN5/INDX 17 -1200 1100 100 R 40 40 1 1 B X RB4/AN4/CN6/QEA 16 -1200 1000 100 R 40 40 1 1 B X RB5/AN5/CN7/QEB 15 -1200 900 100 R 40 40 1 1 B X RB6/AN6/OCFA 21 -1200 800 100 R 40 40 1 1 B X RB7/AN7 22 -1200 700 100 R 40 40 1 1 B X RB8/AN8 27 -1200 600 100 R 40 40 1 1 B X RB9/AN9 28 -1200 500 100 R 40 40 1 1 B X RB10/AN10 29 -1200 400 100 R 40 40 1 1 B X RB11/AN11 30 -1200 300 100 R 40 40 1 1 B X RB12/AN12 33 -1200 200 100 R 40 40 1 1 B X RB13/AN13 34 -1200 100 100 R 40 40 1 1 B X RB14/AN14 35 -1200 0 100 R 40 40 1 1 B X RB15/AN15/CN12/OCFB 36 -1200 -100 100 R 40 40 1 1 B X RC1/T2CK 4 -1200 -500 100 R 40 40 1 1 B X RC3/T4CK 5 -1200 -600 100 R 40 40 1 1 B X RC13/CN1/EMUD1/SOSCI 59 -1200 -700 100 R 40 40 1 1 B X RC14/CN0/EMUC1/SOSCO/T1CK 60 -1200 -800 100 R 40 40 1 1 B X RE0/PWM1L 76 -1200 -1000 100 R 40 40 1 1 B X RE1/PWM1H 77 -1200 -1100 100 R 40 40 1 1 B X RE2/PWM2L 78 -1200 -1200 100 R 40 40 1 1 B X RE3/PWM2H 79 -1200 -1300 100 R 40 40 1 1 B X RE4/PWM3L 80 -1200 -1400 100 R 40 40 1 1 B X RE5/PWM3H 1 -1200 -1500 100 R 40 40 1 1 B X RE6/PWM4L 2 -1200 -1600 100 R 40 40 1 1 B X RE7/PWM4H 3 -1200 -1700 100 R 40 40 1 1 B X RE8/INT1/FLTA 13 -1200 -1800 100 R 40 40 1 1 B X RE9/INT2/FLTB 14 -1200 -1900 100 R 40 40 1 1 B X SCL/RG2 47 1200 -1000 100 L 40 40 1 1 B X SDA/RG3 46 1200 -1100 100 L 40 40 1 1 B X SDI1/RF7 44 1200 -500 100 L 40 40 1 1 B X U1RX/RF2 42 1200 0 100 L 40 40 1 1 B X U1TX/RF3 41 1200 -100 100 L 40 40 1 1 B X UPDN/CN16/OC8/RD7 69 1200 1200 100 L 40 40 1 1 B X VDD 12 -400 2100 100 D 40 40 1 1 W X VDD@1 32 -300 2100 100 D 40 40 1 1 W X VDD@2 48 -200 2100 100 D 40 40 1 1 W X VDD@3 71 -100 2100 100 D 40 40 1 1 W X VPP/MCLR 9 1200 -1700 100 L 40 40 1 1 I X VSS 11 -200 -2100 100 U 40 40 1 1 W X VSS@1 31 -100 -2100 100 U 40 40 1 1 W X VSS@2 51 0 -2100 100 U 40 40 1 1 W X VSS@3 70 100 -2100 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F6011/PF # Package Name: TQFP64 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F6011/PF IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F6011 F0 "IC" -1200 1700 50 H V L B F1 "DSPIC30F6011/PF" 0 0 50 H V L B F2 "microchip-dspic-TQFP64" 0 150 50 H I C C DRAW P 2 1 0 0 -1200 1600 1200 1600 P 2 1 0 0 1200 1600 1200 -1500 P 2 1 0 0 1200 -1500 -1200 -1500 P 2 1 0 0 -1200 -1500 -1200 1600 T 1 7 66 86 0 1 0 dsPIC30F6011 T 0 355 1485 70 0 1 0 VDD T 0 55 -1415 70 0 1 0 VSS X AVDD 19 0 1700 100 D 40 40 1 1 W X AVSS 20 -300 -1600 100 U 40 40 1 1 W X C1RX/RF0 58 1300 500 100 L 40 40 1 1 B X C1TX/RF1 59 1300 400 100 L 40 40 1 1 B X C2RX/RG0 61 1300 -300 100 L 40 40 1 1 B X C2TX/RG1 60 1300 -400 100 L 40 40 1 1 B X CLKI/OSC1 39 1300 1300 100 L 40 40 1 1 I X CN8/SCK2/RG6 4 1300 -700 100 L 40 40 1 1 B X CN9/SDI2/RG7 5 1300 -800 100 L 40 40 1 1 B X CN10/SDO2/RG8 6 1300 -900 100 L 40 40 1 1 B X CN11/SS2/RG9 8 1300 -1000 100 L 40 40 1 1 B X CN17/U2RX/RF4 31 1300 100 100 L 40 40 1 1 B X CN18/U2TX/RF5 32 1300 0 100 L 40 40 1 1 B X EMUD3/SDO1/U1TX/RF3 33 1300 200 100 L 40 40 1 1 B X INT0/EMUC3/SCK1/RF6 35 1300 -100 100 L 40 40 1 1 B X RB0/AN0/CN2/EMUD/PGD 16 -1300 1500 100 R 40 40 1 1 B X RB1/AN1/CN3/EMUC/PGC 15 -1300 1400 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 14 -1300 1300 100 R 40 40 1 1 B X RB3/AN3/CN5 13 -1300 1200 100 R 40 40 1 1 B X RB4/AN4/CN6 12 -1300 1100 100 R 40 40 1 1 B X RB5/AN5/CN7 11 -1300 1000 100 R 40 40 1 1 B X RB6/AN6/OCFA 17 -1300 900 100 R 40 40 1 1 B X RB7/AN7 18 -1300 800 100 R 40 40 1 1 B X RB8/AN8 21 -1300 700 100 R 40 40 1 1 B X RB9/AN9 22 -1300 600 100 R 40 40 1 1 B X RB10/AN10 23 -1300 500 100 R 40 40 1 1 B X RB11/AN11 24 -1300 400 100 R 40 40 1 1 B X RB12/AN12 27 -1300 300 100 R 40 40 1 1 B X RB13/AN13 28 -1300 200 100 R 40 40 1 1 B X RB14/AN14 29 -1300 100 100 R 40 40 1 1 B X RB15/AN15/CN12/OCFB 30 -1300 0 100 R 40 40 1 1 B X RC15/CLKO/OSC2 40 1300 1200 100 L 40 40 1 1 B X RD0/OC1/EMUC2 46 -1300 -200 100 R 40 40 1 1 B X RD1/OC2/EMUD2 49 -1300 -300 100 R 40 40 1 1 B X RD2/OC3 50 -1300 -400 100 R 40 40 1 1 B X RD3/OC4 51 -1300 -500 100 R 40 40 1 1 B X RD4/OC5/IC5/CN13 52 -1300 -600 100 R 40 40 1 1 B X RD5/OC6/IC6/CN14 53 -1300 -700 100 R 40 40 1 1 B X RD6/OC7/CN15 54 -1300 -800 100 R 40 40 1 1 B X RD7/OC8/CN16 55 -1300 -900 100 R 40 40 1 1 B X RD8/IC1/INT1 42 -1300 -1000 100 R 40 40 1 1 B X RD9/IC2/INT2 43 -1300 -1100 100 R 40 40 1 1 B X RD10/IC3/INT3 44 -1300 -1200 100 R 40 40 1 1 B X RD11/IC4/INT4 45 -1300 -1300 100 R 40 40 1 1 B X RG12 63 1300 -1100 100 L 40 40 1 1 B X RG13 64 1300 -1200 100 L 40 40 1 1 B X RG14 62 1300 -1300 100 L 40 40 1 1 B X RG15 1 1300 -1400 100 L 40 40 1 1 B X SCL/RG2 37 1300 -500 100 L 40 40 1 1 B X SDA/RG3 36 1300 -600 100 L 40 40 1 1 B X SDI1/U1RX/RF2 34 1300 300 100 L 40 40 1 1 B X SOSCI/T4CK/EMUD1/CN1/RC13 47 1300 800 100 L 40 40 1 1 B X SOSCO/T1CK/EMUC1/CN0/RC14 48 1300 700 100 L 40 40 1 1 B X T2CK/RC1 2 1300 1000 100 L 40 40 1 1 B X T3CK/RC2 3 1300 900 100 L 40 40 1 1 B X VDD 10 200 1700 100 D 40 40 1 1 W X VDD@1 26 300 1700 100 D 40 40 1 1 W X VDD@2 38 400 1700 100 D 40 40 1 1 W X VDD@3 57 500 1700 100 D 40 40 1 1 W X VPP/MCLR 7 1300 1500 100 L 40 40 1 1 I X VSS 9 -100 -1600 100 U 40 40 1 1 W X VSS@1 25 0 -1600 100 U 40 40 1 1 W X VSS@2 41 100 -1600 100 U 40 40 1 1 W X VSS@3 56 200 -1600 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F6012/PF # Package Name: TQFP64 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F6012/PF IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F6012 F0 "IC" -1200 1700 50 H V L B F1 "DSPIC30F6012/PF" 0 0 50 H V L B F2 "microchip-dspic-TQFP64" 0 150 50 H I C C DRAW P 2 1 0 0 -1200 1600 1200 1600 P 2 1 0 0 1200 1600 1200 -1500 P 2 1 0 0 1200 -1500 -1200 -1500 P 2 1 0 0 -1200 -1500 -1200 1600 T 1 7 66 86 0 1 0 dsPIC30F6012 T 0 355 1485 70 0 1 0 VDD T 0 55 -1415 70 0 1 0 VSS X AVDD 19 0 1700 100 D 40 40 1 1 W X AVSS 20 -300 -1600 100 U 40 40 1 1 W X C1RX/RF0 58 1300 500 100 L 40 40 1 1 B X C1TX/RF1 59 1300 400 100 L 40 40 1 1 B X C2RX/RG0 61 1300 -300 100 L 40 40 1 1 B X C2TX/RG1 60 1300 -400 100 L 40 40 1 1 B X CLKI/OSC1 39 1300 1300 100 L 40 40 1 1 I X CN8/SCK2/RG6 4 1300 -700 100 L 40 40 1 1 B X CN9/SDI2/RG7 5 1300 -800 100 L 40 40 1 1 B X CN10/SDO2/RG8 6 1300 -900 100 L 40 40 1 1 B X CN11/SS2/RG9 8 1300 -1000 100 L 40 40 1 1 B X CN17/U2RX/RF4 31 1300 100 100 L 40 40 1 1 B X CN18/U2TX/RF5 32 1300 0 100 L 40 40 1 1 B X COFS/RG15 1 1300 -1400 100 L 40 40 1 1 B X CSCK/RG14 62 1300 -1300 100 L 40 40 1 1 B X CSDI/RG12 63 1300 -1100 100 L 40 40 1 1 B X CSDO/RG13 64 1300 -1200 100 L 40 40 1 1 B X EMUD3/SDO1/U1TX/RF3 33 1300 200 100 L 40 40 1 1 B X INT0/EMUC3/SCK1/RF6 35 1300 -100 100 L 40 40 1 1 B X RB0/AN0/CN2/EMUD/PGD 16 -1300 1500 100 R 40 40 1 1 B X RB1/AN1/CN3/EMUC/PGC 15 -1300 1400 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 14 -1300 1300 100 R 40 40 1 1 B X RB3/AN3/CN5 13 -1300 1200 100 R 40 40 1 1 B X RB4/AN4/CN6 12 -1300 1100 100 R 40 40 1 1 B X RB5/AN5/CN7 11 -1300 1000 100 R 40 40 1 1 B X RB6/AN6/OCFA 17 -1300 900 100 R 40 40 1 1 B X RB7/AN7 18 -1300 800 100 R 40 40 1 1 B X RB8/AN8 21 -1300 700 100 R 40 40 1 1 B X RB9/AN9 22 -1300 600 100 R 40 40 1 1 B X RB10/AN10 23 -1300 500 100 R 40 40 1 1 B X RB11/AN11 24 -1300 400 100 R 40 40 1 1 B X RB12/AN12 27 -1300 300 100 R 40 40 1 1 B X RB13/AN13 28 -1300 200 100 R 40 40 1 1 B X RB14/AN14 29 -1300 100 100 R 40 40 1 1 B X RB15/AN15/CN12/OCFB 30 -1300 0 100 R 40 40 1 1 B X RC15/CLKO/OSC2 40 1300 1200 100 L 40 40 1 1 B X RD0/OC1/EMUC2 46 -1300 -200 100 R 40 40 1 1 B X RD1/OC2/EMUD2 49 -1300 -300 100 R 40 40 1 1 B X RD2/OC3 50 -1300 -400 100 R 40 40 1 1 B X RD3/OC4 51 -1300 -500 100 R 40 40 1 1 B X RD4/OC5/IC5/CN13 52 -1300 -600 100 R 40 40 1 1 B X RD5/OC6/IC6/CN14 53 -1300 -700 100 R 40 40 1 1 B X RD6/OC7/CN15 54 -1300 -800 100 R 40 40 1 1 B X RD7/OC8/CN16 55 -1300 -900 100 R 40 40 1 1 B X RD8/IC1/INT1 42 -1300 -1000 100 R 40 40 1 1 B X RD9/IC2/INT2 43 -1300 -1100 100 R 40 40 1 1 B X RD10/IC3/INT3 44 -1300 -1200 100 R 40 40 1 1 B X RD11/IC4/INT4 45 -1300 -1300 100 R 40 40 1 1 B X SCL/RG2 37 1300 -500 100 L 40 40 1 1 B X SDA/RG3 36 1300 -600 100 L 40 40 1 1 B X SDI1/U1RX/RF2 34 1300 300 100 L 40 40 1 1 B X SOSCI/T4CK/EMUD1/CN1/RC13 47 1300 800 100 L 40 40 1 1 B X SOSCO/T1CK/EMUC1/CN0/RC14 48 1300 700 100 L 40 40 1 1 B X T2CK/RC1 2 1300 1000 100 L 40 40 1 1 B X T3CK/RC2 3 1300 900 100 L 40 40 1 1 B X VDD 10 200 1700 100 D 40 40 1 1 W X VDD@1 26 300 1700 100 D 40 40 1 1 W X VDD@2 38 400 1700 100 D 40 40 1 1 W X VDD@3 57 500 1700 100 D 40 40 1 1 W X VPP/MCLR 7 1300 1500 100 L 40 40 1 1 I X VSS 9 -100 -1600 100 U 40 40 1 1 W X VSS@1 25 0 -1600 100 U 40 40 1 1 W X VSS@2 41 100 -1600 100 U 40 40 1 1 W X VSS@3 56 200 -1600 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F6013/PF # Package Name: TQFP80-917 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F6013/PF IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F6013 F0 "IC" -1100 2100 50 H V L B F1 "DSPIC30F6013/PF" 0 0 50 H V L B F2 "microchip-dspic-TQFP80-917" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 2000 1100 2000 P 2 1 0 0 1100 2000 1100 -2000 P 2 1 0 0 1100 -2000 -1100 -2000 P 2 1 0 0 -1100 -2000 -1100 2000 T 1 57 316 86 0 1 0 dsPIC30F6013 X AVDD 25 100 2100 100 D 40 40 1 1 W X AVSS 26 100 -2100 100 U 40 40 1 1 W X C1RX/RF0 72 1200 200 100 L 40 40 1 1 B X C1TX/RF1 73 1200 100 100 L 40 40 1 1 B X C2RX/RG0 75 1200 -800 100 L 40 40 1 1 B X C2TX/RG1 74 1200 -900 100 L 40 40 1 1 B X CN8/SCK2/RG6 6 1200 -1200 100 L 40 40 1 1 B X CN9/SDI2/RG7 7 1200 -1300 100 L 40 40 1 1 B X CN10/SDO2/RG8 8 1200 -1400 100 L 40 40 1 1 B X CN11/SS2/RG9 10 1200 -1500 100 L 40 40 1 1 B X CN13/OC5/RD4 66 1200 1500 100 L 40 40 1 1 B X CN14/OC6/RD5 67 1200 1400 100 L 40 40 1 1 B X CN15/OC7/RD6 68 1200 1300 100 L 40 40 1 1 B X CN16/OC8/RD7 69 1200 1200 100 L 40 40 1 1 B X CN17/U2RX/RF4 39 1200 -200 100 L 40 40 1 1 B X CN18/U2TX/RF5 40 1200 -300 100 L 40 40 1 1 B X CN19/IC6/RD13 65 1200 600 100 L 40 40 1 1 B X CN20/IC7/RD14 37 1200 500 100 L 40 40 1 1 B X CN21/IC8/RD15 38 1200 400 100 L 40 40 1 1 B X EMUC2/OC1/RD0 58 1200 1900 100 L 40 40 1 1 B X EMUC3/SCK1/INT0/RF6 45 1200 -400 100 L 40 40 1 1 B X EMUD2/OC2/RD1 61 1200 1800 100 L 40 40 1 1 B X EMUD3/SDO1/RF8 43 1200 -600 100 L 40 40 1 1 B X IC1/RD8 54 1200 1100 100 L 40 40 1 1 B X IC2/RD9 55 1200 1000 100 L 40 40 1 1 B X IC3/RD10 56 1200 900 100 L 40 40 1 1 B X IC4/RD11 57 1200 800 100 L 40 40 1 1 B X IC5/RD12 64 1200 700 100 L 40 40 1 1 B X MCLR/VPP 9 -1200 -1700 100 R 40 40 1 1 I X OC3/RD2 62 1200 1700 100 L 40 40 1 1 B X OC4/RD3 63 1200 1600 100 L 40 40 1 1 B X OSC1/CLKI 49 -1200 -1500 100 R 40 40 1 1 I X OSC2/CLKO/RC15 50 -1200 -1400 100 R 40 40 1 1 B X RA6/CN22 76 -1200 1900 100 R 40 40 1 1 B X RA7/CN23 77 -1200 1800 100 R 40 40 1 1 B X RA9/VR- 23 -1200 1700 100 R 40 40 1 1 B X RA10/VR+ 24 -1200 1600 100 R 40 40 1 1 B X RA12/INT1 13 -1200 1500 100 R 40 40 1 1 B X RA13/INT2 14 -1200 1400 100 R 40 40 1 1 B X RA14/INT3 52 -1200 1300 100 R 40 40 1 1 B X RA15/INT4 53 -1200 1200 100 R 40 40 1 1 B X RB0/AN0/CN2/EMUD/PGD 20 -1200 1000 100 R 40 40 1 1 B X RB1/AN1/CN3/EMUC/PGC 19 -1200 900 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 18 -1200 800 100 R 40 40 1 1 B X RB3/AN3/CN5 17 -1200 700 100 R 40 40 1 1 B X RB4/AN4/CN6 16 -1200 600 100 R 40 40 1 1 B X RB5/AN5/CN7 15 -1200 500 100 R 40 40 1 1 B X RB6/AN6/OCFA 21 -1200 400 100 R 40 40 1 1 B X RB7/AN7 22 -1200 300 100 R 40 40 1 1 B X RB8/AN8 27 -1200 200 100 R 40 40 1 1 B X RB9/AN9 28 -1200 100 100 R 40 40 1 1 B X RB10/AN10 29 -1200 0 100 R 40 40 1 1 B X RB11/AN11 30 -1200 -100 100 R 40 40 1 1 B X RB12/AN12 33 -1200 -200 100 R 40 40 1 1 B X RB13/AN13 34 -1200 -300 100 R 40 40 1 1 B X RB14/AN14 35 -1200 -400 100 R 40 40 1 1 B X RB15/AN15/CN12/OCFB 36 -1200 -500 100 R 40 40 1 1 B X RC1/T2CK 2 -1200 -700 100 R 40 40 1 1 B X RC2/T3CK 3 -1200 -800 100 R 40 40 1 1 B X RC3/T4CK 4 -1200 -900 100 R 40 40 1 1 B X RC4/T5CK 5 -1200 -1000 100 R 40 40 1 1 B X RC13/CN1/EMUD1/SOSCI 59 -1200 -1100 100 R 40 40 1 1 B X RC14/CN0/EMUC1/SOSCO/T1CK 60 -1200 -1200 100 R 40 40 1 1 B X RG12 79 1200 -1600 100 L 40 40 1 1 B X RG13 80 1200 -1700 100 L 40 40 1 1 B X RG14 78 1200 -1800 100 L 40 40 1 1 B X RG15 1 1200 -1900 100 L 40 40 1 1 B X SCL/RG2 47 1200 -1000 100 L 40 40 1 1 B X SDA/RG3 46 1200 -1100 100 L 40 40 1 1 B X SDI1/RF7 44 1200 -500 100 L 40 40 1 1 B X U1RX/RF2 42 1200 0 100 L 40 40 1 1 B X U1TX/RF3 41 1200 -100 100 L 40 40 1 1 B X VDD 12 -400 2100 100 D 40 40 1 1 W X VDD@1 32 -300 2100 100 D 40 40 1 1 W X VDD@2 48 -200 2100 100 D 40 40 1 1 W X VDD@3 71 -100 2100 100 D 40 40 1 1 W X VSS 11 -400 -2100 100 U 40 40 1 1 W X VSS@1 31 -300 -2100 100 U 40 40 1 1 W X VSS@2 51 -200 -2100 100 U 40 40 1 1 W X VSS@3 70 -100 -2100 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC30F6014/PF # Package Name: TQFP80-917 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC30F6014/PF IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC30F6014 F0 "IC" -1100 2100 50 H V L B F1 "DSPIC30F6014/PF" 0 0 50 H V L B F2 "microchip-dspic-TQFP80-917" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 2000 1100 2000 P 2 1 0 0 1100 2000 1100 -2000 P 2 1 0 0 1100 -2000 -1100 -2000 P 2 1 0 0 -1100 -2000 -1100 2000 T 1 57 316 86 0 1 0 dsPIC30F6014 X AVDD 25 100 2100 100 D 40 40 1 1 W X AVSS 26 100 -2100 100 U 40 40 1 1 W X C1RX/RF0 72 1200 200 100 L 40 40 1 1 B X C1TX/RF1 73 1200 100 100 L 40 40 1 1 B X C2RX/RG0 75 1200 -800 100 L 40 40 1 1 B X C2TX/RG1 74 1200 -900 100 L 40 40 1 1 B X CN8/SCK2/RG6 6 1200 -1200 100 L 40 40 1 1 B X CN9/SDI2/RG7 7 1200 -1300 100 L 40 40 1 1 B X CN10/SDO2/RG8 8 1200 -1400 100 L 40 40 1 1 B X CN11/SS2/RG9 10 1200 -1500 100 L 40 40 1 1 B X CN13/OC5/RD4 66 1200 1500 100 L 40 40 1 1 B X CN14/OC6/RD5 67 1200 1400 100 L 40 40 1 1 B X CN15/OC7/RD6 68 1200 1300 100 L 40 40 1 1 B X CN16/OC8/RD7 69 1200 1200 100 L 40 40 1 1 B X CN17/U2RX/RF4 39 1200 -200 100 L 40 40 1 1 B X CN18/U2TX/RF5 40 1200 -300 100 L 40 40 1 1 B X CN19/IC6/RD13 65 1200 600 100 L 40 40 1 1 B X CN20/IC7/RD14 37 1200 500 100 L 40 40 1 1 B X CN21/IC8/RD15 38 1200 400 100 L 40 40 1 1 B X COFS/RG15 1 1200 -1900 100 L 40 40 1 1 B X CSCK/RG14 78 1200 -1800 100 L 40 40 1 1 B X CSDI/RG12 79 1200 -1600 100 L 40 40 1 1 B X CSDO/RG13 80 1200 -1700 100 L 40 40 1 1 B X EMUC2/OC1/RD0 58 1200 1900 100 L 40 40 1 1 B X EMUC3/SCK1/INT0/RF6 45 1200 -400 100 L 40 40 1 1 B X EMUD2/OC2/RD1 61 1200 1800 100 L 40 40 1 1 B X EMUD3/SDO1/RF8 43 1200 -600 100 L 40 40 1 1 B X IC1/RD8 54 1200 1100 100 L 40 40 1 1 B X IC2/RD9 55 1200 1000 100 L 40 40 1 1 B X IC3/RD10 56 1200 900 100 L 40 40 1 1 B X IC4/RD11 57 1200 800 100 L 40 40 1 1 B X IC5/RD12 64 1200 700 100 L 40 40 1 1 B X MCLR/VPP 9 -1200 -1700 100 R 40 40 1 1 I X OC3/RD2 62 1200 1700 100 L 40 40 1 1 B X OC4/RD3 63 1200 1600 100 L 40 40 1 1 B X OSC1/CLKI 49 -1200 -1500 100 R 40 40 1 1 I X OSC2/CLKO/RC15 50 -1200 -1400 100 R 40 40 1 1 B X RA6/CN22 76 -1200 1900 100 R 40 40 1 1 B X RA7/CN23 77 -1200 1800 100 R 40 40 1 1 B X RA9/VR- 23 -1200 1700 100 R 40 40 1 1 B X RA10/VR+ 24 -1200 1600 100 R 40 40 1 1 B X RA12/INT1 13 -1200 1500 100 R 40 40 1 1 B X RA13/INT2 14 -1200 1400 100 R 40 40 1 1 B X RA14/INT3 52 -1200 1300 100 R 40 40 1 1 B X RA15/INT4 53 -1200 1200 100 R 40 40 1 1 B X RB0/AN0/CN2/EMUD/PGD 20 -1200 1000 100 R 40 40 1 1 B X RB1/AN1/CN3/EMUC/PGC 19 -1200 900 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 18 -1200 800 100 R 40 40 1 1 B X RB3/AN3/CN5 17 -1200 700 100 R 40 40 1 1 B X RB4/AN4/CN6 16 -1200 600 100 R 40 40 1 1 B X RB5/AN5/CN7 15 -1200 500 100 R 40 40 1 1 B X RB6/AN6/OCFA 21 -1200 400 100 R 40 40 1 1 B X RB7/AN7 22 -1200 300 100 R 40 40 1 1 B X RB8/AN8 27 -1200 200 100 R 40 40 1 1 B X RB9/AN9 28 -1200 100 100 R 40 40 1 1 B X RB10/AN10 29 -1200 0 100 R 40 40 1 1 B X RB11/AN11 30 -1200 -100 100 R 40 40 1 1 B X RB12/AN12 33 -1200 -200 100 R 40 40 1 1 B X RB13/AN13 34 -1200 -300 100 R 40 40 1 1 B X RB14/AN14 35 -1200 -400 100 R 40 40 1 1 B X RB15/AN15/CN12/OCFB 36 -1200 -500 100 R 40 40 1 1 B X RC1/T2CK 2 -1200 -700 100 R 40 40 1 1 B X RC2/T3CK 3 -1200 -800 100 R 40 40 1 1 B X RC3/T4CK 4 -1200 -900 100 R 40 40 1 1 B X RC4/T5CK 5 -1200 -1000 100 R 40 40 1 1 B X RC13/CN1/EMUD1/SOSCI 59 -1200 -1100 100 R 40 40 1 1 B X RC14/CN0/EMUC1/SOSCO/T1CK 60 -1200 -1200 100 R 40 40 1 1 B X SCL/RG2 47 1200 -1000 100 L 40 40 1 1 B X SDA/RG3 46 1200 -1100 100 L 40 40 1 1 B X SDI1/RF7 44 1200 -500 100 L 40 40 1 1 B X U1RX/RF2 42 1200 0 100 L 40 40 1 1 B X U1TX/RF3 41 1200 -100 100 L 40 40 1 1 B X VDD 12 -400 2100 100 D 40 40 1 1 W X VDD@1 32 -300 2100 100 D 40 40 1 1 W X VDD@2 48 -200 2100 100 D 40 40 1 1 W X VDD@3 71 -100 2100 100 D 40 40 1 1 W X VSS 11 -400 -2100 100 U 40 40 1 1 W X VSS@1 31 -300 -2100 100 U 40 40 1 1 W X VSS@2 51 -200 -2100 100 U 40 40 1 1 W X VSS@3 70 -100 -2100 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC33FJ12GP201/SO # Package Name: SO-18W # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC33FJ12GP201/SO IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC33FJ12GP201 F0 "IC" -1700 440 50 H V L B F1 "DSPIC33FJ12GP201/SO" -1700 -620 50 H V L B F2 "microchip-dspic-SO-18W" 0 150 50 H I C C DRAW P 2 1 0 0 -1700 400 -1700 -500 P 2 1 0 0 -1700 -500 1700 -500 P 2 1 0 0 1700 -500 1700 400 P 2 1 0 0 1700 400 -1700 400 X INT0/RP7/CN23/RB7 10 1800 0 100 L 40 40 1 1 B X MCLR# 1 -1800 -400 100 R 40 40 1 1 I X PGC1/EMUC1/RP1/AN3/CN5/RB1 5 1800 200 100 L 40 40 1 1 B X PGD1/EMUD1/RP0/AN2/CN4/RB0 4 1800 300 100 L 40 40 1 1 B X RA0/CN2/AN0/VREF+/EMUD2/PGD2 2 -1800 300 100 R 40 40 1 1 B X RA1/CN3/AN1/VREF-/EMUC2/PGC2 3 -1800 200 100 R 40 40 1 1 B X RA2/OSCI/CLKI/CN30 6 -1800 100 100 R 40 40 1 1 B X RA3/OSCO/CLKO/CN29 7 -1800 0 100 R 40 40 1 1 B X RA4/CN0/T1CK/SOSCO/EMUC3/PGC3 9 -1800 -100 100 R 40 40 1 1 B X RB4/CN1/RP4/SOSCI/EMUD3/PGD3 8 -1800 -200 100 R 40 40 1 1 B X RP14/AN7/CN12/RB14 15 1800 -300 100 L 40 40 1 1 B X RP15/AN6/CN11/RB15 16 1800 -400 100 L 40 40 1 1 B X SCL1/RP9/CN21/RB9 12 1800 -200 100 L 40 40 1 1 B X SDA1/RP8/CN22/RB8 11 1800 -100 100 L 40 40 1 1 B X VDD 18 0 500 100 D 40 40 1 1 W X VDDCORE 14 100 500 100 D 40 40 1 1 W X VSS 13 100 -600 100 U 40 40 1 1 W X VSS@1 17 0 -600 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC33FJ12GP201/SP # Package Name: DIL18 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC33FJ12GP201/SP IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC33FJ12GP201 F0 "IC" -1700 440 50 H V L B F1 "DSPIC33FJ12GP201/SP" -1700 -620 50 H V L B F2 "microchip-dspic-DIL18" 0 150 50 H I C C DRAW P 2 1 0 0 -1700 400 -1700 -500 P 2 1 0 0 -1700 -500 1700 -500 P 2 1 0 0 1700 -500 1700 400 P 2 1 0 0 1700 400 -1700 400 X INT0/RP7/CN23/RB7 10 1800 0 100 L 40 40 1 1 B X MCLR# 1 -1800 -400 100 R 40 40 1 1 I X PGC1/EMUC1/RP1/AN3/CN5/RB1 5 1800 200 100 L 40 40 1 1 B X PGD1/EMUD1/RP0/AN2/CN4/RB0 4 1800 300 100 L 40 40 1 1 B X RA0/CN2/AN0/VREF+/EMUD2/PGD2 2 -1800 300 100 R 40 40 1 1 B X RA1/CN3/AN1/VREF-/EMUC2/PGC2 3 -1800 200 100 R 40 40 1 1 B X RA2/OSCI/CLKI/CN30 6 -1800 100 100 R 40 40 1 1 B X RA3/OSCO/CLKO/CN29 7 -1800 0 100 R 40 40 1 1 B X RA4/CN0/T1CK/SOSCO/EMUC3/PGC3 9 -1800 -100 100 R 40 40 1 1 B X RB4/CN1/RP4/SOSCI/EMUD3/PGD3 8 -1800 -200 100 R 40 40 1 1 B X RP14/AN7/CN12/RB14 15 1800 -300 100 L 40 40 1 1 B X RP15/AN6/CN11/RB15 16 1800 -400 100 L 40 40 1 1 B X SCL1/RP9/CN21/RB9 12 1800 -200 100 L 40 40 1 1 B X SDA1/RP8/CN22/RB8 11 1800 -100 100 L 40 40 1 1 B X VDD 18 0 500 100 D 40 40 1 1 W X VDDCORE 14 100 500 100 D 40 40 1 1 W X VSS 13 100 -600 100 U 40 40 1 1 W X VSS@1 17 0 -600 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC33FJ12GP202/ML # Package Name: QFN-S28-6X6 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC33FJ12GP202/ML IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC33FJ12GP202 F0 "IC" -1600 760 50 H V L B F1 "DSPIC33FJ12GP202/ML" -1600 -840 50 H V L B F2 "microchip-dspic-QFN-S28-6X6" 0 150 50 H I C C DRAW P 2 1 0 0 -1600 700 -1600 -700 P 2 1 0 0 -1600 -700 1400 -700 P 2 1 0 0 1400 -700 1400 700 P 2 1 0 0 1400 700 -1600 700 X AN6/RP15/CN11/RB15 23 1500 -500 100 L 40 40 1 1 B X AN7/RP14/CN12/RB14 22 1500 -400 100 L 40 40 1 1 B X AN8/RP13/CN13/RB13 21 1500 -300 100 L 40 40 1 1 B X AN9/RP12/CN14/RB12 20 1500 -200 100 L 40 40 1 1 B X ASCL1/RP6/CN24/RB6 12 1500 400 100 L 40 40 1 1 B X ASDA1/RP5/CN27/RB5 11 1500 500 100 L 40 40 1 1 B X AVDD 25 200 800 100 D 40 40 1 1 W X AVSS 24 200 -800 100 U 40 40 1 1 W X INT0/RP7/CN23/RB7 13 1500 300 100 L 40 40 1 1 B X MCLR# 26 -1700 -600 100 R 40 40 1 1 I X RA0/CN2/AN0/VREF+/EMUD2/PGD2 27 -1700 600 100 R 40 40 1 1 B X RA1/CN3/AN1/VREF-/EMUC2/PGC2 28 -1700 500 100 R 40 40 1 1 B X RA2/OSCO/CLK1/CN30 6 -1700 400 100 R 40 40 1 1 B X RA3/OSCI/CLKI/CN29 7 -1700 300 100 R 40 40 1 1 B X RA4/CN0/T1CK/SOSCO/EMUC3/PGC3 9 -1700 200 100 R 40 40 1 1 B X RB0/CN4/AN2/RP0/EMUD1/PGD1 1 -1700 0 100 R 40 40 1 1 B X RB1/CN5/AN3/RP1/EMUC1/PGC1 2 -1700 -100 100 R 40 40 1 1 B X RB2/CN6/AN4/RP2 3 -1700 -200 100 R 40 40 1 1 B X RB3/CN7/AN5/RP3 4 -1700 -300 100 R 40 40 1 1 B X RB4/CN1/RP4/SOSCI/EMUD3/PGD3 8 -1700 -400 100 R 40 40 1 1 B X TCK/SCL1/RP8/CN22/RB8 14 1500 200 100 L 40 40 1 1 B X TDI/RP10/CN16/RB10 18 1500 0 100 L 40 40 1 1 B X TDO/SDA1/RP9/CN21/RB9 15 1500 100 100 L 40 40 1 1 B X TMS/RP11/CN15/RB11 19 1500 -100 100 L 40 40 1 1 B X VDD 10 0 800 100 D 40 40 1 1 W X VDDCORE 17 100 800 100 D 40 40 1 1 W X VSS 5 0 -800 100 U 40 40 1 1 W X VSS@1 16 100 -800 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC33FJ12GP202/SO # Package Name: SO-28W # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC33FJ12GP202/SO IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC33FJ12GP202 F0 "IC" -1600 760 50 H V L B F1 "DSPIC33FJ12GP202/SO" -1600 -840 50 H V L B F2 "microchip-dspic-SO-28W" 0 150 50 H I C C DRAW P 2 1 0 0 -1600 700 -1600 -700 P 2 1 0 0 -1600 -700 1400 -700 P 2 1 0 0 1400 -700 1400 700 P 2 1 0 0 1400 700 -1600 700 X AN6/RP15/CN11/RB15 26 1500 -500 100 L 40 40 1 1 B X AN7/RP14/CN12/RB14 25 1500 -400 100 L 40 40 1 1 B X AN8/RP13/CN13/RB13 24 1500 -300 100 L 40 40 1 1 B X AN9/RP12/CN14/RB12 23 1500 -200 100 L 40 40 1 1 B X ASCL1/RP6/CN24/RB6 15 1500 400 100 L 40 40 1 1 B X ASDA1/RP5/CN27/RB5 14 1500 500 100 L 40 40 1 1 B X AVDD 28 200 800 100 D 40 40 1 1 W X AVSS 27 200 -800 100 U 40 40 1 1 W X INT0/RP7/CN23/RB7 16 1500 300 100 L 40 40 1 1 B X MCLR# 1 -1700 -600 100 R 40 40 1 1 I X RA0/CN2/AN0/VREF+/EMUD2/PGD2 2 -1700 600 100 R 40 40 1 1 B X RA1/CN3/AN1/VREF-/EMUC2/PGC2 3 -1700 500 100 R 40 40 1 1 B X RA2/OSCO/CLK1/CN30 9 -1700 400 100 R 40 40 1 1 B X RA3/OSCI/CLKI/CN29 10 -1700 300 100 R 40 40 1 1 B X RA4/CN0/T1CK/SOSCO/EMUC3/PGC3 12 -1700 200 100 R 40 40 1 1 B X RB0/CN4/AN2/RP0/EMUD1/PGD1 4 -1700 0 100 R 40 40 1 1 B X RB1/CN5/AN3/RP1/EMUC1/PGC1 5 -1700 -100 100 R 40 40 1 1 B X RB2/CN6/AN4/RP2 6 -1700 -200 100 R 40 40 1 1 B X RB3/CN7/AN5/RP3 7 -1700 -300 100 R 40 40 1 1 B X RB4/CN1/RP4/SOSCI/EMUD3/PGD3 11 -1700 -400 100 R 40 40 1 1 B X TCK/SCL1/RP8/CN22/RB8 17 1500 200 100 L 40 40 1 1 B X TDI/RP10/CN16/RB10 21 1500 0 100 L 40 40 1 1 B X TDO/SDA1/RP9/CN21/RB9 18 1500 100 100 L 40 40 1 1 B X TMS/RP11/CN15/RB11 22 1500 -100 100 L 40 40 1 1 B X VDD 13 0 800 100 D 40 40 1 1 W X VDDCORE 20 100 800 100 D 40 40 1 1 W X VSS 8 0 -800 100 U 40 40 1 1 W X VSS@1 19 100 -800 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC33FJ12GP202/SP # Package Name: DIL28-3 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC33FJ12GP202/SP IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC33FJ12GP202 F0 "IC" -1600 760 50 H V L B F1 "DSPIC33FJ12GP202/SP" -1600 -840 50 H V L B F2 "microchip-dspic-DIL28-3" 0 150 50 H I C C DRAW P 2 1 0 0 -1600 700 -1600 -700 P 2 1 0 0 -1600 -700 1400 -700 P 2 1 0 0 1400 -700 1400 700 P 2 1 0 0 1400 700 -1600 700 X AN6/RP15/CN11/RB15 26 1500 -500 100 L 40 40 1 1 B X AN7/RP14/CN12/RB14 25 1500 -400 100 L 40 40 1 1 B X AN8/RP13/CN13/RB13 24 1500 -300 100 L 40 40 1 1 B X AN9/RP12/CN14/RB12 23 1500 -200 100 L 40 40 1 1 B X ASCL1/RP6/CN24/RB6 15 1500 400 100 L 40 40 1 1 B X ASDA1/RP5/CN27/RB5 14 1500 500 100 L 40 40 1 1 B X AVDD 28 200 800 100 D 40 40 1 1 W X AVSS 27 200 -800 100 U 40 40 1 1 W X INT0/RP7/CN23/RB7 16 1500 300 100 L 40 40 1 1 B X MCLR# 1 -1700 -600 100 R 40 40 1 1 I X RA0/CN2/AN0/VREF+/EMUD2/PGD2 2 -1700 600 100 R 40 40 1 1 B X RA1/CN3/AN1/VREF-/EMUC2/PGC2 3 -1700 500 100 R 40 40 1 1 B X RA2/OSCO/CLK1/CN30 9 -1700 400 100 R 40 40 1 1 B X RA3/OSCI/CLKI/CN29 10 -1700 300 100 R 40 40 1 1 B X RA4/CN0/T1CK/SOSCO/EMUC3/PGC3 12 -1700 200 100 R 40 40 1 1 B X RB0/CN4/AN2/RP0/EMUD1/PGD1 4 -1700 0 100 R 40 40 1 1 B X RB1/CN5/AN3/RP1/EMUC1/PGC1 5 -1700 -100 100 R 40 40 1 1 B X RB2/CN6/AN4/RP2 6 -1700 -200 100 R 40 40 1 1 B X RB3/CN7/AN5/RP3 7 -1700 -300 100 R 40 40 1 1 B X RB4/CN1/RP4/SOSCI/EMUD3/PGD3 11 -1700 -400 100 R 40 40 1 1 B X TCK/SCL1/RP8/CN22/RB8 17 1500 200 100 L 40 40 1 1 B X TDI/RP10/CN16/RB10 21 1500 0 100 L 40 40 1 1 B X TDO/SDA1/RP9/CN21/RB9 18 1500 100 100 L 40 40 1 1 B X TMS/RP11/CN15/RB11 22 1500 -100 100 L 40 40 1 1 B X VDD 13 0 800 100 D 40 40 1 1 W X VDDCORE 20 100 800 100 D 40 40 1 1 W X VSS 8 0 -800 100 U 40 40 1 1 W X VSS@1 19 100 -800 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC33FJ64GP206/PT # Package Name: TQFP64-10X10 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC33FJ64GP206/PT IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC33FJXXGP206 F0 "IC" -1200 1700 50 H V L B F1 "DSPIC33FJ64GP206/PT" 400 -1800 50 H V L B F2 "microchip-dspic-TQFP64-10X10" 0 150 50 H I C C DRAW P 2 1 0 0 -1200 1600 1200 1600 P 2 1 0 0 1200 1600 1200 -1600 P 2 1 0 0 1200 -1600 -1200 -1600 P 2 1 0 0 -1200 -1600 -1200 1600 T 0 655 1485 70 0 1 0 VDD T 0 5 -1515 70 0 1 0 VSS X AN16/T2CK/T7CK/RC1 2 1300 900 100 L 40 40 1 1 B X AN17/T3CK/T6CK/RC2 3 1300 800 100 L 40 40 1 1 B X AVDD 19 300 1700 100 D 40 40 1 1 W X AVSS 20 -300 -1700 100 U 40 40 1 1 W X CN8/SCK2/RG6 4 1300 -800 100 L 40 40 1 1 B X CN9/SDI2/RG7 5 1300 -900 100 L 40 40 1 1 B X CN10/SDO2/RG8 6 1300 -1000 100 L 40 40 1 1 B X CN17/U2RX/RF4 31 1300 0 100 L 40 40 1 1 B X CN18/U2TX/RF5 32 1300 -100 100 L 40 40 1 1 B X COFS/RG15 1 1300 -1500 100 L 40 40 1 1 B X CSCK/RG14 62 1300 -1400 100 L 40 40 1 1 B X CSDI/RG12 63 1300 -1200 100 L 40 40 1 1 B X CSDO/RG13 64 1300 -1300 100 L 40 40 1 1 B X INT0/U1RTS/SCK1/RF6 35 1300 -200 100 L 40 40 1 1 B X MCLR 7 1300 1400 100 L 40 40 1 1 I X PGC2/SOSCO/T1CK/EMUC2/CN0/RC14 48 1300 600 100 L 40 40 1 1 B X PGD2/SOSCI/T4CK/EMUD2/CN1/RC13 47 1300 700 100 L 40 40 1 1 B X RB0/AN0/CN2/VR+/PGD3/EMUD3 16 -1300 1500 100 R 40 40 1 1 B X RB1/AN1/CN3/VR-/PGC3/EMUC3 15 -1300 1400 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 14 -1300 1300 100 R 40 40 1 1 B X RB3/AN3/CN5 13 -1300 1200 100 R 40 40 1 1 B X RB4/AN4/CN6/IC7 12 -1300 1100 100 R 40 40 1 1 B X RB5/AN5/CN7/IC8 11 -1300 1000 100 R 40 40 1 1 B X RB6/AN6/OCFA/EMUC1/PGC1 17 -1300 900 100 R 40 40 1 1 B X RB7/AN7/EMUD1/PGD1 18 -1300 800 100 R 40 40 1 1 B X RB8/AN8/U2CTS 21 -1300 700 100 R 40 40 1 1 B X RB9/AN9 22 -1300 600 100 R 40 40 1 1 B X RB10/AN10/TMS 23 -1300 500 100 R 40 40 1 1 B X RB11/AN11/TDO 24 -1300 400 100 R 40 40 1 1 B X RB12/AN12/TCK 27 -1300 300 100 R 40 40 1 1 B X RB13/AN13/TDI 28 -1300 200 100 R 40 40 1 1 B X RB14/AN14/U2RTS 29 -1300 100 100 R 40 40 1 1 B X RB15/AN15/CN12/OCFB 30 -1300 0 100 R 40 40 1 1 B X RC12/CLKI/OSC1 39 1300 1200 100 L 40 40 1 1 B X RC15/CLKO/OSC2 40 1300 1100 100 L 40 40 1 1 B X RD0/OC1 46 -1300 -200 100 R 40 40 1 1 B X RD1/OC2 49 -1300 -300 100 R 40 40 1 1 B X RD2/OC3 50 -1300 -400 100 R 40 40 1 1 B X RD3/OC4 51 -1300 -500 100 R 40 40 1 1 B X RD4/OC5/IC5/CN13 52 -1300 -600 100 R 40 40 1 1 B X RD5/OC6/IC6/CN14 53 -1300 -700 100 R 40 40 1 1 B X RD6/OC7/CN15 54 -1300 -800 100 R 40 40 1 1 B X RD7/OC8/CN16 55 -1300 -900 100 R 40 40 1 1 B X RD8/IC1/INT1 42 -1300 -1000 100 R 40 40 1 1 B X RD9/IC2/INT2/U1CTS 43 -1300 -1100 100 R 40 40 1 1 B X RD10/IC3/INT3 44 -1300 -1200 100 R 40 40 1 1 B X RD11/IC4/INT4 45 -1300 -1300 100 R 40 40 1 1 B X RF0 58 1300 400 100 L 40 40 1 1 B X RF1 59 1300 300 100 L 40 40 1 1 B X RG0 61 1300 -400 100 L 40 40 1 1 B X RG1 60 1300 -500 100 L 40 40 1 1 B X SCL1/RG2 37 1300 -600 100 L 40 40 1 1 B X SDA1/RG3 36 1300 -700 100 L 40 40 1 1 B X SDI1/U1RX/RF2 34 1300 200 100 L 40 40 1 1 B X SDO1/U1TX/RF3 33 1300 100 100 L 40 40 1 1 B X T5CK/CN11/SS2/RG9 8 1300 -1100 100 L 40 40 1 1 B X VDD 10 500 1700 100 D 40 40 1 1 W X VDD@1 26 600 1700 100 D 40 40 1 1 W X VDD@2 38 700 1700 100 D 40 40 1 1 W X VDD@3 57 800 1700 100 D 40 40 1 1 W X VDDC 56 400 1700 100 D 40 40 1 1 W X VSS 9 -100 -1700 100 U 40 40 1 1 W X VSS@1 25 0 -1700 100 U 40 40 1 1 W X VSS@2 41 100 -1700 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC33FJ64GP306/PT # Package Name: TQFP64-10X10 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC33FJ64GP306/PT IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC33FJXXGP306 F0 "IC" -1200 1700 50 H V L B F1 "DSPIC33FJ64GP306/PT" 400 -1800 50 H V L B F2 "microchip-dspic-TQFP64-10X10" 0 150 50 H I C C DRAW P 2 1 0 0 -1200 1600 1200 1600 P 2 1 0 0 1200 1600 1200 -1600 P 2 1 0 0 1200 -1600 -1200 -1600 P 2 1 0 0 -1200 -1600 -1200 1600 T 0 655 1485 70 0 1 0 VDD T 0 5 -1515 70 0 1 0 VSS X AN16/T2CK/T7CK/RC1 2 1300 900 100 L 40 40 1 1 B X AN17/T3CK/T6CK/RC2 3 1300 800 100 L 40 40 1 1 B X AVDD 19 300 1700 100 D 40 40 1 1 W X AVSS 20 -300 -1700 100 U 40 40 1 1 W X CN8/SCK2/RG6 4 1300 -800 100 L 40 40 1 1 B X CN9/SDI2/RG7 5 1300 -900 100 L 40 40 1 1 B X CN10/SDO2/RG8 6 1300 -1000 100 L 40 40 1 1 B X COFS/RG15 1 1300 -1500 100 L 40 40 1 1 B X CSCK/RG14 62 1300 -1400 100 L 40 40 1 1 B X CSDI/RG12 63 1300 -1200 100 L 40 40 1 1 B X CSDO/RG13 64 1300 -1300 100 L 40 40 1 1 B X INT0/U1RTS/SCK1/RF6 35 1300 -200 100 L 40 40 1 1 B X MCLR 7 1300 1400 100 L 40 40 1 1 I X PGC2/SOSCO/T1CK/EMUC2/CN0/RC14 48 1300 600 100 L 40 40 1 1 B X PGD2/SOSCI/T4CK/EMUD2/CN1/RC13 47 1300 700 100 L 40 40 1 1 B X RB0/AN0/CN2/VR+/PGD3/EMUD3 16 -1300 1500 100 R 40 40 1 1 B X RB1/AN1/CN3/VR-/PGC3/EMUC3 15 -1300 1400 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 14 -1300 1300 100 R 40 40 1 1 B X RB3/AN3/CN5 13 -1300 1200 100 R 40 40 1 1 B X RB4/AN4/CN6/IC7 12 -1300 1100 100 R 40 40 1 1 B X RB5/AN5/CN7/IC8 11 -1300 1000 100 R 40 40 1 1 B X RB6/AN6/OCFA/EMUC1/PGC1 17 -1300 900 100 R 40 40 1 1 B X RB7/AN7/EMUD1/PGD1 18 -1300 800 100 R 40 40 1 1 B X RB8/AN8/U2CTS 21 -1300 700 100 R 40 40 1 1 B X RB9/AN9 22 -1300 600 100 R 40 40 1 1 B X RB10/AN10/TMS 23 -1300 500 100 R 40 40 1 1 B X RB11/AN11/TDO 24 -1300 400 100 R 40 40 1 1 B X RB12/AN12/TCK 27 -1300 300 100 R 40 40 1 1 B X RB13/AN13/TDI 28 -1300 200 100 R 40 40 1 1 B X RB14/AN14/U2RTS 29 -1300 100 100 R 40 40 1 1 B X RB15/AN15/CN12/OCFB 30 -1300 0 100 R 40 40 1 1 B X RC12/CLKI/OSC1 39 1300 1200 100 L 40 40 1 1 B X RC15/CLKO/OSC2 40 1300 1100 100 L 40 40 1 1 B X RD0/OC1 46 -1300 -200 100 R 40 40 1 1 B X RD1/OC2 49 -1300 -300 100 R 40 40 1 1 B X RD2/OC3 50 -1300 -400 100 R 40 40 1 1 B X RD3/OC4 51 -1300 -500 100 R 40 40 1 1 B X RD4/OC5/IC5/CN13 52 -1300 -600 100 R 40 40 1 1 B X RD5/OC6/IC6/CN14 53 -1300 -700 100 R 40 40 1 1 B X RD6/OC7/CN15 54 -1300 -800 100 R 40 40 1 1 B X RD7/OC8/CN16 55 -1300 -900 100 R 40 40 1 1 B X RD8/IC1/INT1 42 -1300 -1000 100 R 40 40 1 1 B X RD9/IC2/INT2/U1CTS 43 -1300 -1100 100 R 40 40 1 1 B X RD10/IC3/INT3 44 -1300 -1200 100 R 40 40 1 1 B X RD11/IC4/INT4 45 -1300 -1300 100 R 40 40 1 1 B X RF0 58 1300 400 100 L 40 40 1 1 B X RF1 59 1300 300 100 L 40 40 1 1 B X RG0 61 1300 -400 100 L 40 40 1 1 B X RG1 60 1300 -500 100 L 40 40 1 1 B X SCL1/RG2 37 1300 -600 100 L 40 40 1 1 B X SCL2/CN18/U2TX/RF5 32 1300 -100 100 L 40 40 1 1 B X SDA1/RG3 36 1300 -700 100 L 40 40 1 1 B X SDA2/CN17/U2RX/RF4 31 1300 0 100 L 40 40 1 1 B X SDI1/U1RX/RF2 34 1300 200 100 L 40 40 1 1 B X SDO1/U1TX/RF3 33 1300 100 100 L 40 40 1 1 B X T5CK/CN11/SS2/RG9 8 1300 -1100 100 L 40 40 1 1 B X VDD 10 500 1700 100 D 40 40 1 1 W X VDD@1 26 600 1700 100 D 40 40 1 1 W X VDD@2 38 700 1700 100 D 40 40 1 1 W X VDD@3 57 800 1700 100 D 40 40 1 1 W X VDDC 56 400 1700 100 D 40 40 1 1 W X VSS 9 -100 -1700 100 U 40 40 1 1 W X VSS@1 25 0 -1700 100 U 40 40 1 1 W X VSS@2 41 100 -1700 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC33FJ64GP706/PT # Package Name: TQFP64-10X10 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC33FJ64GP706/PT IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC33FJXXGP706 F0 "IC" -1200 1700 50 H V L B F1 "DSPIC33FJ64GP706/PT" 400 -1800 50 H V L B F2 "microchip-dspic-TQFP64-10X10" 0 150 50 H I C C DRAW P 2 1 0 0 -1200 1600 1200 1600 P 2 1 0 0 1200 1600 1200 -1600 P 2 1 0 0 1200 -1600 -1200 -1600 P 2 1 0 0 -1200 -1600 -1200 1600 T 0 655 1485 70 0 1 0 VDD T 0 5 -1515 70 0 1 0 VSS X AN16/T2CK/T7CK/RC1 2 1300 900 100 L 40 40 1 1 B X AN17/T3CK/T6CK/RC2 3 1300 800 100 L 40 40 1 1 B X AVDD 19 300 1700 100 D 40 40 1 1 W X AVSS 20 -300 -1700 100 U 40 40 1 1 W X C1RX/RF0 58 1300 400 100 L 40 40 1 1 B X C1TX/RF1 59 1300 300 100 L 40 40 1 1 B X C2RX/RG0 61 1300 -400 100 L 40 40 1 1 B X C2TX/RG1 60 1300 -500 100 L 40 40 1 1 B X CN8/SCK2/RG6 4 1300 -800 100 L 40 40 1 1 B X CN9/SDI2/RG7 5 1300 -900 100 L 40 40 1 1 B X CN10/SDO2/RG8 6 1300 -1000 100 L 40 40 1 1 B X COFS/RG15 1 1300 -1500 100 L 40 40 1 1 B X CSCK/RG14 62 1300 -1400 100 L 40 40 1 1 B X CSDI/RG12 63 1300 -1200 100 L 40 40 1 1 B X CSDO/RG13 64 1300 -1300 100 L 40 40 1 1 B X INT0/U1RTS/SCK1/RF6 35 1300 -200 100 L 40 40 1 1 B X MCLR 7 1300 1400 100 L 40 40 1 1 I X PGC2/SOSCO/T1CK/EMUC2/CN0/RC14 48 1300 600 100 L 40 40 1 1 B X PGD2/SOSCI/T4CK/EMUD2/CN1/RC13 47 1300 700 100 L 40 40 1 1 B X RB0/AN0/CN2/VR+/PGD3/EMUD3 16 -1300 1500 100 R 40 40 1 1 B X RB1/AN1/CN3/VR-/PGC3/EMUC3 15 -1300 1400 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 14 -1300 1300 100 R 40 40 1 1 B X RB3/AN3/CN5 13 -1300 1200 100 R 40 40 1 1 B X RB4/AN4/CN6/IC7 12 -1300 1100 100 R 40 40 1 1 B X RB5/AN5/CN7/IC8 11 -1300 1000 100 R 40 40 1 1 B X RB6/AN6/OCFA/EMUC1/PGC1 17 -1300 900 100 R 40 40 1 1 B X RB7/AN7/EMUD1/PGD1 18 -1300 800 100 R 40 40 1 1 B X RB8/AN8/U2CTS 21 -1300 700 100 R 40 40 1 1 B X RB9/AN9 22 -1300 600 100 R 40 40 1 1 B X RB10/AN10/TMS 23 -1300 500 100 R 40 40 1 1 B X RB11/AN11/TDO 24 -1300 400 100 R 40 40 1 1 B X RB12/AN12/TCK 27 -1300 300 100 R 40 40 1 1 B X RB13/AN13/TDI 28 -1300 200 100 R 40 40 1 1 B X RB14/AN14/U2RTS 29 -1300 100 100 R 40 40 1 1 B X RB15/AN15/CN12/OCFB 30 -1300 0 100 R 40 40 1 1 B X RC12/CLKI/OSC1 39 1300 1200 100 L 40 40 1 1 B X RC15/CLKO/OSC2 40 1300 1100 100 L 40 40 1 1 B X RD0/OC1 46 -1300 -200 100 R 40 40 1 1 B X RD1/OC2 49 -1300 -300 100 R 40 40 1 1 B X RD2/OC3 50 -1300 -400 100 R 40 40 1 1 B X RD3/OC4 51 -1300 -500 100 R 40 40 1 1 B X RD4/OC5/IC5/CN13 52 -1300 -600 100 R 40 40 1 1 B X RD5/OC6/IC6/CN14 53 -1300 -700 100 R 40 40 1 1 B X RD6/OC7/CN15 54 -1300 -800 100 R 40 40 1 1 B X RD7/OC8/CN16 55 -1300 -900 100 R 40 40 1 1 B X RD8/IC1/INT1 42 -1300 -1000 100 R 40 40 1 1 B X RD9/IC2/INT2/U1CTS 43 -1300 -1100 100 R 40 40 1 1 B X RD10/IC3/INT3 44 -1300 -1200 100 R 40 40 1 1 B X RD11/IC4/INT4 45 -1300 -1300 100 R 40 40 1 1 B X SCL1/RG2 37 1300 -600 100 L 40 40 1 1 B X SCL2/CN18/U2TX/RF5 32 1300 -100 100 L 40 40 1 1 B X SDA1/RG3 36 1300 -700 100 L 40 40 1 1 B X SDA2/CN17/U2RX/RF4 31 1300 0 100 L 40 40 1 1 B X SDI1/U1RX/RF2 34 1300 200 100 L 40 40 1 1 B X SDO1/U1TX/RF3 33 1300 100 100 L 40 40 1 1 B X T5CK/CN11/SS2/RG9 8 1300 -1100 100 L 40 40 1 1 B X VDD 10 500 1700 100 D 40 40 1 1 W X VDD@1 26 600 1700 100 D 40 40 1 1 W X VDD@2 38 700 1700 100 D 40 40 1 1 W X VDD@3 57 800 1700 100 D 40 40 1 1 W X VDDC 56 400 1700 100 D 40 40 1 1 W X VSS 9 -100 -1700 100 U 40 40 1 1 W X VSS@1 25 0 -1700 100 U 40 40 1 1 W X VSS@2 41 100 -1700 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC33FJ64GP708/PT # Package Name: TQFP80-12X12 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC33FJ64GP708/PT IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC33FJXXGP708 F0 "IC" -1100 2100 50 H V L B F1 "DSPIC33FJ64GP708/PT" 500 -2200 50 H V L B F2 "microchip-dspic-TQFP80-12X12" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 2000 1100 2000 P 2 1 0 0 1100 2000 1100 -2000 P 2 1 0 0 1100 -2000 -1100 -2000 P 2 1 0 0 -1100 -2000 -1100 2000 X AVDD 25 400 2100 100 D 40 40 1 1 W X AVSS 26 200 -2100 100 U 40 40 1 1 W X C1RX/RF0 72 1200 200 100 L 40 40 1 1 B X C1TX/RF1 73 1200 100 100 L 40 40 1 1 B X C2RX/RG0 75 1200 -800 100 L 40 40 1 1 B X C2TX/RG1 74 1200 -900 100 L 40 40 1 1 B X CN8/SCK2/RG6 6 1200 -1200 100 L 40 40 1 1 B X CN9/SDI2/RG7 7 1200 -1300 100 L 40 40 1 1 B X CN10/SDO2/RG8 8 1200 -1400 100 L 40 40 1 1 B X CN11/SS2/RG9 10 1200 -1500 100 L 40 40 1 1 B X CN13/OC5/RD4 66 1200 1500 100 L 40 40 1 1 B X CN14/OC6/RD5 67 1200 1400 100 L 40 40 1 1 B X CN15/OC7/RD6 68 1200 1300 100 L 40 40 1 1 B X CN16/OC8/RD7 69 1200 1200 100 L 40 40 1 1 B X CN17/U2RX/RF4 39 1200 -200 100 L 40 40 1 1 B X CN18/U2TX/RF5 40 1200 -300 100 L 40 40 1 1 B X CN19/IC6/RD13 65 1200 600 100 L 40 40 1 1 B X COFS/RG15 1 1200 -1900 100 L 40 40 1 1 B X CSCK/RG14 78 1200 -1800 100 L 40 40 1 1 B X CSDI/RG12 79 1200 -1600 100 L 40 40 1 1 B X CSDO/RG13 80 1200 -1700 100 L 40 40 1 1 B X IC1/RD8 54 1200 1100 100 L 40 40 1 1 B X IC2/RD9 55 1200 1000 100 L 40 40 1 1 B X IC3/RD10 56 1200 900 100 L 40 40 1 1 B X IC4/RD11 57 1200 800 100 L 40 40 1 1 B X IC5/RD12 64 1200 700 100 L 40 40 1 1 B X MCLR 9 -1200 -1800 100 R 40 40 1 1 I X OC1/RD0 58 1200 1900 100 L 40 40 1 1 B X OC2/RD1 61 1200 1800 100 L 40 40 1 1 B X OC3/RD2 62 1200 1700 100 L 40 40 1 1 B X OC4/RD3 63 1200 1600 100 L 40 40 1 1 B X OSC1/CLKI/RC12 49 -1200 -1600 100 R 40 40 1 1 B X OSC2/CLKO/RC15 50 -1200 -1500 100 R 40 40 1 1 B X RA6/AN22/CN22 76 -1200 1900 100 R 40 40 1 1 B X RA7/AN23/CN23 77 -1200 1800 100 R 40 40 1 1 B X RA9/VR- 23 -1200 1700 100 R 40 40 1 1 B X RA10/VR+ 24 -1200 1600 100 R 40 40 1 1 B X RA14/INT3/SCL2 52 -1200 1500 100 R 40 40 1 1 B X RA15/INT4/SDA2 53 -1200 1400 100 R 40 40 1 1 B X RB0/AN0/CN2/EMUD3/PGD3 20 -1200 1200 100 R 40 40 1 1 B X RB1/AN1/CN3/EMUC3/PGC3 19 -1200 1100 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 18 -1200 1000 100 R 40 40 1 1 B X RB3/AN3/CN5 17 -1200 900 100 R 40 40 1 1 B X RB4/AN4/CN6 16 -1200 800 100 R 40 40 1 1 B X RB5/AN5/CN7 15 -1200 700 100 R 40 40 1 1 B X RB6/AN6/EMUC1/PGC1/OCFA 21 -1200 600 100 R 40 40 1 1 B X RB7/AN7/EMUD1/PGD1 22 -1200 500 100 R 40 40 1 1 B X RB8/AN8/U2CTS 27 -1200 400 100 R 40 40 1 1 B X RB9/AN9 28 -1200 300 100 R 40 40 1 1 B X RB10/AN10 29 -1200 200 100 R 40 40 1 1 B X RB11/AN11 30 -1200 100 100 R 40 40 1 1 B X RB12/AN12/TCK 33 -1200 0 100 R 40 40 1 1 B X RB13/AN13/TDI 34 -1200 -100 100 R 40 40 1 1 B X RB14/AN14/U2RTS 35 -1200 -200 100 R 40 40 1 1 B X RB15/AN15/CN12/OCFB 36 -1200 -300 100 R 40 40 1 1 B X RC1/AN16/T2CK/T7CK 2 -1200 -500 100 R 40 40 1 1 B X RC2/AN17/T3CK/T6CK 3 -1200 -600 100 R 40 40 1 1 B X RC3/AN18/T4CK/T9CK 4 -1200 -700 100 R 40 40 1 1 B X RC4/AN19/T5CK/T8CK 5 -1200 -800 100 R 40 40 1 1 B X RC13/CN1/EMUD2/SOSCI 59 -1200 -900 100 R 40 40 1 1 B X RC14/CN0/EMUC2/SOSCO/T1CK 60 -1200 -1000 100 R 40 40 1 1 B X RE8/AN20/INT1/TMS 13 -1200 -1200 100 R 40 40 1 1 B X RE9/AN21/INT2/TDO 14 -1200 -1300 100 R 40 40 1 1 B X SCK1/INT0/RF6 45 1200 -400 100 L 40 40 1 1 B X SCL1/RG2 47 1200 -1000 100 L 40 40 1 1 B X SDA1/RG3 46 1200 -1100 100 L 40 40 1 1 B X SDI1/RF7 44 1200 -500 100 L 40 40 1 1 B X SDO1/RF8 43 1200 -600 100 L 40 40 1 1 B X U1CTS/CN20/IC7/RD14 37 1200 500 100 L 40 40 1 1 B X U1RTS/CN21/IC8/RD15 38 1200 400 100 L 40 40 1 1 B X U1RX/RF2 42 1200 0 100 L 40 40 1 1 B X U1TX/RF3 41 1200 -100 100 L 40 40 1 1 B X VDD 12 -200 2100 100 D 40 40 1 1 W X VDD@1 32 -100 2100 100 D 40 40 1 1 W X VDD@2 48 0 2100 100 D 40 40 1 1 W X VDD@3 71 100 2100 100 D 40 40 1 1 W X VDDCORE 70 200 2100 100 D 40 40 1 1 W X VSS 11 -200 -2100 100 U 40 40 1 1 W X VSS@1 31 -100 -2100 100 U 40 40 1 1 W X VSS@2 51 0 -2100 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC33FJ64MC506/PT # Package Name: TQFP64-10X10 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC33FJ64MC506/PT IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC33FJXXMC506 F0 "IC" -1200 1700 50 H V L B F1 "DSPIC33FJ64MC506/PT" 400 -1800 50 H V L B F2 "microchip-dspic-TQFP64-10X10" 0 150 50 H I C C DRAW P 2 1 0 0 -1200 1600 1200 1600 P 2 1 0 0 1200 1600 1200 -1600 P 2 1 0 0 1200 -1600 -1200 -1600 P 2 1 0 0 -1200 -1600 -1200 1600 T 0 655 1485 70 0 1 0 VDD T 0 5 -1515 70 0 1 0 VSS X AVDD 19 300 1700 100 D 40 40 1 1 W X AVSS 20 -300 -1700 100 U 40 40 1 1 W X C1RX/RF0 58 1300 400 100 L 40 40 1 1 B X C1TX/RF1 59 1300 300 100 L 40 40 1 1 B X CN8/SCK2/RG6 4 1300 -1200 100 L 40 40 1 1 B X CN9/SDI2/RG7 5 1300 -1300 100 L 40 40 1 1 B X CN10/SDO2/RG8 6 1300 -1400 100 L 40 40 1 1 B X CN17/U2RX/RF4 31 1300 0 100 L 40 40 1 1 B X CN18/U2TX/RF5 32 1300 -100 100 L 40 40 1 1 B X INT0/U1RTS/SCK1/RF6 35 1300 -200 100 L 40 40 1 1 B X MCLR 7 1300 1500 100 L 40 40 1 1 I X PGC2/SOSCO/T1CK/EMUC2/CN0/RC14 48 1300 -500 100 L 40 40 1 1 B X PGD2/SOSCI/T4CK/EMUD2/CN1/RC13 47 1300 -400 100 L 40 40 1 1 B X PWM1H/RE1 61 1300 1200 100 L 40 40 1 1 B X PWM1L/RE0 60 1300 1300 100 L 40 40 1 1 B X PWM2H/RE3 63 1300 1000 100 L 40 40 1 1 B X PWM2L/RE2 62 1300 1100 100 L 40 40 1 1 B X PWM3H/RE5 1 1300 800 100 L 40 40 1 1 B X PWM3L/RE4 64 1300 900 100 L 40 40 1 1 B X PWM4H/RE7 3 1300 600 100 L 40 40 1 1 B X PWM4L/RE6 2 1300 700 100 L 40 40 1 1 B X RB0/AN0/CN2/VR+/PGD3/EMUD3 16 -1300 1500 100 R 40 40 1 1 B X RB1/AN1/CN3/VR-/PGC3/EMUC3 15 -1300 1400 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 14 -1300 1300 100 R 40 40 1 1 B X RB3/AN3/CN5/INDX 13 -1300 1200 100 R 40 40 1 1 B X RB4/AN4/CN6/QEA/IC7 12 -1300 1100 100 R 40 40 1 1 B X RB5/AN5/CN7/QEB/IC8 11 -1300 1000 100 R 40 40 1 1 B X RB6/AN6/OCFA/EMUC1/PGC1 17 -1300 900 100 R 40 40 1 1 B X RB7/AN7/EMUD1/PGD1 18 -1300 800 100 R 40 40 1 1 B X RB8/AN8/U2CTS 21 -1300 700 100 R 40 40 1 1 B X RB9/AN9 22 -1300 600 100 R 40 40 1 1 B X RB10/AN10/TMS 23 -1300 500 100 R 40 40 1 1 B X RB11/AN11/TDO 24 -1300 400 100 R 40 40 1 1 B X RB12/AN12/TCK 27 -1300 300 100 R 40 40 1 1 B X RB13/AN13/TDI 28 -1300 200 100 R 40 40 1 1 B X RB14/AN14/U2RTS 29 -1300 100 100 R 40 40 1 1 B X RB15/AN15/CN12/OCFB 30 -1300 0 100 R 40 40 1 1 B X RC12/CLKI/OSC1 39 1300 -700 100 L 40 40 1 1 B X RC15/CLKO/OSC2 40 1300 -800 100 L 40 40 1 1 B X RD0/OC1 46 -1300 -200 100 R 40 40 1 1 B X RD1/OC2 49 -1300 -300 100 R 40 40 1 1 B X RD2/OC3 50 -1300 -400 100 R 40 40 1 1 B X RD3/OC4 51 -1300 -500 100 R 40 40 1 1 B X RD4/OC5/IC5/CN13 52 -1300 -600 100 R 40 40 1 1 B X RD5/OC6/IC6/CN14 53 -1300 -700 100 R 40 40 1 1 B X RD6/OC7/CN15 54 -1300 -800 100 R 40 40 1 1 B X RD7/OC8/CN16/UPDN 55 -1300 -900 100 R 40 40 1 1 B X RD8/IC1/INT1/FLTA 42 -1300 -1000 100 R 40 40 1 1 B X RD9/IC2/INT2/FLTB/U1CTS 43 -1300 -1100 100 R 40 40 1 1 B X RD10/IC3/INT3 44 -1300 -1200 100 R 40 40 1 1 B X RD11/IC4/INT4 45 -1300 -1300 100 R 40 40 1 1 B X SCL1/RG2 37 1300 -1000 100 L 40 40 1 1 B X SDA1/RG3 36 1300 -1100 100 L 40 40 1 1 B X SDI1/U1RX/RF2 34 1300 200 100 L 40 40 1 1 B X SDO1/U1TX/RF3 33 1300 100 100 L 40 40 1 1 B X T5CK/CN11/SS2/RG9 8 1300 -1500 100 L 40 40 1 1 B X VDD 10 500 1700 100 D 40 40 1 1 W X VDD@1 26 600 1700 100 D 40 40 1 1 W X VDD@2 38 700 1700 100 D 40 40 1 1 W X VDD@3 57 800 1700 100 D 40 40 1 1 W X VDDC 56 400 1700 100 D 40 40 1 1 W X VSS 9 -100 -1700 100 U 40 40 1 1 W X VSS@1 25 0 -1700 100 U 40 40 1 1 W X VSS@2 41 100 -1700 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC33FJ128GP206/PT # Package Name: TQFP64-10X10 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC33FJ128GP206/PT IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC33FJXXGP206 F0 "IC" -1200 1700 50 H V L B F1 "DSPIC33FJ128GP206/PT" 400 -1800 50 H V L B F2 "microchip-dspic-TQFP64-10X10" 0 150 50 H I C C DRAW P 2 1 0 0 -1200 1600 1200 1600 P 2 1 0 0 1200 1600 1200 -1600 P 2 1 0 0 1200 -1600 -1200 -1600 P 2 1 0 0 -1200 -1600 -1200 1600 T 0 655 1485 70 0 1 0 VDD T 0 5 -1515 70 0 1 0 VSS X AN16/T2CK/T7CK/RC1 2 1300 900 100 L 40 40 1 1 B X AN17/T3CK/T6CK/RC2 3 1300 800 100 L 40 40 1 1 B X AVDD 19 300 1700 100 D 40 40 1 1 W X AVSS 20 -300 -1700 100 U 40 40 1 1 W X CN8/SCK2/RG6 4 1300 -800 100 L 40 40 1 1 B X CN9/SDI2/RG7 5 1300 -900 100 L 40 40 1 1 B X CN10/SDO2/RG8 6 1300 -1000 100 L 40 40 1 1 B X CN17/U2RX/RF4 31 1300 0 100 L 40 40 1 1 B X CN18/U2TX/RF5 32 1300 -100 100 L 40 40 1 1 B X COFS/RG15 1 1300 -1500 100 L 40 40 1 1 B X CSCK/RG14 62 1300 -1400 100 L 40 40 1 1 B X CSDI/RG12 63 1300 -1200 100 L 40 40 1 1 B X CSDO/RG13 64 1300 -1300 100 L 40 40 1 1 B X INT0/U1RTS/SCK1/RF6 35 1300 -200 100 L 40 40 1 1 B X MCLR 7 1300 1400 100 L 40 40 1 1 I X PGC2/SOSCO/T1CK/EMUC2/CN0/RC14 48 1300 600 100 L 40 40 1 1 B X PGD2/SOSCI/T4CK/EMUD2/CN1/RC13 47 1300 700 100 L 40 40 1 1 B X RB0/AN0/CN2/VR+/PGD3/EMUD3 16 -1300 1500 100 R 40 40 1 1 B X RB1/AN1/CN3/VR-/PGC3/EMUC3 15 -1300 1400 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 14 -1300 1300 100 R 40 40 1 1 B X RB3/AN3/CN5 13 -1300 1200 100 R 40 40 1 1 B X RB4/AN4/CN6/IC7 12 -1300 1100 100 R 40 40 1 1 B X RB5/AN5/CN7/IC8 11 -1300 1000 100 R 40 40 1 1 B X RB6/AN6/OCFA/EMUC1/PGC1 17 -1300 900 100 R 40 40 1 1 B X RB7/AN7/EMUD1/PGD1 18 -1300 800 100 R 40 40 1 1 B X RB8/AN8/U2CTS 21 -1300 700 100 R 40 40 1 1 B X RB9/AN9 22 -1300 600 100 R 40 40 1 1 B X RB10/AN10/TMS 23 -1300 500 100 R 40 40 1 1 B X RB11/AN11/TDO 24 -1300 400 100 R 40 40 1 1 B X RB12/AN12/TCK 27 -1300 300 100 R 40 40 1 1 B X RB13/AN13/TDI 28 -1300 200 100 R 40 40 1 1 B X RB14/AN14/U2RTS 29 -1300 100 100 R 40 40 1 1 B X RB15/AN15/CN12/OCFB 30 -1300 0 100 R 40 40 1 1 B X RC12/CLKI/OSC1 39 1300 1200 100 L 40 40 1 1 B X RC15/CLKO/OSC2 40 1300 1100 100 L 40 40 1 1 B X RD0/OC1 46 -1300 -200 100 R 40 40 1 1 B X RD1/OC2 49 -1300 -300 100 R 40 40 1 1 B X RD2/OC3 50 -1300 -400 100 R 40 40 1 1 B X RD3/OC4 51 -1300 -500 100 R 40 40 1 1 B X RD4/OC5/IC5/CN13 52 -1300 -600 100 R 40 40 1 1 B X RD5/OC6/IC6/CN14 53 -1300 -700 100 R 40 40 1 1 B X RD6/OC7/CN15 54 -1300 -800 100 R 40 40 1 1 B X RD7/OC8/CN16 55 -1300 -900 100 R 40 40 1 1 B X RD8/IC1/INT1 42 -1300 -1000 100 R 40 40 1 1 B X RD9/IC2/INT2/U1CTS 43 -1300 -1100 100 R 40 40 1 1 B X RD10/IC3/INT3 44 -1300 -1200 100 R 40 40 1 1 B X RD11/IC4/INT4 45 -1300 -1300 100 R 40 40 1 1 B X RF0 58 1300 400 100 L 40 40 1 1 B X RF1 59 1300 300 100 L 40 40 1 1 B X RG0 61 1300 -400 100 L 40 40 1 1 B X RG1 60 1300 -500 100 L 40 40 1 1 B X SCL1/RG2 37 1300 -600 100 L 40 40 1 1 B X SDA1/RG3 36 1300 -700 100 L 40 40 1 1 B X SDI1/U1RX/RF2 34 1300 200 100 L 40 40 1 1 B X SDO1/U1TX/RF3 33 1300 100 100 L 40 40 1 1 B X T5CK/CN11/SS2/RG9 8 1300 -1100 100 L 40 40 1 1 B X VDD 10 500 1700 100 D 40 40 1 1 W X VDD@1 26 600 1700 100 D 40 40 1 1 W X VDD@2 38 700 1700 100 D 40 40 1 1 W X VDD@3 57 800 1700 100 D 40 40 1 1 W X VDDC 56 400 1700 100 D 40 40 1 1 W X VSS 9 -100 -1700 100 U 40 40 1 1 W X VSS@1 25 0 -1700 100 U 40 40 1 1 W X VSS@2 41 100 -1700 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC33FJ128GP306/PT # Package Name: TQFP64-10X10 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC33FJ128GP306/PT IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC33FJXXGP306 F0 "IC" -1200 1700 50 H V L B F1 "DSPIC33FJ128GP306/PT" 400 -1800 50 H V L B F2 "microchip-dspic-TQFP64-10X10" 0 150 50 H I C C DRAW P 2 1 0 0 -1200 1600 1200 1600 P 2 1 0 0 1200 1600 1200 -1600 P 2 1 0 0 1200 -1600 -1200 -1600 P 2 1 0 0 -1200 -1600 -1200 1600 T 0 655 1485 70 0 1 0 VDD T 0 5 -1515 70 0 1 0 VSS X AN16/T2CK/T7CK/RC1 2 1300 900 100 L 40 40 1 1 B X AN17/T3CK/T6CK/RC2 3 1300 800 100 L 40 40 1 1 B X AVDD 19 300 1700 100 D 40 40 1 1 W X AVSS 20 -300 -1700 100 U 40 40 1 1 W X CN8/SCK2/RG6 4 1300 -800 100 L 40 40 1 1 B X CN9/SDI2/RG7 5 1300 -900 100 L 40 40 1 1 B X CN10/SDO2/RG8 6 1300 -1000 100 L 40 40 1 1 B X COFS/RG15 1 1300 -1500 100 L 40 40 1 1 B X CSCK/RG14 62 1300 -1400 100 L 40 40 1 1 B X CSDI/RG12 63 1300 -1200 100 L 40 40 1 1 B X CSDO/RG13 64 1300 -1300 100 L 40 40 1 1 B X INT0/U1RTS/SCK1/RF6 35 1300 -200 100 L 40 40 1 1 B X MCLR 7 1300 1400 100 L 40 40 1 1 I X PGC2/SOSCO/T1CK/EMUC2/CN0/RC14 48 1300 600 100 L 40 40 1 1 B X PGD2/SOSCI/T4CK/EMUD2/CN1/RC13 47 1300 700 100 L 40 40 1 1 B X RB0/AN0/CN2/VR+/PGD3/EMUD3 16 -1300 1500 100 R 40 40 1 1 B X RB1/AN1/CN3/VR-/PGC3/EMUC3 15 -1300 1400 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 14 -1300 1300 100 R 40 40 1 1 B X RB3/AN3/CN5 13 -1300 1200 100 R 40 40 1 1 B X RB4/AN4/CN6/IC7 12 -1300 1100 100 R 40 40 1 1 B X RB5/AN5/CN7/IC8 11 -1300 1000 100 R 40 40 1 1 B X RB6/AN6/OCFA/EMUC1/PGC1 17 -1300 900 100 R 40 40 1 1 B X RB7/AN7/EMUD1/PGD1 18 -1300 800 100 R 40 40 1 1 B X RB8/AN8/U2CTS 21 -1300 700 100 R 40 40 1 1 B X RB9/AN9 22 -1300 600 100 R 40 40 1 1 B X RB10/AN10/TMS 23 -1300 500 100 R 40 40 1 1 B X RB11/AN11/TDO 24 -1300 400 100 R 40 40 1 1 B X RB12/AN12/TCK 27 -1300 300 100 R 40 40 1 1 B X RB13/AN13/TDI 28 -1300 200 100 R 40 40 1 1 B X RB14/AN14/U2RTS 29 -1300 100 100 R 40 40 1 1 B X RB15/AN15/CN12/OCFB 30 -1300 0 100 R 40 40 1 1 B X RC12/CLKI/OSC1 39 1300 1200 100 L 40 40 1 1 B X RC15/CLKO/OSC2 40 1300 1100 100 L 40 40 1 1 B X RD0/OC1 46 -1300 -200 100 R 40 40 1 1 B X RD1/OC2 49 -1300 -300 100 R 40 40 1 1 B X RD2/OC3 50 -1300 -400 100 R 40 40 1 1 B X RD3/OC4 51 -1300 -500 100 R 40 40 1 1 B X RD4/OC5/IC5/CN13 52 -1300 -600 100 R 40 40 1 1 B X RD5/OC6/IC6/CN14 53 -1300 -700 100 R 40 40 1 1 B X RD6/OC7/CN15 54 -1300 -800 100 R 40 40 1 1 B X RD7/OC8/CN16 55 -1300 -900 100 R 40 40 1 1 B X RD8/IC1/INT1 42 -1300 -1000 100 R 40 40 1 1 B X RD9/IC2/INT2/U1CTS 43 -1300 -1100 100 R 40 40 1 1 B X RD10/IC3/INT3 44 -1300 -1200 100 R 40 40 1 1 B X RD11/IC4/INT4 45 -1300 -1300 100 R 40 40 1 1 B X RF0 58 1300 400 100 L 40 40 1 1 B X RF1 59 1300 300 100 L 40 40 1 1 B X RG0 61 1300 -400 100 L 40 40 1 1 B X RG1 60 1300 -500 100 L 40 40 1 1 B X SCL1/RG2 37 1300 -600 100 L 40 40 1 1 B X SCL2/CN18/U2TX/RF5 32 1300 -100 100 L 40 40 1 1 B X SDA1/RG3 36 1300 -700 100 L 40 40 1 1 B X SDA2/CN17/U2RX/RF4 31 1300 0 100 L 40 40 1 1 B X SDI1/U1RX/RF2 34 1300 200 100 L 40 40 1 1 B X SDO1/U1TX/RF3 33 1300 100 100 L 40 40 1 1 B X T5CK/CN11/SS2/RG9 8 1300 -1100 100 L 40 40 1 1 B X VDD 10 500 1700 100 D 40 40 1 1 W X VDD@1 26 600 1700 100 D 40 40 1 1 W X VDD@2 38 700 1700 100 D 40 40 1 1 W X VDD@3 57 800 1700 100 D 40 40 1 1 W X VDDC 56 400 1700 100 D 40 40 1 1 W X VSS 9 -100 -1700 100 U 40 40 1 1 W X VSS@1 25 0 -1700 100 U 40 40 1 1 W X VSS@2 41 100 -1700 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC33FJ128GP706/PT # Package Name: TQFP64-10X10 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC33FJ128GP706/PT IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC33FJXXGP706 F0 "IC" -1200 1700 50 H V L B F1 "DSPIC33FJ128GP706/PT" 400 -1800 50 H V L B F2 "microchip-dspic-TQFP64-10X10" 0 150 50 H I C C DRAW P 2 1 0 0 -1200 1600 1200 1600 P 2 1 0 0 1200 1600 1200 -1600 P 2 1 0 0 1200 -1600 -1200 -1600 P 2 1 0 0 -1200 -1600 -1200 1600 T 0 655 1485 70 0 1 0 VDD T 0 5 -1515 70 0 1 0 VSS X AN16/T2CK/T7CK/RC1 2 1300 900 100 L 40 40 1 1 B X AN17/T3CK/T6CK/RC2 3 1300 800 100 L 40 40 1 1 B X AVDD 19 300 1700 100 D 40 40 1 1 W X AVSS 20 -300 -1700 100 U 40 40 1 1 W X C1RX/RF0 58 1300 400 100 L 40 40 1 1 B X C1TX/RF1 59 1300 300 100 L 40 40 1 1 B X C2RX/RG0 61 1300 -400 100 L 40 40 1 1 B X C2TX/RG1 60 1300 -500 100 L 40 40 1 1 B X CN8/SCK2/RG6 4 1300 -800 100 L 40 40 1 1 B X CN9/SDI2/RG7 5 1300 -900 100 L 40 40 1 1 B X CN10/SDO2/RG8 6 1300 -1000 100 L 40 40 1 1 B X COFS/RG15 1 1300 -1500 100 L 40 40 1 1 B X CSCK/RG14 62 1300 -1400 100 L 40 40 1 1 B X CSDI/RG12 63 1300 -1200 100 L 40 40 1 1 B X CSDO/RG13 64 1300 -1300 100 L 40 40 1 1 B X INT0/U1RTS/SCK1/RF6 35 1300 -200 100 L 40 40 1 1 B X MCLR 7 1300 1400 100 L 40 40 1 1 I X PGC2/SOSCO/T1CK/EMUC2/CN0/RC14 48 1300 600 100 L 40 40 1 1 B X PGD2/SOSCI/T4CK/EMUD2/CN1/RC13 47 1300 700 100 L 40 40 1 1 B X RB0/AN0/CN2/VR+/PGD3/EMUD3 16 -1300 1500 100 R 40 40 1 1 B X RB1/AN1/CN3/VR-/PGC3/EMUC3 15 -1300 1400 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 14 -1300 1300 100 R 40 40 1 1 B X RB3/AN3/CN5 13 -1300 1200 100 R 40 40 1 1 B X RB4/AN4/CN6/IC7 12 -1300 1100 100 R 40 40 1 1 B X RB5/AN5/CN7/IC8 11 -1300 1000 100 R 40 40 1 1 B X RB6/AN6/OCFA/EMUC1/PGC1 17 -1300 900 100 R 40 40 1 1 B X RB7/AN7/EMUD1/PGD1 18 -1300 800 100 R 40 40 1 1 B X RB8/AN8/U2CTS 21 -1300 700 100 R 40 40 1 1 B X RB9/AN9 22 -1300 600 100 R 40 40 1 1 B X RB10/AN10/TMS 23 -1300 500 100 R 40 40 1 1 B X RB11/AN11/TDO 24 -1300 400 100 R 40 40 1 1 B X RB12/AN12/TCK 27 -1300 300 100 R 40 40 1 1 B X RB13/AN13/TDI 28 -1300 200 100 R 40 40 1 1 B X RB14/AN14/U2RTS 29 -1300 100 100 R 40 40 1 1 B X RB15/AN15/CN12/OCFB 30 -1300 0 100 R 40 40 1 1 B X RC12/CLKI/OSC1 39 1300 1200 100 L 40 40 1 1 B X RC15/CLKO/OSC2 40 1300 1100 100 L 40 40 1 1 B X RD0/OC1 46 -1300 -200 100 R 40 40 1 1 B X RD1/OC2 49 -1300 -300 100 R 40 40 1 1 B X RD2/OC3 50 -1300 -400 100 R 40 40 1 1 B X RD3/OC4 51 -1300 -500 100 R 40 40 1 1 B X RD4/OC5/IC5/CN13 52 -1300 -600 100 R 40 40 1 1 B X RD5/OC6/IC6/CN14 53 -1300 -700 100 R 40 40 1 1 B X RD6/OC7/CN15 54 -1300 -800 100 R 40 40 1 1 B X RD7/OC8/CN16 55 -1300 -900 100 R 40 40 1 1 B X RD8/IC1/INT1 42 -1300 -1000 100 R 40 40 1 1 B X RD9/IC2/INT2/U1CTS 43 -1300 -1100 100 R 40 40 1 1 B X RD10/IC3/INT3 44 -1300 -1200 100 R 40 40 1 1 B X RD11/IC4/INT4 45 -1300 -1300 100 R 40 40 1 1 B X SCL1/RG2 37 1300 -600 100 L 40 40 1 1 B X SCL2/CN18/U2TX/RF5 32 1300 -100 100 L 40 40 1 1 B X SDA1/RG3 36 1300 -700 100 L 40 40 1 1 B X SDA2/CN17/U2RX/RF4 31 1300 0 100 L 40 40 1 1 B X SDI1/U1RX/RF2 34 1300 200 100 L 40 40 1 1 B X SDO1/U1TX/RF3 33 1300 100 100 L 40 40 1 1 B X T5CK/CN11/SS2/RG9 8 1300 -1100 100 L 40 40 1 1 B X VDD 10 500 1700 100 D 40 40 1 1 W X VDD@1 26 600 1700 100 D 40 40 1 1 W X VDD@2 38 700 1700 100 D 40 40 1 1 W X VDD@3 57 800 1700 100 D 40 40 1 1 W X VDDC 56 400 1700 100 D 40 40 1 1 W X VSS 9 -100 -1700 100 U 40 40 1 1 W X VSS@1 25 0 -1700 100 U 40 40 1 1 W X VSS@2 41 100 -1700 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC33FJ128GP708/PT # Package Name: TQFP80-12X12 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC33FJ128GP708/PT IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC33FJXXGP708 F0 "IC" -1100 2100 50 H V L B F1 "DSPIC33FJ128GP708/PT" 500 -2200 50 H V L B F2 "microchip-dspic-TQFP80-12X12" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 2000 1100 2000 P 2 1 0 0 1100 2000 1100 -2000 P 2 1 0 0 1100 -2000 -1100 -2000 P 2 1 0 0 -1100 -2000 -1100 2000 X AVDD 25 400 2100 100 D 40 40 1 1 W X AVSS 26 200 -2100 100 U 40 40 1 1 W X C1RX/RF0 72 1200 200 100 L 40 40 1 1 B X C1TX/RF1 73 1200 100 100 L 40 40 1 1 B X C2RX/RG0 75 1200 -800 100 L 40 40 1 1 B X C2TX/RG1 74 1200 -900 100 L 40 40 1 1 B X CN8/SCK2/RG6 6 1200 -1200 100 L 40 40 1 1 B X CN9/SDI2/RG7 7 1200 -1300 100 L 40 40 1 1 B X CN10/SDO2/RG8 8 1200 -1400 100 L 40 40 1 1 B X CN11/SS2/RG9 10 1200 -1500 100 L 40 40 1 1 B X CN13/OC5/RD4 66 1200 1500 100 L 40 40 1 1 B X CN14/OC6/RD5 67 1200 1400 100 L 40 40 1 1 B X CN15/OC7/RD6 68 1200 1300 100 L 40 40 1 1 B X CN16/OC8/RD7 69 1200 1200 100 L 40 40 1 1 B X CN17/U2RX/RF4 39 1200 -200 100 L 40 40 1 1 B X CN18/U2TX/RF5 40 1200 -300 100 L 40 40 1 1 B X CN19/IC6/RD13 65 1200 600 100 L 40 40 1 1 B X COFS/RG15 1 1200 -1900 100 L 40 40 1 1 B X CSCK/RG14 78 1200 -1800 100 L 40 40 1 1 B X CSDI/RG12 79 1200 -1600 100 L 40 40 1 1 B X CSDO/RG13 80 1200 -1700 100 L 40 40 1 1 B X IC1/RD8 54 1200 1100 100 L 40 40 1 1 B X IC2/RD9 55 1200 1000 100 L 40 40 1 1 B X IC3/RD10 56 1200 900 100 L 40 40 1 1 B X IC4/RD11 57 1200 800 100 L 40 40 1 1 B X IC5/RD12 64 1200 700 100 L 40 40 1 1 B X MCLR 9 -1200 -1800 100 R 40 40 1 1 I X OC1/RD0 58 1200 1900 100 L 40 40 1 1 B X OC2/RD1 61 1200 1800 100 L 40 40 1 1 B X OC3/RD2 62 1200 1700 100 L 40 40 1 1 B X OC4/RD3 63 1200 1600 100 L 40 40 1 1 B X OSC1/CLKI/RC12 49 -1200 -1600 100 R 40 40 1 1 B X OSC2/CLKO/RC15 50 -1200 -1500 100 R 40 40 1 1 B X RA6/AN22/CN22 76 -1200 1900 100 R 40 40 1 1 B X RA7/AN23/CN23 77 -1200 1800 100 R 40 40 1 1 B X RA9/VR- 23 -1200 1700 100 R 40 40 1 1 B X RA10/VR+ 24 -1200 1600 100 R 40 40 1 1 B X RA14/INT3/SCL2 52 -1200 1500 100 R 40 40 1 1 B X RA15/INT4/SDA2 53 -1200 1400 100 R 40 40 1 1 B X RB0/AN0/CN2/EMUD3/PGD3 20 -1200 1200 100 R 40 40 1 1 B X RB1/AN1/CN3/EMUC3/PGC3 19 -1200 1100 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 18 -1200 1000 100 R 40 40 1 1 B X RB3/AN3/CN5 17 -1200 900 100 R 40 40 1 1 B X RB4/AN4/CN6 16 -1200 800 100 R 40 40 1 1 B X RB5/AN5/CN7 15 -1200 700 100 R 40 40 1 1 B X RB6/AN6/EMUC1/PGC1/OCFA 21 -1200 600 100 R 40 40 1 1 B X RB7/AN7/EMUD1/PGD1 22 -1200 500 100 R 40 40 1 1 B X RB8/AN8/U2CTS 27 -1200 400 100 R 40 40 1 1 B X RB9/AN9 28 -1200 300 100 R 40 40 1 1 B X RB10/AN10 29 -1200 200 100 R 40 40 1 1 B X RB11/AN11 30 -1200 100 100 R 40 40 1 1 B X RB12/AN12/TCK 33 -1200 0 100 R 40 40 1 1 B X RB13/AN13/TDI 34 -1200 -100 100 R 40 40 1 1 B X RB14/AN14/U2RTS 35 -1200 -200 100 R 40 40 1 1 B X RB15/AN15/CN12/OCFB 36 -1200 -300 100 R 40 40 1 1 B X RC1/AN16/T2CK/T7CK 2 -1200 -500 100 R 40 40 1 1 B X RC2/AN17/T3CK/T6CK 3 -1200 -600 100 R 40 40 1 1 B X RC3/AN18/T4CK/T9CK 4 -1200 -700 100 R 40 40 1 1 B X RC4/AN19/T5CK/T8CK 5 -1200 -800 100 R 40 40 1 1 B X RC13/CN1/EMUD2/SOSCI 59 -1200 -900 100 R 40 40 1 1 B X RC14/CN0/EMUC2/SOSCO/T1CK 60 -1200 -1000 100 R 40 40 1 1 B X RE8/AN20/INT1/TMS 13 -1200 -1200 100 R 40 40 1 1 B X RE9/AN21/INT2/TDO 14 -1200 -1300 100 R 40 40 1 1 B X SCK1/INT0/RF6 45 1200 -400 100 L 40 40 1 1 B X SCL1/RG2 47 1200 -1000 100 L 40 40 1 1 B X SDA1/RG3 46 1200 -1100 100 L 40 40 1 1 B X SDI1/RF7 44 1200 -500 100 L 40 40 1 1 B X SDO1/RF8 43 1200 -600 100 L 40 40 1 1 B X U1CTS/CN20/IC7/RD14 37 1200 500 100 L 40 40 1 1 B X U1RTS/CN21/IC8/RD15 38 1200 400 100 L 40 40 1 1 B X U1RX/RF2 42 1200 0 100 L 40 40 1 1 B X U1TX/RF3 41 1200 -100 100 L 40 40 1 1 B X VDD 12 -200 2100 100 D 40 40 1 1 W X VDD@1 32 -100 2100 100 D 40 40 1 1 W X VDD@2 48 0 2100 100 D 40 40 1 1 W X VDD@3 71 100 2100 100 D 40 40 1 1 W X VDDCORE 70 200 2100 100 D 40 40 1 1 W X VSS 11 -200 -2100 100 U 40 40 1 1 W X VSS@1 31 -100 -2100 100 U 40 40 1 1 W X VSS@2 51 0 -2100 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC33FJ128MC506/PT # Package Name: TQFP64-10X10 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC33FJ128MC506/PT IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC33FJXXMC506 F0 "IC" -1200 1700 50 H V L B F1 "DSPIC33FJ128MC506/PT" 400 -1800 50 H V L B F2 "microchip-dspic-TQFP64-10X10" 0 150 50 H I C C DRAW P 2 1 0 0 -1200 1600 1200 1600 P 2 1 0 0 1200 1600 1200 -1600 P 2 1 0 0 1200 -1600 -1200 -1600 P 2 1 0 0 -1200 -1600 -1200 1600 T 0 655 1485 70 0 1 0 VDD T 0 5 -1515 70 0 1 0 VSS X AVDD 19 300 1700 100 D 40 40 1 1 W X AVSS 20 -300 -1700 100 U 40 40 1 1 W X C1RX/RF0 58 1300 400 100 L 40 40 1 1 B X C1TX/RF1 59 1300 300 100 L 40 40 1 1 B X CN8/SCK2/RG6 4 1300 -1200 100 L 40 40 1 1 B X CN9/SDI2/RG7 5 1300 -1300 100 L 40 40 1 1 B X CN10/SDO2/RG8 6 1300 -1400 100 L 40 40 1 1 B X CN17/U2RX/RF4 31 1300 0 100 L 40 40 1 1 B X CN18/U2TX/RF5 32 1300 -100 100 L 40 40 1 1 B X INT0/U1RTS/SCK1/RF6 35 1300 -200 100 L 40 40 1 1 B X MCLR 7 1300 1500 100 L 40 40 1 1 I X PGC2/SOSCO/T1CK/EMUC2/CN0/RC14 48 1300 -500 100 L 40 40 1 1 B X PGD2/SOSCI/T4CK/EMUD2/CN1/RC13 47 1300 -400 100 L 40 40 1 1 B X PWM1H/RE1 61 1300 1200 100 L 40 40 1 1 B X PWM1L/RE0 60 1300 1300 100 L 40 40 1 1 B X PWM2H/RE3 63 1300 1000 100 L 40 40 1 1 B X PWM2L/RE2 62 1300 1100 100 L 40 40 1 1 B X PWM3H/RE5 1 1300 800 100 L 40 40 1 1 B X PWM3L/RE4 64 1300 900 100 L 40 40 1 1 B X PWM4H/RE7 3 1300 600 100 L 40 40 1 1 B X PWM4L/RE6 2 1300 700 100 L 40 40 1 1 B X RB0/AN0/CN2/VR+/PGD3/EMUD3 16 -1300 1500 100 R 40 40 1 1 B X RB1/AN1/CN3/VR-/PGC3/EMUC3 15 -1300 1400 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 14 -1300 1300 100 R 40 40 1 1 B X RB3/AN3/CN5/INDX 13 -1300 1200 100 R 40 40 1 1 B X RB4/AN4/CN6/QEA/IC7 12 -1300 1100 100 R 40 40 1 1 B X RB5/AN5/CN7/QEB/IC8 11 -1300 1000 100 R 40 40 1 1 B X RB6/AN6/OCFA/EMUC1/PGC1 17 -1300 900 100 R 40 40 1 1 B X RB7/AN7/EMUD1/PGD1 18 -1300 800 100 R 40 40 1 1 B X RB8/AN8/U2CTS 21 -1300 700 100 R 40 40 1 1 B X RB9/AN9 22 -1300 600 100 R 40 40 1 1 B X RB10/AN10/TMS 23 -1300 500 100 R 40 40 1 1 B X RB11/AN11/TDO 24 -1300 400 100 R 40 40 1 1 B X RB12/AN12/TCK 27 -1300 300 100 R 40 40 1 1 B X RB13/AN13/TDI 28 -1300 200 100 R 40 40 1 1 B X RB14/AN14/U2RTS 29 -1300 100 100 R 40 40 1 1 B X RB15/AN15/CN12/OCFB 30 -1300 0 100 R 40 40 1 1 B X RC12/CLKI/OSC1 39 1300 -700 100 L 40 40 1 1 B X RC15/CLKO/OSC2 40 1300 -800 100 L 40 40 1 1 B X RD0/OC1 46 -1300 -200 100 R 40 40 1 1 B X RD1/OC2 49 -1300 -300 100 R 40 40 1 1 B X RD2/OC3 50 -1300 -400 100 R 40 40 1 1 B X RD3/OC4 51 -1300 -500 100 R 40 40 1 1 B X RD4/OC5/IC5/CN13 52 -1300 -600 100 R 40 40 1 1 B X RD5/OC6/IC6/CN14 53 -1300 -700 100 R 40 40 1 1 B X RD6/OC7/CN15 54 -1300 -800 100 R 40 40 1 1 B X RD7/OC8/CN16/UPDN 55 -1300 -900 100 R 40 40 1 1 B X RD8/IC1/INT1/FLTA 42 -1300 -1000 100 R 40 40 1 1 B X RD9/IC2/INT2/FLTB/U1CTS 43 -1300 -1100 100 R 40 40 1 1 B X RD10/IC3/INT3 44 -1300 -1200 100 R 40 40 1 1 B X RD11/IC4/INT4 45 -1300 -1300 100 R 40 40 1 1 B X SCL1/RG2 37 1300 -1000 100 L 40 40 1 1 B X SDA1/RG3 36 1300 -1100 100 L 40 40 1 1 B X SDI1/U1RX/RF2 34 1300 200 100 L 40 40 1 1 B X SDO1/U1TX/RF3 33 1300 100 100 L 40 40 1 1 B X T5CK/CN11/SS2/RG9 8 1300 -1500 100 L 40 40 1 1 B X VDD 10 500 1700 100 D 40 40 1 1 W X VDD@1 26 600 1700 100 D 40 40 1 1 W X VDD@2 38 700 1700 100 D 40 40 1 1 W X VDD@3 57 800 1700 100 D 40 40 1 1 W X VDDC 56 400 1700 100 D 40 40 1 1 W X VSS 9 -100 -1700 100 U 40 40 1 1 W X VSS@1 25 0 -1700 100 U 40 40 1 1 W X VSS@2 41 100 -1700 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC33FJ128MC706/PT # Package Name: TQFP64-10X10 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC33FJ128MC706/PT IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC33FJXXMC506 F0 "IC" -1200 1700 50 H V L B F1 "DSPIC33FJ128MC706/PT" 400 -1800 50 H V L B F2 "microchip-dspic-TQFP64-10X10" 0 150 50 H I C C DRAW P 2 1 0 0 -1200 1600 1200 1600 P 2 1 0 0 1200 1600 1200 -1600 P 2 1 0 0 1200 -1600 -1200 -1600 P 2 1 0 0 -1200 -1600 -1200 1600 T 0 655 1485 70 0 1 0 VDD T 0 5 -1515 70 0 1 0 VSS X AVDD 19 300 1700 100 D 40 40 1 1 W X AVSS 20 -300 -1700 100 U 40 40 1 1 W X C1RX/RF0 58 1300 400 100 L 40 40 1 1 B X C1TX/RF1 59 1300 300 100 L 40 40 1 1 B X CN8/SCK2/RG6 4 1300 -1200 100 L 40 40 1 1 B X CN9/SDI2/RG7 5 1300 -1300 100 L 40 40 1 1 B X CN10/SDO2/RG8 6 1300 -1400 100 L 40 40 1 1 B X CN17/U2RX/RF4 31 1300 0 100 L 40 40 1 1 B X CN18/U2TX/RF5 32 1300 -100 100 L 40 40 1 1 B X INT0/U1RTS/SCK1/RF6 35 1300 -200 100 L 40 40 1 1 B X MCLR 7 1300 1500 100 L 40 40 1 1 I X PGC2/SOSCO/T1CK/EMUC2/CN0/RC14 48 1300 -500 100 L 40 40 1 1 B X PGD2/SOSCI/T4CK/EMUD2/CN1/RC13 47 1300 -400 100 L 40 40 1 1 B X PWM1H/RE1 61 1300 1200 100 L 40 40 1 1 B X PWM1L/RE0 60 1300 1300 100 L 40 40 1 1 B X PWM2H/RE3 63 1300 1000 100 L 40 40 1 1 B X PWM2L/RE2 62 1300 1100 100 L 40 40 1 1 B X PWM3H/RE5 1 1300 800 100 L 40 40 1 1 B X PWM3L/RE4 64 1300 900 100 L 40 40 1 1 B X PWM4H/RE7 3 1300 600 100 L 40 40 1 1 B X PWM4L/RE6 2 1300 700 100 L 40 40 1 1 B X RB0/AN0/CN2/VR+/PGD3/EMUD3 16 -1300 1500 100 R 40 40 1 1 B X RB1/AN1/CN3/VR-/PGC3/EMUC3 15 -1300 1400 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 14 -1300 1300 100 R 40 40 1 1 B X RB3/AN3/CN5/INDX 13 -1300 1200 100 R 40 40 1 1 B X RB4/AN4/CN6/QEA/IC7 12 -1300 1100 100 R 40 40 1 1 B X RB5/AN5/CN7/QEB/IC8 11 -1300 1000 100 R 40 40 1 1 B X RB6/AN6/OCFA/EMUC1/PGC1 17 -1300 900 100 R 40 40 1 1 B X RB7/AN7/EMUD1/PGD1 18 -1300 800 100 R 40 40 1 1 B X RB8/AN8/U2CTS 21 -1300 700 100 R 40 40 1 1 B X RB9/AN9 22 -1300 600 100 R 40 40 1 1 B X RB10/AN10/TMS 23 -1300 500 100 R 40 40 1 1 B X RB11/AN11/TDO 24 -1300 400 100 R 40 40 1 1 B X RB12/AN12/TCK 27 -1300 300 100 R 40 40 1 1 B X RB13/AN13/TDI 28 -1300 200 100 R 40 40 1 1 B X RB14/AN14/U2RTS 29 -1300 100 100 R 40 40 1 1 B X RB15/AN15/CN12/OCFB 30 -1300 0 100 R 40 40 1 1 B X RC12/CLKI/OSC1 39 1300 -700 100 L 40 40 1 1 B X RC15/CLKO/OSC2 40 1300 -800 100 L 40 40 1 1 B X RD0/OC1 46 -1300 -200 100 R 40 40 1 1 B X RD1/OC2 49 -1300 -300 100 R 40 40 1 1 B X RD2/OC3 50 -1300 -400 100 R 40 40 1 1 B X RD3/OC4 51 -1300 -500 100 R 40 40 1 1 B X RD4/OC5/IC5/CN13 52 -1300 -600 100 R 40 40 1 1 B X RD5/OC6/IC6/CN14 53 -1300 -700 100 R 40 40 1 1 B X RD6/OC7/CN15 54 -1300 -800 100 R 40 40 1 1 B X RD7/OC8/CN16/UPDN 55 -1300 -900 100 R 40 40 1 1 B X RD8/IC1/INT1/FLTA 42 -1300 -1000 100 R 40 40 1 1 B X RD9/IC2/INT2/FLTB/U1CTS 43 -1300 -1100 100 R 40 40 1 1 B X RD10/IC3/INT3 44 -1300 -1200 100 R 40 40 1 1 B X RD11/IC4/INT4 45 -1300 -1300 100 R 40 40 1 1 B X SCL1/RG2 37 1300 -1000 100 L 40 40 1 1 B X SDA1/RG3 36 1300 -1100 100 L 40 40 1 1 B X SDI1/U1RX/RF2 34 1300 200 100 L 40 40 1 1 B X SDO1/U1TX/RF3 33 1300 100 100 L 40 40 1 1 B X T5CK/CN11/SS2/RG9 8 1300 -1500 100 L 40 40 1 1 B X VDD 10 500 1700 100 D 40 40 1 1 W X VDD@1 26 600 1700 100 D 40 40 1 1 W X VDD@2 38 700 1700 100 D 40 40 1 1 W X VDD@3 57 800 1700 100 D 40 40 1 1 W X VDDC 56 400 1700 100 D 40 40 1 1 W X VSS 9 -100 -1700 100 U 40 40 1 1 W X VSS@1 25 0 -1700 100 U 40 40 1 1 W X VSS@2 41 100 -1700 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC33FJ128MC708/PT # Package Name: TQFP80-12X12 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC33FJ128MC708/PT IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC33FJXXMC708 F0 "IC" -1100 2100 50 H V L B F1 "DSPIC33FJ128MC708/PT" 500 -2200 50 H V L B F2 "microchip-dspic-TQFP80-12X12" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 2000 1000 2000 P 2 1 0 0 1000 2000 1000 -2000 P 2 1 0 0 1000 -2000 -1100 -2000 P 2 1 0 0 -1100 -2000 -1100 2000 X AVDD 25 400 2100 100 D 40 40 1 1 W X AVSS 26 300 -2100 100 U 40 40 1 1 W X C1RX/RF0 72 1100 -900 100 L 40 40 1 1 B X C1TX/RF1 73 1100 -1000 100 L 40 40 1 1 B X CN13/OC5/RD4 66 1100 1500 100 L 40 40 1 1 B X CN14/OC6/RD5 67 1100 1400 100 L 40 40 1 1 B X CN15/OC7/RD6 68 1100 1300 100 L 40 40 1 1 B X CN17/U2RX/RF4 39 1100 -1300 100 L 40 40 1 1 B X CN18/U2TX/RF5 40 1100 -1400 100 L 40 40 1 1 B X CN19/IC6/RD13 65 1100 600 100 L 40 40 1 1 B X IC1/RD8 54 1100 1100 100 L 40 40 1 1 B X IC2/RD9 55 1100 1000 100 L 40 40 1 1 B X IC3/RD10 56 1100 900 100 L 40 40 1 1 B X IC4/RD11 57 1100 800 100 L 40 40 1 1 B X IC5/RD12 64 1100 700 100 L 40 40 1 1 B X MCLR 9 1100 -1900 100 L 40 40 1 1 I X OC1/RD0 58 1100 1900 100 L 40 40 1 1 B X OC2/RD1 61 1100 1800 100 L 40 40 1 1 B X OC3/RD2 62 1100 1700 100 L 40 40 1 1 B X OC4/RD3 63 1100 1600 100 L 40 40 1 1 B X OSC1/CLKI/RC12 49 -1200 -700 100 R 40 40 1 1 B X OSC2/CLKO/RC15 50 -1200 -600 100 R 40 40 1 1 B X PWM1H/RE1 77 1100 100 100 L 40 40 1 1 B X PWM1L/RE0 76 1100 200 100 L 40 40 1 1 B X PWM2H/RE3 79 1100 -100 100 L 40 40 1 1 B X PWM2L/RE2 78 1100 0 100 L 40 40 1 1 B X PWM3H/RE5 1 1100 -300 100 L 40 40 1 1 B X PWM3L/RE4 80 1100 -200 100 L 40 40 1 1 B X PWM4H/RE7 3 1100 -500 100 L 40 40 1 1 B X PWM4L/RE6 2 1100 -400 100 L 40 40 1 1 B X RA9/VR- 23 -1200 1900 100 R 40 40 1 1 B X RA10/VR+ 24 -1200 1800 100 R 40 40 1 1 B X RA14/INT3/SCL2 52 -1200 1700 100 R 40 40 1 1 B X RA15/INT4/SDA2 53 -1200 1600 100 R 40 40 1 1 B X RB0/AN0/CN2/EMUD3/PGD3 20 -1200 1400 100 R 40 40 1 1 B X RB1/AN1/CN3/EMUC3/PGC3 19 -1200 1300 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 18 -1200 1200 100 R 40 40 1 1 B X RB3/AN3/CN5/INDX 17 -1200 1100 100 R 40 40 1 1 B X RB4/AN4/CN6/QEA 16 -1200 1000 100 R 40 40 1 1 B X RB5/AN5/CN7/QEB 15 -1200 900 100 R 40 40 1 1 B X RB6/AN6/EMUC1/PGC1/OCFA 21 -1200 800 100 R 40 40 1 1 B X RB7/AN7/EMUD1/PGD1 22 -1200 700 100 R 40 40 1 1 B X RB8/AN8/U2CTS 27 -1200 600 100 R 40 40 1 1 B X RB9/AN9 28 -1200 500 100 R 40 40 1 1 B X RB10/AN10 29 -1200 400 100 R 40 40 1 1 B X RB11/AN11 30 -1200 300 100 R 40 40 1 1 B X RB12/AN12/TCK 33 -1200 200 100 R 40 40 1 1 B X RB13/AN13/TDI 34 -1200 100 100 R 40 40 1 1 B X RB14/AN14/U2RTS 35 -1200 0 100 R 40 40 1 1 B X RB15/AN15/CN12/OCFB 36 -1200 -100 100 R 40 40 1 1 B X RC1/AN16/T2CK/T7CK 4 -1200 -300 100 R 40 40 1 1 B X RC2/AN17/T3CK/T6CK 5 -1200 -400 100 R 40 40 1 1 B X RC13/CN1/EMUD2/SOSCI 59 -1200 -900 100 R 40 40 1 1 B X RC14/CN0/EMUC2/SOSCO/T1CK 60 -1200 -1000 100 R 40 40 1 1 B X RG0/C2RX 75 -1200 -1200 100 R 40 40 1 1 B X RG1/C2TX 74 -1200 -1300 100 R 40 40 1 1 B X RG2/SCL1 47 -1200 -1400 100 R 40 40 1 1 B X RG3/SDA1 46 -1200 -1500 100 R 40 40 1 1 B X RG6/CN8/SCK2 6 -1200 -1600 100 R 40 40 1 1 B X RG7/CN9/SDI2 7 -1200 -1700 100 R 40 40 1 1 B X RG8/CN10/SDO2 8 -1200 -1800 100 R 40 40 1 1 B X RG9/CN11/SS2 10 -1200 -1900 100 R 40 40 1 1 B X SCK1/INT0/RF6 45 1100 -1500 100 L 40 40 1 1 B X SDI1/RF7 44 1100 -1600 100 L 40 40 1 1 B X SDO1/RF8 43 1100 -1700 100 L 40 40 1 1 B X TDO/FLTB/INT2/RE9 14 1100 -700 100 L 40 40 1 1 B X TMS/FLTA/INT1/RE8 13 1100 -600 100 L 40 40 1 1 B X U1CTS/CN20/IC7/RD14 37 1100 500 100 L 40 40 1 1 B X U1RTS/CN21/IC8/RD15 38 1100 400 100 L 40 40 1 1 B X U1RX/RF2 42 1100 -1100 100 L 40 40 1 1 B X U1TX/RF3 41 1100 -1200 100 L 40 40 1 1 B X UPDN/CN16/OC8/RD7 69 1100 1200 100 L 40 40 1 1 B X VDD 12 -200 2100 100 D 40 40 1 1 W X VDD@1 32 -100 2100 100 D 40 40 1 1 W X VDD@2 48 0 2100 100 D 40 40 1 1 W X VDD@3 71 100 2100 100 D 40 40 1 1 W X VDDCORE 70 200 2100 100 D 40 40 1 1 W X VSS 11 -100 -2100 100 U 40 40 1 1 W X VSS@1 31 0 -2100 100 U 40 40 1 1 W X VSS@2 51 100 -2100 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: DSPIC33FJ256GP506/PT # Package Name: TQFP64-10X10 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF DSPIC33FJ256GP506/PT IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: DSPIC33FJXXGP506 F0 "IC" -1200 1700 50 H V L B F1 "DSPIC33FJ256GP506/PT" 400 -1800 50 H V L B F2 "microchip-dspic-TQFP64-10X10" 0 150 50 H I C C DRAW P 2 1 0 0 -1200 1600 1200 1600 P 2 1 0 0 1200 1600 1200 -1600 P 2 1 0 0 1200 -1600 -1200 -1600 P 2 1 0 0 -1200 -1600 -1200 1600 T 0 655 1485 70 0 1 0 VDD T 0 5 -1515 70 0 1 0 VSS X AN16/T2CK/T7CK/RC1 2 1300 900 100 L 40 40 1 1 B X AN17/T3CK/T6CK/RC2 3 1300 800 100 L 40 40 1 1 B X AVDD 19 300 1700 100 D 40 40 1 1 W X AVSS 20 -300 -1700 100 U 40 40 1 1 W X C1RX/RF0 58 1300 400 100 L 40 40 1 1 B X C1TX/RF1 59 1300 300 100 L 40 40 1 1 B X CN8/SCK2/RG6 4 1300 -800 100 L 40 40 1 1 B X CN9/SDI2/RG7 5 1300 -900 100 L 40 40 1 1 B X CN10/SDO2/RG8 6 1300 -1000 100 L 40 40 1 1 B X COFS/RG15 1 1300 -1500 100 L 40 40 1 1 B X CSCK/RG14 62 1300 -1400 100 L 40 40 1 1 B X CSDI/RG12 63 1300 -1200 100 L 40 40 1 1 B X CSDO/RG13 64 1300 -1300 100 L 40 40 1 1 B X INT0/U1RTS/SCK1/RF6 35 1300 -200 100 L 40 40 1 1 B X MCLR 7 1300 1400 100 L 40 40 1 1 I X PGC2/SOSCO/T1CK/EMUC2/CN0/RC14 48 1300 600 100 L 40 40 1 1 B X PGD2/SOSCI/T4CK/EMUD2/CN1/RC13 47 1300 700 100 L 40 40 1 1 B X RB0/AN0/CN2/VR+/PGD3/EMUD3 16 -1300 1500 100 R 40 40 1 1 B X RB1/AN1/CN3/VR-/PGC3/EMUC3 15 -1300 1400 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 14 -1300 1300 100 R 40 40 1 1 B X RB3/AN3/CN5 13 -1300 1200 100 R 40 40 1 1 B X RB4/AN4/CN6/IC7 12 -1300 1100 100 R 40 40 1 1 B X RB5/AN5/CN7/IC8 11 -1300 1000 100 R 40 40 1 1 B X RB6/AN6/OCFA/EMUC1/PGC1 17 -1300 900 100 R 40 40 1 1 B X RB7/AN7/EMUD1/PGD1 18 -1300 800 100 R 40 40 1 1 B X RB8/AN8/U2CTS 21 -1300 700 100 R 40 40 1 1 B X RB9/AN9 22 -1300 600 100 R 40 40 1 1 B X RB10/AN10/TMS 23 -1300 500 100 R 40 40 1 1 B X RB11/AN11/TDO 24 -1300 400 100 R 40 40 1 1 B X RB12/AN12/TCK 27 -1300 300 100 R 40 40 1 1 B X RB13/AN13/TDI 28 -1300 200 100 R 40 40 1 1 B X RB14/AN14/U2RTS 29 -1300 100 100 R 40 40 1 1 B X RB15/AN15/CN12/OCFB 30 -1300 0 100 R 40 40 1 1 B X RC12/CLKI/OSC1 39 1300 1200 100 L 40 40 1 1 B X RC15/CLKO/OSC2 40 1300 1100 100 L 40 40 1 1 B X RD0/OC1 46 -1300 -200 100 R 40 40 1 1 B X RD1/OC2 49 -1300 -300 100 R 40 40 1 1 B X RD2/OC3 50 -1300 -400 100 R 40 40 1 1 B X RD3/OC4 51 -1300 -500 100 R 40 40 1 1 B X RD4/OC5/IC5/CN13 52 -1300 -600 100 R 40 40 1 1 B X RD5/OC6/IC6/CN14 53 -1300 -700 100 R 40 40 1 1 B X RD6/OC7/CN15 54 -1300 -800 100 R 40 40 1 1 B X RD7/OC8/CN16 55 -1300 -900 100 R 40 40 1 1 B X RD8/IC1/INT1 42 -1300 -1000 100 R 40 40 1 1 B X RD9/IC2/INT2/U1CTS 43 -1300 -1100 100 R 40 40 1 1 B X RD10/IC3/INT3 44 -1300 -1200 100 R 40 40 1 1 B X RD11/IC4/INT4 45 -1300 -1300 100 R 40 40 1 1 B X RG0 61 1300 -400 100 L 40 40 1 1 B X RG1 60 1300 -500 100 L 40 40 1 1 B X SCL1/RG2 37 1300 -600 100 L 40 40 1 1 B X SCL2/CN18/U2TX/RF5 32 1300 -100 100 L 40 40 1 1 B X SDA1/RG3 36 1300 -700 100 L 40 40 1 1 B X SDA2/CN17/U2RX/RF4 31 1300 0 100 L 40 40 1 1 B X SDI1/U1RX/RF2 34 1300 200 100 L 40 40 1 1 B X SDO1/U1TX/RF3 33 1300 100 100 L 40 40 1 1 B X T5CK/CN11/SS2/RG9 8 1300 -1100 100 L 40 40 1 1 B X VDD 10 500 1700 100 D 40 40 1 1 W X VDD@1 26 600 1700 100 D 40 40 1 1 W X VDD@2 38 700 1700 100 D 40 40 1 1 W X VDD@3 57 800 1700 100 D 40 40 1 1 W X VDDC 56 400 1700 100 D 40 40 1 1 W X VSS 9 -100 -1700 100 U 40 40 1 1 W X VSS@1 25 0 -1700 100 U 40 40 1 1 W X VSS@2 41 100 -1700 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: MCP23S08P # Package Name: DIL18 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MCP23S08P IC 0 40 Y Y 1 L N # Gate Name: A # Symbol Name: MCP23S08 F0 "IC" -400 540 50 H V L B F1 "MCP23S08P" -400 -600 50 H V L B F2 "microchip-dspic-DIL18" 0 150 50 H I C C DRAW P 2 1 0 0 -400 500 -400 -500 P 2 1 0 0 -400 -500 400 -500 P 2 1 0 0 400 -500 400 500 P 2 1 0 0 400 500 -400 500 X A0 5 -500 0 100 R 40 40 1 1 I X A1 4 -500 100 100 R 40 40 1 1 I X CS# 7 -500 -200 100 R 40 40 1 1 I X GP0 10 500 -400 100 L 40 40 1 1 B X GP1 11 500 -300 100 L 40 40 1 1 B X GP2 12 500 -200 100 L 40 40 1 1 B X GP3 13 500 -100 100 L 40 40 1 1 B X GP4 14 500 0 100 L 40 40 1 1 B X GP5 15 500 100 100 L 40 40 1 1 B X GP6 16 500 200 100 L 40 40 1 1 B X GP7 17 500 300 100 L 40 40 1 1 B X INT 8 -500 -300 100 R 40 40 1 1 O X RESET# 6 -500 -100 100 R 40 40 1 1 I X SCK 1 -500 400 100 R 40 40 1 1 I X SI 2 -500 300 100 R 40 40 1 1 I X SO 3 -500 200 100 R 40 40 1 1 O X VDD 18 500 400 100 L 40 40 1 1 W X VSS 9 -500 -400 100 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: MCP23S08SO # Package Name: SO-18W # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MCP23S08SO IC 0 40 Y Y 1 L N # Gate Name: A # Symbol Name: MCP23S08 F0 "IC" -400 540 50 H V L B F1 "MCP23S08SO" -400 -600 50 H V L B F2 "microchip-dspic-SO-18W" 0 150 50 H I C C DRAW P 2 1 0 0 -400 500 -400 -500 P 2 1 0 0 -400 -500 400 -500 P 2 1 0 0 400 -500 400 500 P 2 1 0 0 400 500 -400 500 X A0 5 -500 0 100 R 40 40 1 1 I X A1 4 -500 100 100 R 40 40 1 1 I X CS# 7 -500 -200 100 R 40 40 1 1 I X GP0 10 500 -400 100 L 40 40 1 1 B X GP1 11 500 -300 100 L 40 40 1 1 B X GP2 12 500 -200 100 L 40 40 1 1 B X GP3 13 500 -100 100 L 40 40 1 1 B X GP4 14 500 0 100 L 40 40 1 1 B X GP5 15 500 100 100 L 40 40 1 1 B X GP6 16 500 200 100 L 40 40 1 1 B X GP7 17 500 300 100 L 40 40 1 1 B X INT 8 -500 -300 100 R 40 40 1 1 O X RESET# 6 -500 -100 100 R 40 40 1 1 I X SCK 1 -500 400 100 R 40 40 1 1 I X SI 2 -500 300 100 R 40 40 1 1 I X SO 3 -500 200 100 R 40 40 1 1 O X VDD 18 500 400 100 L 40 40 1 1 W X VSS 9 -500 -400 100 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: MCP23S08SS # Package Name: SSOP20 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MCP23S08SS IC 0 40 Y Y 1 L N # Gate Name: A # Symbol Name: MCP23S08 F0 "IC" -400 540 50 H V L B F1 "MCP23S08SS" -400 -600 50 H V L B F2 "microchip-dspic-SSOP20" 0 150 50 H I C C DRAW P 2 1 0 0 -400 500 -400 -500 P 2 1 0 0 -400 -500 400 -500 P 2 1 0 0 400 -500 400 500 P 2 1 0 0 400 500 -400 500 X A0 5 -500 0 100 R 40 40 1 1 I X A1 4 -500 100 100 R 40 40 1 1 I X CS# 7 -500 -200 100 R 40 40 1 1 I X GP0 12 500 -400 100 L 40 40 1 1 B X GP1 13 500 -300 100 L 40 40 1 1 B X GP2 14 500 -200 100 L 40 40 1 1 B X GP3 15 500 -100 100 L 40 40 1 1 B X GP4 16 500 0 100 L 40 40 1 1 B X GP5 17 500 100 100 L 40 40 1 1 B X GP6 18 500 200 100 L 40 40 1 1 B X GP7 19 500 300 100 L 40 40 1 1 B X INT 8 -500 -300 100 R 40 40 1 1 O X RESET# 6 -500 -100 100 R 40 40 1 1 I X SCK 1 -500 400 100 R 40 40 1 1 I X SI 2 -500 300 100 R 40 40 1 1 I X SO 3 -500 200 100 R 40 40 1 1 O X VDD 20 500 400 100 L 40 40 1 1 W X VSS 9 -500 -400 100 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: MCP1252 # Package Name: MSOP8 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MCP1252 IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: MCP1252/3 F0 "IC" -500 400 50 H V L B F1 "MCP1252" -500 -400 50 H V L B F2 "microchip-dspic-MSOP8" 0 150 50 H I C C DRAW P 2 1 0 0 -500 300 500 300 P 2 1 0 0 500 300 500 -200 P 2 1 0 0 500 -200 -500 -200 P 2 1 0 0 -500 -200 -500 300 X C+ 6 600 0 100 L 40 40 1 1 P X C- 5 600 -100 100 L 40 40 1 1 P X GND 4 -600 -100 100 R 40 40 1 1 W X PGOOD 1 -600 200 100 R 40 40 1 1 C X SELECT 8 600 200 100 L 40 40 1 1 I X SHDN# 7 600 100 100 L 40 40 1 1 I X VIN 3 -600 0 100 R 40 40 1 1 W X VOUT 2 -600 100 100 R 40 40 1 1 w ENDDRAW ENDDEF # # Dev Name: MCP1252-ADJ # Package Name: MSOP8 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MCP1252-ADJ IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: MCP1252/3-ADJ F0 "IC" -500 400 50 H V L B F1 "MCP1252-ADJ" -500 -400 50 H V L B F2 "microchip-dspic-MSOP8" 0 150 50 H I C C DRAW P 2 1 0 0 -500 300 500 300 P 2 1 0 0 500 300 500 -200 P 2 1 0 0 500 -200 -500 -200 P 2 1 0 0 -500 -200 -500 300 X C+ 6 600 0 100 L 40 40 1 1 P X C- 5 600 -100 100 L 40 40 1 1 P X FB 8 600 200 100 L 40 40 1 1 I X GND 4 -600 -100 100 R 40 40 1 1 W X PGOOD 1 -600 200 100 R 40 40 1 1 C X SHDN# 7 600 100 100 L 40 40 1 1 I X VIN 3 -600 0 100 R 40 40 1 1 W X VOUT 2 -600 100 100 R 40 40 1 1 w ENDDRAW ENDDEF # # Dev Name: MCP1253 # Package Name: MSOP8 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MCP1253 IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: MCP1252/3 F0 "IC" -500 400 50 H V L B F1 "MCP1253" -500 -400 50 H V L B F2 "microchip-dspic-MSOP8" 0 150 50 H I C C DRAW P 2 1 0 0 -500 300 500 300 P 2 1 0 0 500 300 500 -200 P 2 1 0 0 500 -200 -500 -200 P 2 1 0 0 -500 -200 -500 300 X C+ 6 600 0 100 L 40 40 1 1 P X C- 5 600 -100 100 L 40 40 1 1 P X GND 4 -600 -100 100 R 40 40 1 1 W X PGOOD 1 -600 200 100 R 40 40 1 1 C X SELECT 8 600 200 100 L 40 40 1 1 I X SHDN# 7 600 100 100 L 40 40 1 1 I X VIN 3 -600 0 100 R 40 40 1 1 W X VOUT 2 -600 100 100 R 40 40 1 1 w ENDDRAW ENDDEF # # Dev Name: MCP1253-ADJ # Package Name: MSOP8 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MCP1253-ADJ IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: MCP1252/3-ADJ F0 "IC" -500 400 50 H V L B F1 "MCP1253-ADJ" -500 -400 50 H V L B F2 "microchip-dspic-MSOP8" 0 150 50 H I C C DRAW P 2 1 0 0 -500 300 500 300 P 2 1 0 0 500 300 500 -200 P 2 1 0 0 500 -200 -500 -200 P 2 1 0 0 -500 -200 -500 300 X C+ 6 600 0 100 L 40 40 1 1 P X C- 5 600 -100 100 L 40 40 1 1 P X FB 8 600 200 100 L 40 40 1 1 I X GND 4 -600 -100 100 R 40 40 1 1 W X PGOOD 1 -600 200 100 R 40 40 1 1 C X SHDN# 7 600 100 100 L 40 40 1 1 I X VIN 3 -600 0 100 R 40 40 1 1 W X VOUT 2 -600 100 100 R 40 40 1 1 w ENDDRAW ENDDEF # # Dev Name: MCP2551/P # Package Name: DIL08 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MCP2551/P IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: MCP2551 F0 "IC" -400 360 50 H V L B F1 "MCP2551/P" 0 0 50 H V L B F2 "microchip-dspic-DIL08" 0 150 50 H I C C DRAW P 2 1 0 0 -400 -200 -400 300 P 2 1 0 0 -400 300 400 300 P 2 1 0 0 400 300 400 -200 P 2 1 0 0 400 -200 -400 -200 T 1 -15 95 70 0 1 0 MCP2551 X CANH 7 500 100 100 L 40 40 1 1 B X CANL 6 500 0 100 L 40 40 1 1 B X RS 8 500 200 100 L 40 40 1 1 I X RXD 4 -500 -100 100 R 40 40 1 1 O X TXD 1 -500 200 100 R 40 40 1 1 I X VDD 3 -500 0 100 R 40 40 1 1 W X VREF 5 500 -100 100 L 40 40 1 1 O X VSS 2 -500 100 100 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: MCP2551/SN # Package Name: SO08 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MCP2551/SN IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: MCP2551 F0 "IC" -400 360 50 H V L B F1 "MCP2551/SN" 0 0 50 H V L B F2 "microchip-dspic-SO08" 0 150 50 H I C C DRAW P 2 1 0 0 -400 -200 -400 300 P 2 1 0 0 -400 300 400 300 P 2 1 0 0 400 300 400 -200 P 2 1 0 0 400 -200 -400 -200 T 1 -15 95 70 0 1 0 MCP2551 X CANH 7 500 100 100 L 40 40 1 1 B X CANL 6 500 0 100 L 40 40 1 1 B X RS 8 500 200 100 L 40 40 1 1 I X RXD 4 -500 -100 100 R 40 40 1 1 O X TXD 1 -500 200 100 R 40 40 1 1 I X VDD 3 -500 0 100 R 40 40 1 1 W X VREF 5 500 -100 100 L 40 40 1 1 O X VSS 2 -500 100 100 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: MCP23008P # Package Name: DIL18 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MCP23008P IC 0 40 Y Y 1 L N # Gate Name: A # Symbol Name: MCP23008 F0 "IC" -400 540 50 H V L B F1 "MCP23008P" -400 -620 50 H V L B F2 "microchip-dspic-DIL18" 0 150 50 H I C C DRAW P 2 1 0 0 -400 500 -400 -500 P 2 1 0 0 -400 -500 400 -500 P 2 1 0 0 400 -500 400 500 P 2 1 0 0 400 500 -400 500 X A0 5 -500 0 100 R 40 40 1 1 I X A1 4 -500 100 100 R 40 40 1 1 I X A2 3 -500 200 100 R 40 40 1 1 I X GP0 10 500 -400 100 L 40 40 1 1 B X GP1 11 500 -300 100 L 40 40 1 1 B X GP2 12 500 -200 100 L 40 40 1 1 B X GP3 13 500 -100 100 L 40 40 1 1 B X GP4 14 500 0 100 L 40 40 1 1 B X GP5 15 500 100 100 L 40 40 1 1 B X GP6 16 500 200 100 L 40 40 1 1 B X GP7 17 500 300 100 L 40 40 1 1 B X INT 8 -500 -300 100 R 40 40 1 1 O X NC 7 -500 -200 100 R 40 40 1 1 U X RESET# 6 -500 -100 100 R 40 40 1 1 I X SCL 1 -500 400 100 R 40 40 1 1 I X SDA 2 -500 300 100 R 40 40 1 1 B X VDD 18 500 400 100 L 40 40 1 1 W X VSS 9 -500 -400 100 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: MCP23008SO # Package Name: SO-18W # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MCP23008SO IC 0 40 Y Y 1 L N # Gate Name: A # Symbol Name: MCP23008 F0 "IC" -400 540 50 H V L B F1 "MCP23008SO" -400 -620 50 H V L B F2 "microchip-dspic-SO-18W" 0 150 50 H I C C DRAW P 2 1 0 0 -400 500 -400 -500 P 2 1 0 0 -400 -500 400 -500 P 2 1 0 0 400 -500 400 500 P 2 1 0 0 400 500 -400 500 X A0 5 -500 0 100 R 40 40 1 1 I X A1 4 -500 100 100 R 40 40 1 1 I X A2 3 -500 200 100 R 40 40 1 1 I X GP0 10 500 -400 100 L 40 40 1 1 B X GP1 11 500 -300 100 L 40 40 1 1 B X GP2 12 500 -200 100 L 40 40 1 1 B X GP3 13 500 -100 100 L 40 40 1 1 B X GP4 14 500 0 100 L 40 40 1 1 B X GP5 15 500 100 100 L 40 40 1 1 B X GP6 16 500 200 100 L 40 40 1 1 B X GP7 17 500 300 100 L 40 40 1 1 B X INT 8 -500 -300 100 R 40 40 1 1 O X NC 7 -500 -200 100 R 40 40 1 1 U X RESET# 6 -500 -100 100 R 40 40 1 1 I X SCL 1 -500 400 100 R 40 40 1 1 I X SDA 2 -500 300 100 R 40 40 1 1 B X VDD 18 500 400 100 L 40 40 1 1 W X VSS 9 -500 -400 100 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: MCP23008SS # Package Name: SSOP20 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MCP23008SS IC 0 40 Y Y 1 L N # Gate Name: A # Symbol Name: MCP23008 F0 "IC" -400 540 50 H V L B F1 "MCP23008SS" -400 -620 50 H V L B F2 "microchip-dspic-SSOP20" 0 150 50 H I C C DRAW P 2 1 0 0 -400 500 -400 -500 P 2 1 0 0 -400 -500 400 -500 P 2 1 0 0 400 -500 400 500 P 2 1 0 0 400 500 -400 500 X A0 5 -500 0 100 R 40 40 1 1 I X A1 4 -500 100 100 R 40 40 1 1 I X A2 3 -500 200 100 R 40 40 1 1 I X GP0 12 500 -400 100 L 40 40 1 1 B X GP1 13 500 -300 100 L 40 40 1 1 B X GP2 14 500 -200 100 L 40 40 1 1 B X GP3 15 500 -100 100 L 40 40 1 1 B X GP4 16 500 0 100 L 40 40 1 1 B X GP5 17 500 100 100 L 40 40 1 1 B X GP6 18 500 200 100 L 40 40 1 1 B X GP7 19 500 300 100 L 40 40 1 1 B X INT 8 -500 -300 100 R 40 40 1 1 O X NC 7 -500 -200 100 R 40 40 1 1 U X RESET# 6 -500 -100 100 R 40 40 1 1 I X SCL 1 -500 400 100 R 40 40 1 1 I X SDA 2 -500 300 100 R 40 40 1 1 B X VDD 20 500 400 100 L 40 40 1 1 W X VSS 9 -500 -400 100 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: MCP23016ML # Package Name: QFN-S28-6X6 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MCP23016ML IC 0 40 Y Y 1 L N # Gate Name: A # Symbol Name: MCP23016 F0 "IC" -400 940 50 H V L B F1 "MCP23016ML" -400 -1020 50 H V L B F2 "microchip-dspic-QFN-S28-6X6" 0 150 50 H I C C DRAW P 2 1 0 0 -400 900 -400 -900 P 2 1 0 0 -400 -900 400 -900 P 2 1 0 0 400 -900 400 900 P 2 1 0 0 400 900 -400 900 X A0 13 -500 -400 100 R 40 40 1 1 I X A1 14 -500 -500 100 R 40 40 1 1 I X A2 15 -500 -600 100 R 40 40 1 1 I X CLK 6 500 -100 100 L 40 40 1 1 I X GP0.0 18 500 800 100 L 40 40 1 1 B X GP0.1 19 500 700 100 L 40 40 1 1 B X GP0.2 20 500 600 100 L 40 40 1 1 B X GP0.3 21 500 500 100 L 40 40 1 1 B X GP0.4 22 500 400 100 L 40 40 1 1 B X GP0.5 23 500 300 100 L 40 40 1 1 B X GP0.6 24 500 200 100 L 40 40 1 1 B X GP0.7 25 500 100 100 L 40 40 1 1 B X GP1.0 27 -500 800 100 R 40 40 1 1 B X GP1.1 28 -500 700 100 R 40 40 1 1 B X GP1.2 1 -500 600 100 R 40 40 1 1 B X GP1.3 2 -500 500 100 R 40 40 1 1 B X GP1.4 4 -500 400 100 R 40 40 1 1 B X GP1.5 8 -500 300 100 R 40 40 1 1 B X GP1.6 9 -500 200 100 R 40 40 1 1 B X GP1.7 10 -500 100 100 R 40 40 1 1 B X INT# 3 500 -400 100 L 40 40 1 1 O X SCL 11 -500 -100 100 R 40 40 1 1 I X SDA 12 -500 -200 100 R 40 40 1 1 B X TP 7 500 -200 100 L 40 40 1 1 O X VDD 17 -500 -800 100 R 40 40 1 1 W X VSS 5 500 -600 100 L 40 40 1 1 W X VSS@1 16 500 -700 100 L 40 40 1 1 W X VSS@2 26 500 -800 100 L 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: MCP23016P # Package Name: DIL28-3 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MCP23016P IC 0 40 Y Y 1 L N # Gate Name: A # Symbol Name: MCP23016 F0 "IC" -400 940 50 H V L B F1 "MCP23016P" -400 -1020 50 H V L B F2 "microchip-dspic-DIL28-3" 0 150 50 H I C C DRAW P 2 1 0 0 -400 900 -400 -900 P 2 1 0 0 -400 -900 400 -900 P 2 1 0 0 400 -900 400 900 P 2 1 0 0 400 900 -400 900 X A0 16 -500 -400 100 R 40 40 1 1 I X A1 17 -500 -500 100 R 40 40 1 1 I X A2 18 -500 -600 100 R 40 40 1 1 I X CLK 9 500 -100 100 L 40 40 1 1 I X GP0.0 21 500 800 100 L 40 40 1 1 B X GP0.1 22 500 700 100 L 40 40 1 1 B X GP0.2 23 500 600 100 L 40 40 1 1 B X GP0.3 24 500 500 100 L 40 40 1 1 B X GP0.4 25 500 400 100 L 40 40 1 1 B X GP0.5 26 500 300 100 L 40 40 1 1 B X GP0.6 27 500 200 100 L 40 40 1 1 B X GP0.7 28 500 100 100 L 40 40 1 1 B X GP1.0 2 -500 800 100 R 40 40 1 1 B X GP1.1 3 -500 700 100 R 40 40 1 1 B X GP1.2 4 -500 600 100 R 40 40 1 1 B X GP1.3 5 -500 500 100 R 40 40 1 1 B X GP1.4 7 -500 400 100 R 40 40 1 1 B X GP1.5 11 -500 300 100 R 40 40 1 1 B X GP1.6 12 -500 200 100 R 40 40 1 1 B X GP1.7 13 -500 100 100 R 40 40 1 1 B X INT# 6 500 -400 100 L 40 40 1 1 O X SCL 14 -500 -100 100 R 40 40 1 1 I X SDA 15 -500 -200 100 R 40 40 1 1 B X TP 10 500 -200 100 L 40 40 1 1 O X VDD 20 -500 -800 100 R 40 40 1 1 W X VSS 1 500 -600 100 L 40 40 1 1 W X VSS@1 8 500 -700 100 L 40 40 1 1 W X VSS@2 19 500 -800 100 L 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: MCP23016SO # Package Name: SO-28W # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MCP23016SO IC 0 40 Y Y 1 L N # Gate Name: A # Symbol Name: MCP23016 F0 "IC" -400 940 50 H V L B F1 "MCP23016SO" -400 -1020 50 H V L B F2 "microchip-dspic-SO-28W" 0 150 50 H I C C DRAW P 2 1 0 0 -400 900 -400 -900 P 2 1 0 0 -400 -900 400 -900 P 2 1 0 0 400 -900 400 900 P 2 1 0 0 400 900 -400 900 X A0 16 -500 -400 100 R 40 40 1 1 I X A1 17 -500 -500 100 R 40 40 1 1 I X A2 18 -500 -600 100 R 40 40 1 1 I X CLK 9 500 -100 100 L 40 40 1 1 I X GP0.0 21 500 800 100 L 40 40 1 1 B X GP0.1 22 500 700 100 L 40 40 1 1 B X GP0.2 23 500 600 100 L 40 40 1 1 B X GP0.3 24 500 500 100 L 40 40 1 1 B X GP0.4 25 500 400 100 L 40 40 1 1 B X GP0.5 26 500 300 100 L 40 40 1 1 B X GP0.6 27 500 200 100 L 40 40 1 1 B X GP0.7 28 500 100 100 L 40 40 1 1 B X GP1.0 2 -500 800 100 R 40 40 1 1 B X GP1.1 3 -500 700 100 R 40 40 1 1 B X GP1.2 4 -500 600 100 R 40 40 1 1 B X GP1.3 5 -500 500 100 R 40 40 1 1 B X GP1.4 7 -500 400 100 R 40 40 1 1 B X GP1.5 11 -500 300 100 R 40 40 1 1 B X GP1.6 12 -500 200 100 R 40 40 1 1 B X GP1.7 13 -500 100 100 R 40 40 1 1 B X INT# 6 500 -400 100 L 40 40 1 1 O X SCL 14 -500 -100 100 R 40 40 1 1 I X SDA 15 -500 -200 100 R 40 40 1 1 B X TP 10 500 -200 100 L 40 40 1 1 O X VDD 20 -500 -800 100 R 40 40 1 1 W X VSS 1 500 -600 100 L 40 40 1 1 W X VSS@1 8 500 -700 100 L 40 40 1 1 W X VSS@2 19 500 -800 100 L 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: MCP23016SS # Package Name: SSOP28 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF MCP23016SS IC 0 40 Y Y 1 L N # Gate Name: A # Symbol Name: MCP23016 F0 "IC" -400 940 50 H V L B F1 "MCP23016SS" -400 -1020 50 H V L B F2 "microchip-dspic-SSOP28" 0 150 50 H I C C DRAW P 2 1 0 0 -400 900 -400 -900 P 2 1 0 0 -400 -900 400 -900 P 2 1 0 0 400 -900 400 900 P 2 1 0 0 400 900 -400 900 X A0 16 -500 -400 100 R 40 40 1 1 I X A1 17 -500 -500 100 R 40 40 1 1 I X A2 18 -500 -600 100 R 40 40 1 1 I X CLK 9 500 -100 100 L 40 40 1 1 I X GP0.0 21 500 800 100 L 40 40 1 1 B X GP0.1 22 500 700 100 L 40 40 1 1 B X GP0.2 23 500 600 100 L 40 40 1 1 B X GP0.3 24 500 500 100 L 40 40 1 1 B X GP0.4 25 500 400 100 L 40 40 1 1 B X GP0.5 26 500 300 100 L 40 40 1 1 B X GP0.6 27 500 200 100 L 40 40 1 1 B X GP0.7 28 500 100 100 L 40 40 1 1 B X GP1.0 2 -500 800 100 R 40 40 1 1 B X GP1.1 3 -500 700 100 R 40 40 1 1 B X GP1.2 4 -500 600 100 R 40 40 1 1 B X GP1.3 5 -500 500 100 R 40 40 1 1 B X GP1.4 7 -500 400 100 R 40 40 1 1 B X GP1.5 11 -500 300 100 R 40 40 1 1 B X GP1.6 12 -500 200 100 R 40 40 1 1 B X GP1.7 13 -500 100 100 R 40 40 1 1 B X INT# 6 500 -400 100 L 40 40 1 1 O X SCL 14 -500 -100 100 R 40 40 1 1 I X SDA 15 -500 -200 100 R 40 40 1 1 B X TP 10 500 -200 100 L 40 40 1 1 O X VDD 20 -500 -800 100 R 40 40 1 1 W X VSS 1 500 -600 100 L 40 40 1 1 W X VSS@1 8 500 -700 100 L 40 40 1 1 W X VSS@2 19 500 -800 100 L 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: PIC18F2445SO # Package Name: SO-28W # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF PIC18F2445SO IC 0 40 Y Y 1 L N # Gate Name: A # Symbol Name: PIC18F2445/2550 F0 "IC" -1100 900 50 H V L B F1 "PIC18F2445SO" -1100 -1000 50 H V L B F2 "microchip-dspic-SO-28W" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 800 -1100 -800 P 2 1 0 0 -1100 -800 1100 -800 P 2 1 0 0 1100 -800 1100 800 P 2 1 0 0 1100 800 -1100 800 X CCP1/RC2 13 1200 500 100 L 40 40 1 1 B X CK/TX/RC6 17 1200 200 100 L 40 40 1 1 B X CLKIN/OSC1 9 1200 -400 100 L 40 40 1 1 I X RA0/AN0 2 -1200 700 100 R 40 40 1 1 B X RA1/AN1 3 -1200 600 100 R 40 40 1 1 B X RA2/AN2/VR-/CVREF 4 -1200 500 100 R 40 40 1 1 B X RA3/AN3/VR+ 5 -1200 400 100 R 40 40 1 1 B X RA4/T0CKI/C1OUT/RCV 6 -1200 300 100 R 40 40 1 1 B X RA5/AN4/SS/HLVDIN/C2OUT 7 -1200 200 100 R 40 40 1 1 B X RA6/CLKO/OSC2 10 1200 -300 100 L 40 40 1 1 B X RB0/SDA/SDI/AN12/INT0/FLT0 21 -1200 0 100 R 40 40 1 1 B X RB1/SCL/SCK/AN10/INT1 22 -1200 -100 100 R 40 40 1 1 B X RB2/AN8/INT2/VMO 23 -1200 -200 100 R 40 40 1 1 B X RB3/AN9/CCP2/VPO 24 -1200 -300 100 R 40 40 1 1 B X RB4/AN11/KBI0 25 -1200 -400 100 R 40 40 1 1 B X RB5/KBI1/PGM 26 -1200 -500 100 R 40 40 1 1 B X RB6/KBI2/PGC 27 -1200 -600 100 R 40 40 1 1 B X RB7/KBI3/PGD 28 -1200 -700 100 R 40 40 1 1 B X RE3/VPP/MCLR 1 1200 -100 100 L 40 40 1 1 B X SDO/DT/RX/RC7 18 1200 100 100 L 40 40 1 1 B X T13CKI/T1OSO/RC0 11 1200 700 100 L 40 40 1 1 B X UOE/CCP2/T1OSI/RC1 12 1200 600 100 L 40 40 1 1 B X VDD 20 0 900 100 D 40 40 1 1 W X VM/D-/RC4 15 1200 400 100 L 40 40 1 1 B X VP/D+/RC5 16 1200 300 100 L 40 40 1 1 B X VSS 8 200 -900 100 U 40 40 1 1 W X VSS@1 19 300 -900 100 U 40 40 1 1 W X VUSB 14 1200 -600 100 L 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: PIC18F2445SP # Package Name: DIL28-3 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF PIC18F2445SP IC 0 40 Y Y 1 L N # Gate Name: A # Symbol Name: PIC18F2445/2550 F0 "IC" -1100 900 50 H V L B F1 "PIC18F2445SP" -1100 -1000 50 H V L B F2 "microchip-dspic-DIL28-3" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 800 -1100 -800 P 2 1 0 0 -1100 -800 1100 -800 P 2 1 0 0 1100 -800 1100 800 P 2 1 0 0 1100 800 -1100 800 X CCP1/RC2 13 1200 500 100 L 40 40 1 1 B X CK/TX/RC6 17 1200 200 100 L 40 40 1 1 B X CLKIN/OSC1 9 1200 -400 100 L 40 40 1 1 I X RA0/AN0 2 -1200 700 100 R 40 40 1 1 B X RA1/AN1 3 -1200 600 100 R 40 40 1 1 B X RA2/AN2/VR-/CVREF 4 -1200 500 100 R 40 40 1 1 B X RA3/AN3/VR+ 5 -1200 400 100 R 40 40 1 1 B X RA4/T0CKI/C1OUT/RCV 6 -1200 300 100 R 40 40 1 1 B X RA5/AN4/SS/HLVDIN/C2OUT 7 -1200 200 100 R 40 40 1 1 B X RA6/CLKO/OSC2 10 1200 -300 100 L 40 40 1 1 B X RB0/SDA/SDI/AN12/INT0/FLT0 21 -1200 0 100 R 40 40 1 1 B X RB1/SCL/SCK/AN10/INT1 22 -1200 -100 100 R 40 40 1 1 B X RB2/AN8/INT2/VMO 23 -1200 -200 100 R 40 40 1 1 B X RB3/AN9/CCP2/VPO 24 -1200 -300 100 R 40 40 1 1 B X RB4/AN11/KBI0 25 -1200 -400 100 R 40 40 1 1 B X RB5/KBI1/PGM 26 -1200 -500 100 R 40 40 1 1 B X RB6/KBI2/PGC 27 -1200 -600 100 R 40 40 1 1 B X RB7/KBI3/PGD 28 -1200 -700 100 R 40 40 1 1 B X RE3/VPP/MCLR 1 1200 -100 100 L 40 40 1 1 B X SDO/DT/RX/RC7 18 1200 100 100 L 40 40 1 1 B X T13CKI/T1OSO/RC0 11 1200 700 100 L 40 40 1 1 B X UOE/CCP2/T1OSI/RC1 12 1200 600 100 L 40 40 1 1 B X VDD 20 0 900 100 D 40 40 1 1 W X VM/D-/RC4 15 1200 400 100 L 40 40 1 1 B X VP/D+/RC5 16 1200 300 100 L 40 40 1 1 B X VSS 8 200 -900 100 U 40 40 1 1 W X VSS@1 19 300 -900 100 U 40 40 1 1 W X VUSB 14 1200 -600 100 L 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: PIC18F2550SO # Package Name: SO-28W # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF PIC18F2550SO IC 0 40 Y Y 1 L N # Gate Name: A # Symbol Name: PIC18F2445/2550 F0 "IC" -1100 900 50 H V L B F1 "PIC18F2550SO" -1100 -1000 50 H V L B F2 "microchip-dspic-SO-28W" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 800 -1100 -800 P 2 1 0 0 -1100 -800 1100 -800 P 2 1 0 0 1100 -800 1100 800 P 2 1 0 0 1100 800 -1100 800 X CCP1/RC2 13 1200 500 100 L 40 40 1 1 B X CK/TX/RC6 17 1200 200 100 L 40 40 1 1 B X CLKIN/OSC1 9 1200 -400 100 L 40 40 1 1 I X RA0/AN0 2 -1200 700 100 R 40 40 1 1 B X RA1/AN1 3 -1200 600 100 R 40 40 1 1 B X RA2/AN2/VR-/CVREF 4 -1200 500 100 R 40 40 1 1 B X RA3/AN3/VR+ 5 -1200 400 100 R 40 40 1 1 B X RA4/T0CKI/C1OUT/RCV 6 -1200 300 100 R 40 40 1 1 B X RA5/AN4/SS/HLVDIN/C2OUT 7 -1200 200 100 R 40 40 1 1 B X RA6/CLKO/OSC2 10 1200 -300 100 L 40 40 1 1 B X RB0/SDA/SDI/AN12/INT0/FLT0 21 -1200 0 100 R 40 40 1 1 B X RB1/SCL/SCK/AN10/INT1 22 -1200 -100 100 R 40 40 1 1 B X RB2/AN8/INT2/VMO 23 -1200 -200 100 R 40 40 1 1 B X RB3/AN9/CCP2/VPO 24 -1200 -300 100 R 40 40 1 1 B X RB4/AN11/KBI0 25 -1200 -400 100 R 40 40 1 1 B X RB5/KBI1/PGM 26 -1200 -500 100 R 40 40 1 1 B X RB6/KBI2/PGC 27 -1200 -600 100 R 40 40 1 1 B X RB7/KBI3/PGD 28 -1200 -700 100 R 40 40 1 1 B X RE3/VPP/MCLR 1 1200 -100 100 L 40 40 1 1 B X SDO/DT/RX/RC7 18 1200 100 100 L 40 40 1 1 B X T13CKI/T1OSO/RC0 11 1200 700 100 L 40 40 1 1 B X UOE/CCP2/T1OSI/RC1 12 1200 600 100 L 40 40 1 1 B X VDD 20 0 900 100 D 40 40 1 1 W X VM/D-/RC4 15 1200 400 100 L 40 40 1 1 B X VP/D+/RC5 16 1200 300 100 L 40 40 1 1 B X VSS 8 200 -900 100 U 40 40 1 1 W X VSS@1 19 300 -900 100 U 40 40 1 1 W X VUSB 14 1200 -600 100 L 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: PIC18F2550SP # Package Name: DIL28-3 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF PIC18F2550SP IC 0 40 Y Y 1 L N # Gate Name: A # Symbol Name: PIC18F2445/2550 F0 "IC" -1100 900 50 H V L B F1 "PIC18F2550SP" -1100 -1000 50 H V L B F2 "microchip-dspic-DIL28-3" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 800 -1100 -800 P 2 1 0 0 -1100 -800 1100 -800 P 2 1 0 0 1100 -800 1100 800 P 2 1 0 0 1100 800 -1100 800 X CCP1/RC2 13 1200 500 100 L 40 40 1 1 B X CK/TX/RC6 17 1200 200 100 L 40 40 1 1 B X CLKIN/OSC1 9 1200 -400 100 L 40 40 1 1 I X RA0/AN0 2 -1200 700 100 R 40 40 1 1 B X RA1/AN1 3 -1200 600 100 R 40 40 1 1 B X RA2/AN2/VR-/CVREF 4 -1200 500 100 R 40 40 1 1 B X RA3/AN3/VR+ 5 -1200 400 100 R 40 40 1 1 B X RA4/T0CKI/C1OUT/RCV 6 -1200 300 100 R 40 40 1 1 B X RA5/AN4/SS/HLVDIN/C2OUT 7 -1200 200 100 R 40 40 1 1 B X RA6/CLKO/OSC2 10 1200 -300 100 L 40 40 1 1 B X RB0/SDA/SDI/AN12/INT0/FLT0 21 -1200 0 100 R 40 40 1 1 B X RB1/SCL/SCK/AN10/INT1 22 -1200 -100 100 R 40 40 1 1 B X RB2/AN8/INT2/VMO 23 -1200 -200 100 R 40 40 1 1 B X RB3/AN9/CCP2/VPO 24 -1200 -300 100 R 40 40 1 1 B X RB4/AN11/KBI0 25 -1200 -400 100 R 40 40 1 1 B X RB5/KBI1/PGM 26 -1200 -500 100 R 40 40 1 1 B X RB6/KBI2/PGC 27 -1200 -600 100 R 40 40 1 1 B X RB7/KBI3/PGD 28 -1200 -700 100 R 40 40 1 1 B X RE3/VPP/MCLR 1 1200 -100 100 L 40 40 1 1 B X SDO/DT/RX/RC7 18 1200 100 100 L 40 40 1 1 B X T13CKI/T1OSO/RC0 11 1200 700 100 L 40 40 1 1 B X UOE/CCP2/T1OSI/RC1 12 1200 600 100 L 40 40 1 1 B X VDD 20 0 900 100 D 40 40 1 1 W X VM/D-/RC4 15 1200 400 100 L 40 40 1 1 B X VP/D+/RC5 16 1200 300 100 L 40 40 1 1 B X VSS 8 200 -900 100 U 40 40 1 1 W X VSS@1 19 300 -900 100 U 40 40 1 1 W X VUSB 14 1200 -600 100 L 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: PIC18F4455ML # Package Name: QFN44-8X8 # Dev Tech: '' # Dev Prefix: # Gate count = 1 # DEF PIC18F4455ML ?? 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: PIC18F4455/4550 DRAW P 2 1 0 0 -1100 1100 -1100 -1000 P 2 1 0 0 -1100 -1000 1100 -1000 P 2 1 0 0 1100 -1000 1100 1100 P 2 1 0 0 1100 1100 -1100 1100 X CCP1/P1A/RC2 36 1200 600 100 L 40 40 1 1 B X CK/TX/RC6 44 1200 300 100 L 40 40 1 1 B X MCLR/VPP/RE3 18 1200 1000 100 L 40 40 1 1 I X OESPP/AN7/RE2 27 1200 -900 100 L 40 40 1 1 B X OSC1/CLKI 32 -1200 300 100 R 40 40 1 1 I X OSC2/CLKO/RA6 33 -1200 400 100 R 40 40 1 1 B X P1B/SPP5/RD5 3 1200 -500 100 L 40 40 1 1 B X P1C/SPP6/RD6 4 1200 -600 100 L 40 40 1 1 B X P1D/SPP7/RD7 5 1200 -700 100 L 40 40 1 1 B X RA0/AN0 19 -1200 1000 100 R 40 40 1 1 B X RA1/AN1 20 -1200 900 100 R 40 40 1 1 B X RA2/AN2/VR-/CVR 21 -1200 800 100 R 40 40 1 1 B X RA3/AN3/VR+ 22 -1200 700 100 R 40 40 1 1 B X RA4/T0CKI/C1OUT/RCV 23 -1200 600 100 R 40 40 1 1 B X RA5/AN4/SS/HLVDIN/C2OUT 24 -1200 500 100 R 40 40 1 1 B X RB0/AN12/INT0/FLT0/SDI/SDA 9 -1200 100 100 R 40 40 1 1 B X RB1/AN10/INT1/SCK/SCL 10 -1200 0 100 R 40 40 1 1 B X RB2/AN8/INT2/VMO 11 -1200 -100 100 R 40 40 1 1 B X RB3/AN9/CCP2/VPO 12 -1200 -200 100 R 40 40 1 1 B X RB4/KBI0/AN11/CSSPP 14 -1200 -300 100 R 40 40 1 1 B X RB5/KBI1/PGM 15 -1200 -400 100 R 40 40 1 1 B X RB6/KBI2/PGC 16 -1200 -500 100 R 40 40 1 1 B X RB7/KBI3/PGD 17 -1200 -600 100 R 40 40 1 1 B X RE0/AN5/CK1SPP 25 -1200 -800 100 R 40 40 1 1 B X RE1/AN6/CK2SPP 26 -1200 -900 100 R 40 40 1 1 B X SDO/DT/RX/RC7 1 1200 200 100 L 40 40 1 1 B X SPP0/RD0 38 1200 0 100 L 40 40 1 1 B X SPP1/RD1 39 1200 -100 100 L 40 40 1 1 B X SPP2/RD2 40 1200 -200 100 L 40 40 1 1 B X SPP3/RD3 41 1200 -300 100 L 40 40 1 1 B X SPP4/RD4 2 1200 -400 100 L 40 40 1 1 B X T13CKI/T1OSO/RC0 34 1200 800 100 L 40 40 1 1 B X UOE/CCP2/T1OSI/RC1 35 1200 700 100 L 40 40 1 1 B X VDD 8 -200 1200 100 D 40 40 1 1 W X VDD@1 29 -100 1200 100 D 40 40 1 1 W X VM/D-/RC4 42 1200 500 100 L 40 40 1 1 B X VP/D+/RC5 43 1200 400 100 L 40 40 1 1 B X VSS 6 0 -1100 100 U 40 40 1 1 W X VSS@1 31 100 -1100 100 U 40 40 1 1 W X VUSB 37 0 1200 100 D 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: PIC18F4455SP # Package Name: DIL40 # Dev Tech: '' # Dev Prefix: # Gate count = 1 # DEF PIC18F4455SP ?? 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: PIC18F4455/4550 DRAW P 2 1 0 0 -1100 1100 -1100 -1000 P 2 1 0 0 -1100 -1000 1100 -1000 P 2 1 0 0 1100 -1000 1100 1100 P 2 1 0 0 1100 1100 -1100 1100 X CCP1/P1A/RC2 17 1200 600 100 L 40 40 1 1 B X CK/TX/RC6 25 1200 300 100 L 40 40 1 1 B X MCLR/VPP/RE3 1 1200 1000 100 L 40 40 1 1 I X OESPP/AN7/RE2 10 1200 -900 100 L 40 40 1 1 B X OSC1/CLKI 13 -1200 300 100 R 40 40 1 1 I X OSC2/CLKO/RA6 14 -1200 400 100 R 40 40 1 1 B X P1B/SPP5/RD5 28 1200 -500 100 L 40 40 1 1 B X P1C/SPP6/RD6 29 1200 -600 100 L 40 40 1 1 B X P1D/SPP7/RD7 30 1200 -700 100 L 40 40 1 1 B X RA0/AN0 2 -1200 1000 100 R 40 40 1 1 B X RA1/AN1 3 -1200 900 100 R 40 40 1 1 B X RA2/AN2/VR-/CVR 4 -1200 800 100 R 40 40 1 1 B X RA3/AN3/VR+ 5 -1200 700 100 R 40 40 1 1 B X RA4/T0CKI/C1OUT/RCV 6 -1200 600 100 R 40 40 1 1 B X RA5/AN4/SS/HLVDIN/C2OUT 7 -1200 500 100 R 40 40 1 1 B X RB0/AN12/INT0/FLT0/SDI/SDA 33 -1200 100 100 R 40 40 1 1 B X RB1/AN10/INT1/SCK/SCL 34 -1200 0 100 R 40 40 1 1 B X RB2/AN8/INT2/VMO 35 -1200 -100 100 R 40 40 1 1 B X RB3/AN9/CCP2/VPO 36 -1200 -200 100 R 40 40 1 1 B X RB4/KBI0/AN11/CSSPP 37 -1200 -300 100 R 40 40 1 1 B X RB5/KBI1/PGM 38 -1200 -400 100 R 40 40 1 1 B X RB6/KBI2/PGC 39 -1200 -500 100 R 40 40 1 1 B X RB7/KBI3/PGD 40 -1200 -600 100 R 40 40 1 1 B X RE0/AN5/CK1SPP 8 -1200 -800 100 R 40 40 1 1 B X RE1/AN6/CK2SPP 9 -1200 -900 100 R 40 40 1 1 B X SDO/DT/RX/RC7 26 1200 200 100 L 40 40 1 1 B X SPP0/RD0 19 1200 0 100 L 40 40 1 1 B X SPP1/RD1 20 1200 -100 100 L 40 40 1 1 B X SPP2/RD2 21 1200 -200 100 L 40 40 1 1 B X SPP3/RD3 22 1200 -300 100 L 40 40 1 1 B X SPP4/RD4 27 1200 -400 100 L 40 40 1 1 B X T13CKI/T1OSO/RC0 15 1200 800 100 L 40 40 1 1 B X UOE/CCP2/T1OSI/RC1 16 1200 700 100 L 40 40 1 1 B X VDD 11 -200 1200 100 D 40 40 1 1 W X VDD@1 32 -100 1200 100 D 40 40 1 1 W X VM/D-/RC4 23 1200 500 100 L 40 40 1 1 B X VP/D+/RC5 24 1200 400 100 L 40 40 1 1 B X VSS 12 0 -1100 100 U 40 40 1 1 W X VSS@1 31 100 -1100 100 U 40 40 1 1 W X VUSB 18 0 1200 100 D 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: PIC18F4455TQ-44 # Package Name: TQFP44 # Dev Tech: '' # Dev Prefix: # Gate count = 1 # DEF PIC18F4455TQ-44 ?? 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: PIC18F4455/4550 DRAW P 2 1 0 0 -1100 1100 -1100 -1000 P 2 1 0 0 -1100 -1000 1100 -1000 P 2 1 0 0 1100 -1000 1100 1100 P 2 1 0 0 1100 1100 -1100 1100 X CCP1/P1A/RC2 36 1200 600 100 L 40 40 1 1 B X CK/TX/RC6 44 1200 300 100 L 40 40 1 1 B X MCLR/VPP/RE3 18 1200 1000 100 L 40 40 1 1 I X OESPP/AN7/RE2 27 1200 -900 100 L 40 40 1 1 B X OSC1/CLKI 30 -1200 300 100 R 40 40 1 1 I X OSC2/CLKO/RA6 31 -1200 400 100 R 40 40 1 1 B X P1B/SPP5/RD5 3 1200 -500 100 L 40 40 1 1 B X P1C/SPP6/RD6 4 1200 -600 100 L 40 40 1 1 B X P1D/SPP7/RD7 5 1200 -700 100 L 40 40 1 1 B X RA0/AN0 19 -1200 1000 100 R 40 40 1 1 B X RA1/AN1 20 -1200 900 100 R 40 40 1 1 B X RA2/AN2/VR-/CVR 21 -1200 800 100 R 40 40 1 1 B X RA3/AN3/VR+ 22 -1200 700 100 R 40 40 1 1 B X RA4/T0CKI/C1OUT/RCV 23 -1200 600 100 R 40 40 1 1 B X RA5/AN4/SS/HLVDIN/C2OUT 24 -1200 500 100 R 40 40 1 1 B X RB0/AN12/INT0/FLT0/SDI/SDA 8 -1200 100 100 R 40 40 1 1 B X RB1/AN10/INT1/SCK/SCL 9 -1200 0 100 R 40 40 1 1 B X RB2/AN8/INT2/VMO 10 -1200 -100 100 R 40 40 1 1 B X RB3/AN9/CCP2/VPO 11 -1200 -200 100 R 40 40 1 1 B X RB4/KBI0/AN11/CSSPP 14 -1200 -300 100 R 40 40 1 1 B X RB5/KBI1/PGM 15 -1200 -400 100 R 40 40 1 1 B X RB6/KBI2/PGC 16 -1200 -500 100 R 40 40 1 1 B X RB7/KBI3/PGD 17 -1200 -600 100 R 40 40 1 1 B X RE0/AN5/CK1SPP 25 -1200 -800 100 R 40 40 1 1 B X RE1/AN6/CK2SPP 26 -1200 -900 100 R 40 40 1 1 B X SDO/DT/RX/RC7 1 1200 200 100 L 40 40 1 1 B X SPP0/RD0 38 1200 0 100 L 40 40 1 1 B X SPP1/RD1 39 1200 -100 100 L 40 40 1 1 B X SPP2/RD2 40 1200 -200 100 L 40 40 1 1 B X SPP3/RD3 41 1200 -300 100 L 40 40 1 1 B X SPP4/RD4 2 1200 -400 100 L 40 40 1 1 B X T13CKI/T1OSO/RC0 32 1200 800 100 L 40 40 1 1 B X UOE/CCP2/T1OSI/RC1 35 1200 700 100 L 40 40 1 1 B X VDD 7 -200 1200 100 D 40 40 1 1 W X VDD@1 28 -100 1200 100 D 40 40 1 1 W X VM/D-/RC4 42 1200 500 100 L 40 40 1 1 B X VP/D+/RC5 43 1200 400 100 L 40 40 1 1 B X VSS 6 0 -1100 100 U 40 40 1 1 W X VSS@1 29 100 -1100 100 U 40 40 1 1 W X VUSB 37 0 1200 100 D 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: PIC18F4550ML # Package Name: QFN44-8X8 # Dev Tech: '' # Dev Prefix: # Gate count = 1 # DEF PIC18F4550ML ?? 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: PIC18F4455/4550 DRAW P 2 1 0 0 -1100 1100 -1100 -1000 P 2 1 0 0 -1100 -1000 1100 -1000 P 2 1 0 0 1100 -1000 1100 1100 P 2 1 0 0 1100 1100 -1100 1100 X CCP1/P1A/RC2 36 1200 600 100 L 40 40 1 1 B X CK/TX/RC6 44 1200 300 100 L 40 40 1 1 B X MCLR/VPP/RE3 18 1200 1000 100 L 40 40 1 1 I X OESPP/AN7/RE2 27 1200 -900 100 L 40 40 1 1 B X OSC1/CLKI 32 -1200 300 100 R 40 40 1 1 I X OSC2/CLKO/RA6 33 -1200 400 100 R 40 40 1 1 B X P1B/SPP5/RD5 3 1200 -500 100 L 40 40 1 1 B X P1C/SPP6/RD6 4 1200 -600 100 L 40 40 1 1 B X P1D/SPP7/RD7 5 1200 -700 100 L 40 40 1 1 B X RA0/AN0 19 -1200 1000 100 R 40 40 1 1 B X RA1/AN1 20 -1200 900 100 R 40 40 1 1 B X RA2/AN2/VR-/CVR 21 -1200 800 100 R 40 40 1 1 B X RA3/AN3/VR+ 22 -1200 700 100 R 40 40 1 1 B X RA4/T0CKI/C1OUT/RCV 23 -1200 600 100 R 40 40 1 1 B X RA5/AN4/SS/HLVDIN/C2OUT 24 -1200 500 100 R 40 40 1 1 B X RB0/AN12/INT0/FLT0/SDI/SDA 9 -1200 100 100 R 40 40 1 1 B X RB1/AN10/INT1/SCK/SCL 10 -1200 0 100 R 40 40 1 1 B X RB2/AN8/INT2/VMO 11 -1200 -100 100 R 40 40 1 1 B X RB3/AN9/CCP2/VPO 12 -1200 -200 100 R 40 40 1 1 B X RB4/KBI0/AN11/CSSPP 14 -1200 -300 100 R 40 40 1 1 B X RB5/KBI1/PGM 15 -1200 -400 100 R 40 40 1 1 B X RB6/KBI2/PGC 16 -1200 -500 100 R 40 40 1 1 B X RB7/KBI3/PGD 17 -1200 -600 100 R 40 40 1 1 B X RE0/AN5/CK1SPP 25 -1200 -800 100 R 40 40 1 1 B X RE1/AN6/CK2SPP 26 -1200 -900 100 R 40 40 1 1 B X SDO/DT/RX/RC7 1 1200 200 100 L 40 40 1 1 B X SPP0/RD0 38 1200 0 100 L 40 40 1 1 B X SPP1/RD1 39 1200 -100 100 L 40 40 1 1 B X SPP2/RD2 40 1200 -200 100 L 40 40 1 1 B X SPP3/RD3 41 1200 -300 100 L 40 40 1 1 B X SPP4/RD4 2 1200 -400 100 L 40 40 1 1 B X T13CKI/T1OSO/RC0 34 1200 800 100 L 40 40 1 1 B X UOE/CCP2/T1OSI/RC1 35 1200 700 100 L 40 40 1 1 B X VDD 8 -200 1200 100 D 40 40 1 1 W X VDD@1 29 -100 1200 100 D 40 40 1 1 W X VM/D-/RC4 42 1200 500 100 L 40 40 1 1 B X VP/D+/RC5 43 1200 400 100 L 40 40 1 1 B X VSS 6 0 -1100 100 U 40 40 1 1 W X VSS@1 31 100 -1100 100 U 40 40 1 1 W X VUSB 37 0 1200 100 D 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: PIC18F4550SP # Package Name: DIL40 # Dev Tech: '' # Dev Prefix: # Gate count = 1 # DEF PIC18F4550SP ?? 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: PIC18F4455/4550 DRAW P 2 1 0 0 -1100 1100 -1100 -1000 P 2 1 0 0 -1100 -1000 1100 -1000 P 2 1 0 0 1100 -1000 1100 1100 P 2 1 0 0 1100 1100 -1100 1100 X CCP1/P1A/RC2 17 1200 600 100 L 40 40 1 1 B X CK/TX/RC6 25 1200 300 100 L 40 40 1 1 B X MCLR/VPP/RE3 1 1200 1000 100 L 40 40 1 1 I X OESPP/AN7/RE2 10 1200 -900 100 L 40 40 1 1 B X OSC1/CLKI 13 -1200 300 100 R 40 40 1 1 I X OSC2/CLKO/RA6 14 -1200 400 100 R 40 40 1 1 B X P1B/SPP5/RD5 28 1200 -500 100 L 40 40 1 1 B X P1C/SPP6/RD6 29 1200 -600 100 L 40 40 1 1 B X P1D/SPP7/RD7 30 1200 -700 100 L 40 40 1 1 B X RA0/AN0 2 -1200 1000 100 R 40 40 1 1 B X RA1/AN1 3 -1200 900 100 R 40 40 1 1 B X RA2/AN2/VR-/CVR 4 -1200 800 100 R 40 40 1 1 B X RA3/AN3/VR+ 5 -1200 700 100 R 40 40 1 1 B X RA4/T0CKI/C1OUT/RCV 6 -1200 600 100 R 40 40 1 1 B X RA5/AN4/SS/HLVDIN/C2OUT 7 -1200 500 100 R 40 40 1 1 B X RB0/AN12/INT0/FLT0/SDI/SDA 33 -1200 100 100 R 40 40 1 1 B X RB1/AN10/INT1/SCK/SCL 34 -1200 0 100 R 40 40 1 1 B X RB2/AN8/INT2/VMO 35 -1200 -100 100 R 40 40 1 1 B X RB3/AN9/CCP2/VPO 36 -1200 -200 100 R 40 40 1 1 B X RB4/KBI0/AN11/CSSPP 37 -1200 -300 100 R 40 40 1 1 B X RB5/KBI1/PGM 38 -1200 -400 100 R 40 40 1 1 B X RB6/KBI2/PGC 39 -1200 -500 100 R 40 40 1 1 B X RB7/KBI3/PGD 40 -1200 -600 100 R 40 40 1 1 B X RE0/AN5/CK1SPP 8 -1200 -800 100 R 40 40 1 1 B X RE1/AN6/CK2SPP 9 -1200 -900 100 R 40 40 1 1 B X SDO/DT/RX/RC7 26 1200 200 100 L 40 40 1 1 B X SPP0/RD0 19 1200 0 100 L 40 40 1 1 B X SPP1/RD1 20 1200 -100 100 L 40 40 1 1 B X SPP2/RD2 21 1200 -200 100 L 40 40 1 1 B X SPP3/RD3 22 1200 -300 100 L 40 40 1 1 B X SPP4/RD4 27 1200 -400 100 L 40 40 1 1 B X T13CKI/T1OSO/RC0 15 1200 800 100 L 40 40 1 1 B X UOE/CCP2/T1OSI/RC1 16 1200 700 100 L 40 40 1 1 B X VDD 11 -200 1200 100 D 40 40 1 1 W X VDD@1 32 -100 1200 100 D 40 40 1 1 W X VM/D-/RC4 23 1200 500 100 L 40 40 1 1 B X VP/D+/RC5 24 1200 400 100 L 40 40 1 1 B X VSS 12 0 -1100 100 U 40 40 1 1 W X VSS@1 31 100 -1100 100 U 40 40 1 1 W X VUSB 18 0 1200 100 D 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: PIC18F4550TQ-44 # Package Name: TQFP44 # Dev Tech: '' # Dev Prefix: # Gate count = 1 # DEF PIC18F4550TQ-44 ?? 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: PIC18F4455/4550 DRAW P 2 1 0 0 -1100 1100 -1100 -1000 P 2 1 0 0 -1100 -1000 1100 -1000 P 2 1 0 0 1100 -1000 1100 1100 P 2 1 0 0 1100 1100 -1100 1100 X CCP1/P1A/RC2 36 1200 600 100 L 40 40 1 1 B X CK/TX/RC6 44 1200 300 100 L 40 40 1 1 B X MCLR/VPP/RE3 18 1200 1000 100 L 40 40 1 1 I X OESPP/AN7/RE2 27 1200 -900 100 L 40 40 1 1 B X OSC1/CLKI 30 -1200 300 100 R 40 40 1 1 I X OSC2/CLKO/RA6 31 -1200 400 100 R 40 40 1 1 B X P1B/SPP5/RD5 3 1200 -500 100 L 40 40 1 1 B X P1C/SPP6/RD6 4 1200 -600 100 L 40 40 1 1 B X P1D/SPP7/RD7 5 1200 -700 100 L 40 40 1 1 B X RA0/AN0 19 -1200 1000 100 R 40 40 1 1 B X RA1/AN1 20 -1200 900 100 R 40 40 1 1 B X RA2/AN2/VR-/CVR 21 -1200 800 100 R 40 40 1 1 B X RA3/AN3/VR+ 22 -1200 700 100 R 40 40 1 1 B X RA4/T0CKI/C1OUT/RCV 23 -1200 600 100 R 40 40 1 1 B X RA5/AN4/SS/HLVDIN/C2OUT 24 -1200 500 100 R 40 40 1 1 B X RB0/AN12/INT0/FLT0/SDI/SDA 8 -1200 100 100 R 40 40 1 1 B X RB1/AN10/INT1/SCK/SCL 9 -1200 0 100 R 40 40 1 1 B X RB2/AN8/INT2/VMO 10 -1200 -100 100 R 40 40 1 1 B X RB3/AN9/CCP2/VPO 11 -1200 -200 100 R 40 40 1 1 B X RB4/KBI0/AN11/CSSPP 14 -1200 -300 100 R 40 40 1 1 B X RB5/KBI1/PGM 15 -1200 -400 100 R 40 40 1 1 B X RB6/KBI2/PGC 16 -1200 -500 100 R 40 40 1 1 B X RB7/KBI3/PGD 17 -1200 -600 100 R 40 40 1 1 B X RE0/AN5/CK1SPP 25 -1200 -800 100 R 40 40 1 1 B X RE1/AN6/CK2SPP 26 -1200 -900 100 R 40 40 1 1 B X SDO/DT/RX/RC7 1 1200 200 100 L 40 40 1 1 B X SPP0/RD0 38 1200 0 100 L 40 40 1 1 B X SPP1/RD1 39 1200 -100 100 L 40 40 1 1 B X SPP2/RD2 40 1200 -200 100 L 40 40 1 1 B X SPP3/RD3 41 1200 -300 100 L 40 40 1 1 B X SPP4/RD4 2 1200 -400 100 L 40 40 1 1 B X T13CKI/T1OSO/RC0 32 1200 800 100 L 40 40 1 1 B X UOE/CCP2/T1OSI/RC1 35 1200 700 100 L 40 40 1 1 B X VDD 7 -200 1200 100 D 40 40 1 1 W X VDD@1 28 -100 1200 100 D 40 40 1 1 W X VM/D-/RC4 42 1200 500 100 L 40 40 1 1 B X VP/D+/RC5 43 1200 400 100 L 40 40 1 1 B X VSS 6 0 -1100 100 U 40 40 1 1 W X VSS@1 29 100 -1100 100 U 40 40 1 1 W X VUSB 37 0 1200 100 D 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: PIC18F6680TQ-64 # Package Name: TQFP64-10X10 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF PIC18F6680TQ-64 IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: PIC18F6680 F0 "IC" -1000 1800 50 H V L B F1 "PIC18F6680TQ-64" 0 0 50 H V L B F2 "microchip-dspic-TQFP64-10X10" 0 150 50 H I C C DRAW P 2 1 0 0 -1000 1700 1000 1700 P 2 1 0 0 1000 1700 1000 -1600 P 2 1 0 0 1000 -1600 -1000 -1600 P 2 1 0 0 -1000 -1600 -1000 1700 T 1 25 250 150 0 1 0 PIC18F6680 X AN5/RF0 18 1100 -200 100 L 40 40 1 1 B X AN6/C2O/RF1 17 1100 -300 100 L 40 40 1 1 B X AN7/C1O/RF2 16 1100 -400 100 L 40 40 1 1 B X AN8/C2I+/RF3 15 1100 -500 100 L 40 40 1 1 B X AN9/C2I-/RF4 14 1100 -600 100 L 40 40 1 1 B X AN10/C1I+/CVR/RF5 13 1100 -700 100 L 40 40 1 1 B X AN11/C1I-/RF6 12 1100 -800 100 L 40 40 1 1 B X AVDD 19 300 1800 100 D 40 40 1 1 W X AVSS 20 300 -1700 100 U 40 40 1 1 W X CCP2/RE7 59 1100 0 100 L 40 40 1 1 B X CLKI/OSC1 39 1100 -1100 100 L 40 40 1 1 I X CLKO/RA6/OSC2 40 1100 -1200 100 L 40 40 1 1 O X CS/RE2 64 1100 500 100 L 40 40 1 1 B X P1B/RE6 60 1100 100 100 L 40 40 1 1 B X P1C/RE5 61 1100 200 100 L 40 40 1 1 B X PSP0/RD0 58 1100 1600 100 L 40 40 1 1 B X PSP1/RD1 55 1100 1500 100 L 40 40 1 1 B X PSP2/RD2 54 1100 1400 100 L 40 40 1 1 B X PSP3/RD3 53 1100 1300 100 L 40 40 1 1 B X PSP4/RD4 52 1100 1200 100 L 40 40 1 1 B X PSP5/RD5 51 1100 1100 100 L 40 40 1 1 B X PSP6/RD6 50 1100 1000 100 L 40 40 1 1 B X PSP7/RD7 49 1100 900 100 L 40 40 1 1 B X RA0/AN0 24 -1100 1600 100 R 40 40 1 1 B X RA1/AN1 23 -1100 1500 100 R 40 40 1 1 B X RA2/AN2/VR- 22 -1100 1400 100 R 40 40 1 1 B X RA3/AN3/VR+ 21 -1100 1300 100 R 40 40 1 1 B X RA4/T0CKI 28 -1100 1200 100 R 40 40 1 1 B X RA5/AN4/LVDIN 27 -1100 1100 100 R 40 40 1 1 B X RB0/INT0 48 -1100 900 100 R 40 40 1 1 B X RB1/INT1 47 -1100 800 100 R 40 40 1 1 B X RB2/INT2 46 -1100 700 100 R 40 40 1 1 B X RB3/INT3 45 -1100 600 100 R 40 40 1 1 B X RB4/KBI0 44 -1100 500 100 R 40 40 1 1 B X RB5/KBI1/PGM 43 -1100 -1300 100 R 40 40 1 1 B X RB6/KBI2/PGC 42 -1100 -1400 100 R 40 40 1 1 B X RB7/KBI3/PGD 37 -1100 -1500 100 R 40 40 1 1 B X RC0/T1O/T13C 30 -1100 300 100 R 40 40 1 1 B X RC1/T1I/CCP2 29 -1100 200 100 R 40 40 1 1 B X RC2/CCP1/P1A 33 -1100 100 100 R 40 40 1 1 B X RC3/SCK/SCL 34 -1100 0 100 R 40 40 1 1 B X RC4/SDI/SDA 35 -1100 -100 100 R 40 40 1 1 B X RC5/SDO 36 -1100 -200 100 R 40 40 1 1 B X RC6/TX/CK 31 -1100 -300 100 R 40 40 1 1 B X RC7/RX/DT 32 -1100 -400 100 R 40 40 1 1 B X RD/RE0 2 1100 700 100 L 40 40 1 1 B X RE3 63 1100 400 100 L 40 40 1 1 B X RE4 62 1100 300 100 L 40 40 1 1 B X RG0/CANTX1 3 -1100 -600 100 R 40 40 1 1 B X RG1/CANTX2 4 -1100 -700 100 R 40 40 1 1 B X RG2/CANRX 5 -1100 -800 100 R 40 40 1 1 B X RG3 6 -1100 -900 100 R 40 40 1 1 B X RG4/P1D 8 -1100 -1000 100 R 40 40 1 1 B X RG5/MCLR/VPP 7 -1100 -1200 100 R 40 40 1 1 B X SS/RF7 11 1100 -900 100 L 40 40 1 1 B X VDD 10 -200 1800 100 D 40 40 1 1 W X VDD@1 26 -100 1800 100 D 40 40 1 1 W X VDD@2 38 0 1800 100 D 40 40 1 1 W X VDD@3 57 100 1800 100 D 40 40 1 1 W X VSS 9 -200 -1700 100 U 40 40 1 1 W X VSS@1 25 -100 -1700 100 U 40 40 1 1 W X VSS@2 41 0 -1700 100 U 40 40 1 1 W X VSS@3 56 100 -1700 100 U 40 40 1 1 W X WR/RE1 1 1100 600 100 L 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: PIC18F8490TQ-80 # Package Name: TQFP80-12X12 # Dev Tech: '' # Dev Prefix: # Gate count = 1 # DEF PIC18F8490TQ-80 ?? 0 40 Y Y 1 L N # Gate Name: A # Symbol Name: PIC18F8490 DRAW P 2 1 0 0 -900 2100 -900 -2100 P 2 1 0 0 -900 -2100 900 -2100 P 2 1 0 0 900 -2100 900 2100 P 2 1 0 0 900 2100 -900 2100 X AVDD 25 200 2200 100 D 40 40 1 1 W X AVSS 26 200 -2200 100 U 40 40 1 1 W X C1OUT/S20/AN7/RF2 18 1000 900 100 L 40 40 1 1 B X C2OUT/S19/AN6/RF1 23 1000 1000 100 L 40 40 1 1 B X CK2/TX2/S29/RG1 6 1000 100 100 L 40 40 1 1 B X COM0 77 1000 1700 100 L 40 40 1 1 O X COM1/RE4 76 1000 1600 100 L 40 40 1 1 B X COM2/RE5 75 1000 1500 100 L 40 40 1 1 B X COM3/RE6 74 1000 1400 100 L 40 40 1 1 B X CVREF/S23/AN10/RF5 15 1000 600 100 L 40 40 1 1 B X DT2/RX2/S28/RG2 7 1000 0 100 L 40 40 1 1 B X LCDBIAS1 4 1000 2000 100 L 40 40 1 1 I X LCDBIAS2 3 1000 1900 100 L 40 40 1 1 I X LCDBIAS3 78 1000 1800 100 L 40 40 1 1 I X MCLR/VPP/RG5 9 -1000 900 100 R 40 40 1 1 I X OSC1/CLKI/RA7 49 -1000 1100 100 R 40 40 1 1 B X OSC2/CLKO/RA6 50 -1000 1200 100 R 40 40 1 1 B X RA0/AN0 30 -1000 1900 100 R 40 40 1 1 B X RA1/AN1 29 -1000 1800 100 R 40 40 1 1 B X RA2/AN2/VR-/S16 28 -1000 1700 100 R 40 40 1 1 B X RA3/AN3/VR+/S17 27 -1000 1600 100 R 40 40 1 1 B X RA4/T0CKI/S14 34 -1000 1500 100 R 40 40 1 1 B X RA5/AN4/HLVDIN/S15 33 -1000 1400 100 R 40 40 1 1 B X RB0/INT0 58 -1000 700 100 R 40 40 1 1 B X RB1/INT1/S8 57 -1000 600 100 R 40 40 1 1 B X RB2/INT2/S9 56 -1000 500 100 R 40 40 1 1 B X RB3/INT3/S10 55 -1000 400 100 R 40 40 1 1 B X RB4/KBI0/S11 54 -1000 300 100 R 40 40 1 1 B X RB5/KBI1 53 -1000 200 100 R 40 40 1 1 B X RB6/KBI2/PGC 52 -1000 100 100 R 40 40 1 1 B X RB7/KBI3/PGD 47 -1000 0 100 R 40 40 1 1 B X RC0/T1OSO/T13CKI 36 -1000 -200 100 R 40 40 1 1 B X RC1/T1OSI/CCP2 35 -1000 -300 100 R 40 40 1 1 B X RC2/CCP1/S13 43 -1000 -400 100 R 40 40 1 1 B X RC3/SCK/SCL 44 -1000 -500 100 R 40 40 1 1 B X RC4/SDI/SDA 45 -1000 -600 100 R 40 40 1 1 B X RC5/SDO/S12 46 -1000 -700 100 R 40 40 1 1 B X RC6/TX1/CK1 37 -1000 -800 100 R 40 40 1 1 B X RC7/RX1/DT1 38 -1000 -900 100 R 40 40 1 1 B X RD0/S0 72 -1000 -1100 100 R 40 40 1 1 B X RD1/S1 69 -1000 -1200 100 R 40 40 1 1 B X RD2/S2 68 -1000 -1300 100 R 40 40 1 1 B X RD3/S3 67 -1000 -1400 100 R 40 40 1 1 B X RD4/S4 66 -1000 -1500 100 R 40 40 1 1 B X RD5/S5 65 -1000 -1600 100 R 40 40 1 1 B X RD6/S6 64 -1000 -1700 100 R 40 40 1 1 B X RD7/S7 63 -1000 -1800 100 R 40 40 1 1 B X S18/AN5/RF0 24 1000 1100 100 L 40 40 1 1 B X S21/AN8/RF3 17 1000 800 100 L 40 40 1 1 B X S22/AN9/RF4 16 1000 700 100 L 40 40 1 1 B X S24/AN11/RF6 14 1000 500 100 L 40 40 1 1 B X S25/SS/RF7 13 1000 400 100 L 40 40 1 1 B X S26/RG4 10 1000 -200 100 L 40 40 1 1 B X S27/RG3 8 1000 -100 100 L 40 40 1 1 B X S30/RG0 5 1000 200 100 L 40 40 1 1 B X S31/CCP2/RE7 73 1000 1300 100 L 40 40 1 1 B X S32/RJ0 62 1000 -1300 100 L 40 40 1 1 B X S33/RJ1 61 1000 -1400 100 L 40 40 1 1 B X S34/RJ2 60 1000 -1500 100 L 40 40 1 1 B X S35/RJ3 59 1000 -1600 100 L 40 40 1 1 B X S36/RJ7 42 1000 -2000 100 L 40 40 1 1 B X S37/RJ6 41 1000 -1900 100 L 40 40 1 1 B X S38/RJ5 40 1000 -1800 100 L 40 40 1 1 B X S39/RJ4 39 1000 -1700 100 L 40 40 1 1 B X S40/RH4 22 1000 -800 100 L 40 40 1 1 B X S41/RH5 21 1000 -900 100 L 40 40 1 1 B X S42/RH6 20 1000 -1000 100 L 40 40 1 1 B X S43/RH7 19 1000 -1100 100 L 40 40 1 1 B X S44/RH3 2 1000 -700 100 L 40 40 1 1 B X S45/RH2 1 1000 -600 100 L 40 40 1 1 B X S46/RH1 80 1000 -500 100 L 40 40 1 1 B X S47/RH0 79 1000 -400 100 L 40 40 1 1 B X VDD 12 -200 2200 100 D 40 40 1 1 W X VDD@1 32 -100 2200 100 D 40 40 1 1 W X VDD@2 48 0 2200 100 D 40 40 1 1 W X VDD@3 71 100 2200 100 D 40 40 1 1 W X VSS 11 -200 -2200 100 U 40 40 1 1 W X VSS@1 31 -100 -2200 100 U 40 40 1 1 W X VSS@2 51 0 -2200 100 U 40 40 1 1 W X VSS@3 70 100 -2200 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: PIC24HJ64GP206/PT # Package Name: TQFP64-10X10 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF PIC24HJ64GP206/PT IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: PIC24XJXXXGP206 F0 "IC" -1200 1700 50 H V L B F1 "PIC24HJ64GP206/PT" 400 -1800 50 H V L B F2 "microchip-dspic-TQFP64-10X10" 0 150 50 H I C C DRAW P 2 1 0 0 -1200 1600 1200 1600 P 2 1 0 0 1200 1600 1200 -1600 P 2 1 0 0 1200 -1600 -1200 -1600 P 2 1 0 0 -1200 -1600 -1200 1600 T 0 655 1485 70 0 1 0 VDD T 0 5 -1515 70 0 1 0 VSS X AN16/T2CK/T7CK/RC1 2 1300 900 100 L 40 40 1 1 B X AN17/T3CK/T6CK/RC2 3 1300 800 100 L 40 40 1 1 B X AVDD 19 300 1700 100 D 40 40 1 1 W X AVSS 20 -300 -1700 100 U 40 40 1 1 W X CN8/SCK2/RG6 4 1300 -800 100 L 40 40 1 1 B X CN9/SDI2/RG7 5 1300 -900 100 L 40 40 1 1 B X CN10/SDO2/RG8 6 1300 -1000 100 L 40 40 1 1 B X CN17/U2RX/RF4 31 1300 0 100 L 40 40 1 1 B X CN18/U2TX/RF5 32 1300 -100 100 L 40 40 1 1 B X INT0/U1RTS/SCK1/RF6 35 1300 -200 100 L 40 40 1 1 B X MCLR 7 1300 1400 100 L 40 40 1 1 I X PGC2/SOSCO/T1CK/EMUC2/CN0/RC14 48 1300 600 100 L 40 40 1 1 B X PGD2/SOSCI/T4CK/EMUD2/CN1/RC13 47 1300 700 100 L 40 40 1 1 B X RB0/AN0/CN2/VR+/PGD3/EMUD3 16 -1300 1500 100 R 40 40 1 1 B X RB1/AN1/CN3/VR-/PGC3/EMUC3 15 -1300 1400 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 14 -1300 1300 100 R 40 40 1 1 B X RB3/AN3/CN5 13 -1300 1200 100 R 40 40 1 1 B X RB4/AN4/CN6/IC7 12 -1300 1100 100 R 40 40 1 1 B X RB5/AN5/CN7/IC8 11 -1300 1000 100 R 40 40 1 1 B X RB6/AN6/OCFA/EMUC1/PGC1 17 -1300 900 100 R 40 40 1 1 B X RB7/AN7/EMUD1/PGD1 18 -1300 800 100 R 40 40 1 1 B X RB8/AN8/U2CTS 21 -1300 700 100 R 40 40 1 1 B X RB9/AN9 22 -1300 600 100 R 40 40 1 1 B X RB10/AN10/TMS 23 -1300 500 100 R 40 40 1 1 B X RB11/AN11/TDO 24 -1300 400 100 R 40 40 1 1 B X RB12/AN12/TCK 27 -1300 300 100 R 40 40 1 1 B X RB13/AN13/TDI 28 -1300 200 100 R 40 40 1 1 B X RB14/AN14/U2RTS 29 -1300 100 100 R 40 40 1 1 B X RB15/AN15/CN12/OCFB 30 -1300 0 100 R 40 40 1 1 B X RC12/CLKI/OSC1 39 1300 1200 100 L 40 40 1 1 B X RC15/CLKO/OSC2 40 1300 1100 100 L 40 40 1 1 B X RD0/OC1 46 -1300 -200 100 R 40 40 1 1 B X RD1/OC2 49 -1300 -300 100 R 40 40 1 1 B X RD2/OC3 50 -1300 -400 100 R 40 40 1 1 B X RD3/OC4 51 -1300 -500 100 R 40 40 1 1 B X RD4/OC5/IC5/CN13 52 -1300 -600 100 R 40 40 1 1 B X RD5/OC6/IC6/CN14 53 -1300 -700 100 R 40 40 1 1 B X RD6/OC7/CN15 54 -1300 -800 100 R 40 40 1 1 B X RD7/OC8/CN16 55 -1300 -900 100 R 40 40 1 1 B X RD8/IC1/INT1 42 -1300 -1000 100 R 40 40 1 1 B X RD9/IC2/INT2/U1CTS 43 -1300 -1100 100 R 40 40 1 1 B X RD10/IC3/INT3 44 -1300 -1200 100 R 40 40 1 1 B X RD11/IC4/INT4 45 -1300 -1300 100 R 40 40 1 1 B X RF0 58 1300 400 100 L 40 40 1 1 B X RF1 59 1300 300 100 L 40 40 1 1 B X RG0 61 1300 -400 100 L 40 40 1 1 B X RG1 60 1300 -500 100 L 40 40 1 1 B X RG12 63 1300 -1200 100 L 40 40 1 1 B X RG13 64 1300 -1300 100 L 40 40 1 1 B X RG14 62 1300 -1400 100 L 40 40 1 1 B X RG15 1 1300 -1500 100 L 40 40 1 1 B X SCL1/RG2 37 1300 -600 100 L 40 40 1 1 B X SDA1/RG3 36 1300 -700 100 L 40 40 1 1 B X SDI1/U1RX/RF2 34 1300 200 100 L 40 40 1 1 B X SDO1/U1TX/RF3 33 1300 100 100 L 40 40 1 1 B X T5CK/CN11/SS2/RG9 8 1300 -1100 100 L 40 40 1 1 B X VDD 10 500 1700 100 D 40 40 1 1 W X VDD@1 26 600 1700 100 D 40 40 1 1 W X VDD@2 38 700 1700 100 D 40 40 1 1 W X VDD@3 57 800 1700 100 D 40 40 1 1 W X VDDC 56 400 1700 100 D 40 40 1 1 W X VSS 9 -100 -1700 100 U 40 40 1 1 W X VSS@1 25 0 -1700 100 U 40 40 1 1 W X VSS@2 41 100 -1700 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: PIC24HJ64GP506/PT # Package Name: TQFP64-10X10 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF PIC24HJ64GP506/PT IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: PIC24XJXXXGP506 F0 "IC" -1200 1700 50 H V L B F1 "PIC24HJ64GP506/PT" 400 -1800 50 H V L B F2 "microchip-dspic-TQFP64-10X10" 0 150 50 H I C C DRAW P 2 1 0 0 -1200 1600 1200 1600 P 2 1 0 0 1200 1600 1200 -1600 P 2 1 0 0 1200 -1600 -1200 -1600 P 2 1 0 0 -1200 -1600 -1200 1600 T 0 655 1485 70 0 1 0 VDD T 0 5 -1515 70 0 1 0 VSS X AN16/T2CK/T7CK/RC1 2 1300 900 100 L 40 40 1 1 B X AN17/T3CK/T6CK/RC2 3 1300 800 100 L 40 40 1 1 B X AVDD 19 300 1700 100 D 40 40 1 1 W X AVSS 20 -300 -1700 100 U 40 40 1 1 W X C1RX/RF0 58 1300 400 100 L 40 40 1 1 B X C1TX/RF1 59 1300 300 100 L 40 40 1 1 B X CN8/SCK2/RG6 4 1300 -800 100 L 40 40 1 1 B X CN9/SDI2/RG7 5 1300 -900 100 L 40 40 1 1 B X CN10/SDO2/RG8 6 1300 -1000 100 L 40 40 1 1 B X INT0/U1RTS/SCK1/RF6 35 1300 -200 100 L 40 40 1 1 B X MCLR 7 1300 1400 100 L 40 40 1 1 I X PGC2/SOSCO/T1CK/EMUC2/CN0/RC14 48 1300 600 100 L 40 40 1 1 B X PGD2/SOSCI/T4CK/EMUD2/CN1/RC13 47 1300 700 100 L 40 40 1 1 B X RB0/AN0/CN2/VR+/PGD3/EMUD3 16 -1300 1500 100 R 40 40 1 1 B X RB1/AN1/CN3/VR-/PGC3/EMUC3 15 -1300 1400 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 14 -1300 1300 100 R 40 40 1 1 B X RB3/AN3/CN5 13 -1300 1200 100 R 40 40 1 1 B X RB4/AN4/CN6/IC7 12 -1300 1100 100 R 40 40 1 1 B X RB5/AN5/CN7/IC8 11 -1300 1000 100 R 40 40 1 1 B X RB6/AN6/OCFA/EMUC1/PGC1 17 -1300 900 100 R 40 40 1 1 B X RB7/AN7/EMUD1/PGD1 18 -1300 800 100 R 40 40 1 1 B X RB8/AN8/U2CTS 21 -1300 700 100 R 40 40 1 1 B X RB9/AN9 22 -1300 600 100 R 40 40 1 1 B X RB10/AN10/TMS 23 -1300 500 100 R 40 40 1 1 B X RB11/AN11/TDO 24 -1300 400 100 R 40 40 1 1 B X RB12/AN12/TCK 27 -1300 300 100 R 40 40 1 1 B X RB13/AN13/TDI 28 -1300 200 100 R 40 40 1 1 B X RB14/AN14/U2RTS 29 -1300 100 100 R 40 40 1 1 B X RB15/AN15/CN12/OCFB 30 -1300 0 100 R 40 40 1 1 B X RC12/CLKI/OSC1 39 1300 1200 100 L 40 40 1 1 B X RC15/CLKO/OSC2 40 1300 1100 100 L 40 40 1 1 B X RD0/OC1 46 -1300 -200 100 R 40 40 1 1 B X RD1/OC2 49 -1300 -300 100 R 40 40 1 1 B X RD2/OC3 50 -1300 -400 100 R 40 40 1 1 B X RD3/OC4 51 -1300 -500 100 R 40 40 1 1 B X RD4/OC5/IC5/CN13 52 -1300 -600 100 R 40 40 1 1 B X RD5/OC6/IC6/CN14 53 -1300 -700 100 R 40 40 1 1 B X RD6/OC7/CN15 54 -1300 -800 100 R 40 40 1 1 B X RD7/OC8/CN16 55 -1300 -900 100 R 40 40 1 1 B X RD8/IC1/INT1 42 -1300 -1000 100 R 40 40 1 1 B X RD9/IC2/INT2/U1CTS 43 -1300 -1100 100 R 40 40 1 1 B X RD10/IC3/INT3 44 -1300 -1200 100 R 40 40 1 1 B X RD11/IC4/INT4 45 -1300 -1300 100 R 40 40 1 1 B X RG0 61 1300 -400 100 L 40 40 1 1 B X RG1 60 1300 -500 100 L 40 40 1 1 B X RG12 63 1300 -1200 100 L 40 40 1 1 B X RG13 64 1300 -1300 100 L 40 40 1 1 B X RG14 62 1300 -1400 100 L 40 40 1 1 B X RG15 1 1300 -1500 100 L 40 40 1 1 B X SCL1/RG2 37 1300 -600 100 L 40 40 1 1 B X SCL2/CN18/U2TX/RF5 32 1300 -100 100 L 40 40 1 1 B X SDA1/RG3 36 1300 -700 100 L 40 40 1 1 B X SDA2/CN17/U2RX/RF4 31 1300 0 100 L 40 40 1 1 B X SDI1/U1RX/RF2 34 1300 200 100 L 40 40 1 1 B X SDO1/U1TX/RF3 33 1300 100 100 L 40 40 1 1 B X T5CK/CN11/SS2/RG9 8 1300 -1100 100 L 40 40 1 1 B X VDD 10 500 1700 100 D 40 40 1 1 W X VDD@1 26 600 1700 100 D 40 40 1 1 W X VDD@2 38 700 1700 100 D 40 40 1 1 W X VDD@3 57 800 1700 100 D 40 40 1 1 W X VDDC 56 400 1700 100 D 40 40 1 1 W X VSS 9 -100 -1700 100 U 40 40 1 1 W X VSS@1 25 0 -1700 100 U 40 40 1 1 W X VSS@2 41 100 -1700 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: PIC24HJ128GP206/PT # Package Name: TQFP64-10X10 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF PIC24HJ128GP206/PT IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: PIC24XJXXXGP206 F0 "IC" -1200 1700 50 H V L B F1 "PIC24HJ128GP206/PT" 400 -1800 50 H V L B F2 "microchip-dspic-TQFP64-10X10" 0 150 50 H I C C DRAW P 2 1 0 0 -1200 1600 1200 1600 P 2 1 0 0 1200 1600 1200 -1600 P 2 1 0 0 1200 -1600 -1200 -1600 P 2 1 0 0 -1200 -1600 -1200 1600 T 0 655 1485 70 0 1 0 VDD T 0 5 -1515 70 0 1 0 VSS X AN16/T2CK/T7CK/RC1 2 1300 900 100 L 40 40 1 1 B X AN17/T3CK/T6CK/RC2 3 1300 800 100 L 40 40 1 1 B X AVDD 19 300 1700 100 D 40 40 1 1 W X AVSS 20 -300 -1700 100 U 40 40 1 1 W X CN8/SCK2/RG6 4 1300 -800 100 L 40 40 1 1 B X CN9/SDI2/RG7 5 1300 -900 100 L 40 40 1 1 B X CN10/SDO2/RG8 6 1300 -1000 100 L 40 40 1 1 B X CN17/U2RX/RF4 31 1300 0 100 L 40 40 1 1 B X CN18/U2TX/RF5 32 1300 -100 100 L 40 40 1 1 B X INT0/U1RTS/SCK1/RF6 35 1300 -200 100 L 40 40 1 1 B X MCLR 7 1300 1400 100 L 40 40 1 1 I X PGC2/SOSCO/T1CK/EMUC2/CN0/RC14 48 1300 600 100 L 40 40 1 1 B X PGD2/SOSCI/T4CK/EMUD2/CN1/RC13 47 1300 700 100 L 40 40 1 1 B X RB0/AN0/CN2/VR+/PGD3/EMUD3 16 -1300 1500 100 R 40 40 1 1 B X RB1/AN1/CN3/VR-/PGC3/EMUC3 15 -1300 1400 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 14 -1300 1300 100 R 40 40 1 1 B X RB3/AN3/CN5 13 -1300 1200 100 R 40 40 1 1 B X RB4/AN4/CN6/IC7 12 -1300 1100 100 R 40 40 1 1 B X RB5/AN5/CN7/IC8 11 -1300 1000 100 R 40 40 1 1 B X RB6/AN6/OCFA/EMUC1/PGC1 17 -1300 900 100 R 40 40 1 1 B X RB7/AN7/EMUD1/PGD1 18 -1300 800 100 R 40 40 1 1 B X RB8/AN8/U2CTS 21 -1300 700 100 R 40 40 1 1 B X RB9/AN9 22 -1300 600 100 R 40 40 1 1 B X RB10/AN10/TMS 23 -1300 500 100 R 40 40 1 1 B X RB11/AN11/TDO 24 -1300 400 100 R 40 40 1 1 B X RB12/AN12/TCK 27 -1300 300 100 R 40 40 1 1 B X RB13/AN13/TDI 28 -1300 200 100 R 40 40 1 1 B X RB14/AN14/U2RTS 29 -1300 100 100 R 40 40 1 1 B X RB15/AN15/CN12/OCFB 30 -1300 0 100 R 40 40 1 1 B X RC12/CLKI/OSC1 39 1300 1200 100 L 40 40 1 1 B X RC15/CLKO/OSC2 40 1300 1100 100 L 40 40 1 1 B X RD0/OC1 46 -1300 -200 100 R 40 40 1 1 B X RD1/OC2 49 -1300 -300 100 R 40 40 1 1 B X RD2/OC3 50 -1300 -400 100 R 40 40 1 1 B X RD3/OC4 51 -1300 -500 100 R 40 40 1 1 B X RD4/OC5/IC5/CN13 52 -1300 -600 100 R 40 40 1 1 B X RD5/OC6/IC6/CN14 53 -1300 -700 100 R 40 40 1 1 B X RD6/OC7/CN15 54 -1300 -800 100 R 40 40 1 1 B X RD7/OC8/CN16 55 -1300 -900 100 R 40 40 1 1 B X RD8/IC1/INT1 42 -1300 -1000 100 R 40 40 1 1 B X RD9/IC2/INT2/U1CTS 43 -1300 -1100 100 R 40 40 1 1 B X RD10/IC3/INT3 44 -1300 -1200 100 R 40 40 1 1 B X RD11/IC4/INT4 45 -1300 -1300 100 R 40 40 1 1 B X RF0 58 1300 400 100 L 40 40 1 1 B X RF1 59 1300 300 100 L 40 40 1 1 B X RG0 61 1300 -400 100 L 40 40 1 1 B X RG1 60 1300 -500 100 L 40 40 1 1 B X RG12 63 1300 -1200 100 L 40 40 1 1 B X RG13 64 1300 -1300 100 L 40 40 1 1 B X RG14 62 1300 -1400 100 L 40 40 1 1 B X RG15 1 1300 -1500 100 L 40 40 1 1 B X SCL1/RG2 37 1300 -600 100 L 40 40 1 1 B X SDA1/RG3 36 1300 -700 100 L 40 40 1 1 B X SDI1/U1RX/RF2 34 1300 200 100 L 40 40 1 1 B X SDO1/U1TX/RF3 33 1300 100 100 L 40 40 1 1 B X T5CK/CN11/SS2/RG9 8 1300 -1100 100 L 40 40 1 1 B X VDD 10 500 1700 100 D 40 40 1 1 W X VDD@1 26 600 1700 100 D 40 40 1 1 W X VDD@2 38 700 1700 100 D 40 40 1 1 W X VDD@3 57 800 1700 100 D 40 40 1 1 W X VDDC 56 400 1700 100 D 40 40 1 1 W X VSS 9 -100 -1700 100 U 40 40 1 1 W X VSS@1 25 0 -1700 100 U 40 40 1 1 W X VSS@2 41 100 -1700 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: PIC24HJ128GP306/PT # Package Name: TQFP64-10X10 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF PIC24HJ128GP306/PT IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: PIC24XJXXXGP306 F0 "IC" -1200 1700 50 H V L B F1 "PIC24HJ128GP306/PT" 400 -1800 50 H V L B F2 "microchip-dspic-TQFP64-10X10" 0 150 50 H I C C DRAW P 2 1 0 0 -1200 1600 1200 1600 P 2 1 0 0 1200 1600 1200 -1600 P 2 1 0 0 1200 -1600 -1200 -1600 P 2 1 0 0 -1200 -1600 -1200 1600 T 0 655 1485 70 0 1 0 VDD T 0 5 -1515 70 0 1 0 VSS X AN16/T2CK/T7CK/RC1 2 1300 900 100 L 40 40 1 1 B X AN17/T3CK/T6CK/RC2 3 1300 800 100 L 40 40 1 1 B X AVDD 19 300 1700 100 D 40 40 1 1 W X AVSS 20 -300 -1700 100 U 40 40 1 1 W X CN8/SCK2/RG6 4 1300 -800 100 L 40 40 1 1 B X CN9/SDI2/RG7 5 1300 -900 100 L 40 40 1 1 B X CN10/SDO2/RG8 6 1300 -1000 100 L 40 40 1 1 B X INT0/U1RTS/SCK1/RF6 35 1300 -200 100 L 40 40 1 1 B X MCLR 7 1300 1400 100 L 40 40 1 1 I X PGC2/SOSCO/T1CK/EMUC2/CN0/RC14 48 1300 600 100 L 40 40 1 1 B X PGD2/SOSCI/T4CK/EMUD2/CN1/RC13 47 1300 700 100 L 40 40 1 1 B X RB0/AN0/CN2/VR+/PGD3/EMUD3 16 -1300 1500 100 R 40 40 1 1 B X RB1/AN1/CN3/VR-/PGC3/EMUC3 15 -1300 1400 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 14 -1300 1300 100 R 40 40 1 1 B X RB3/AN3/CN5 13 -1300 1200 100 R 40 40 1 1 B X RB4/AN4/CN6/IC7 12 -1300 1100 100 R 40 40 1 1 B X RB5/AN5/CN7/IC8 11 -1300 1000 100 R 40 40 1 1 B X RB6/AN6/OCFA/EMUC1/PGC1 17 -1300 900 100 R 40 40 1 1 B X RB7/AN7/EMUD1/PGD1 18 -1300 800 100 R 40 40 1 1 B X RB8/AN8/U2CTS 21 -1300 700 100 R 40 40 1 1 B X RB9/AN9 22 -1300 600 100 R 40 40 1 1 B X RB10/AN10/TMS 23 -1300 500 100 R 40 40 1 1 B X RB11/AN11/TDO 24 -1300 400 100 R 40 40 1 1 B X RB12/AN12/TCK 27 -1300 300 100 R 40 40 1 1 B X RB13/AN13/TDI 28 -1300 200 100 R 40 40 1 1 B X RB14/AN14/U2RTS 29 -1300 100 100 R 40 40 1 1 B X RB15/AN15/CN12/OCFB 30 -1300 0 100 R 40 40 1 1 B X RC12/CLKI/OSC1 39 1300 1200 100 L 40 40 1 1 B X RC15/CLKO/OSC2 40 1300 1100 100 L 40 40 1 1 B X RD0/OC1 46 -1300 -200 100 R 40 40 1 1 B X RD1/OC2 49 -1300 -300 100 R 40 40 1 1 B X RD2/OC3 50 -1300 -400 100 R 40 40 1 1 B X RD3/OC4 51 -1300 -500 100 R 40 40 1 1 B X RD4/OC5/IC5/CN13 52 -1300 -600 100 R 40 40 1 1 B X RD5/OC6/IC6/CN14 53 -1300 -700 100 R 40 40 1 1 B X RD6/OC7/CN15 54 -1300 -800 100 R 40 40 1 1 B X RD7/OC8/CN16 55 -1300 -900 100 R 40 40 1 1 B X RD8/IC1/INT1 42 -1300 -1000 100 R 40 40 1 1 B X RD9/IC2/INT2/U1CTS 43 -1300 -1100 100 R 40 40 1 1 B X RD10/IC3/INT3 44 -1300 -1200 100 R 40 40 1 1 B X RD11/IC4/INT4 45 -1300 -1300 100 R 40 40 1 1 B X RF0 58 1300 400 100 L 40 40 1 1 B X RF1 59 1300 300 100 L 40 40 1 1 B X RG0 61 1300 -400 100 L 40 40 1 1 B X RG1 60 1300 -500 100 L 40 40 1 1 B X RG12 63 1300 -1200 100 L 40 40 1 1 B X RG13 64 1300 -1300 100 L 40 40 1 1 B X RG14 62 1300 -1400 100 L 40 40 1 1 B X RG15 1 1300 -1500 100 L 40 40 1 1 B X SCL1/RG2 37 1300 -600 100 L 40 40 1 1 B X SCL2/CN18/U2TX/RF5 32 1300 -100 100 L 40 40 1 1 B X SDA1/RG3 36 1300 -700 100 L 40 40 1 1 B X SDA2/CN17/U2RX/RF4 31 1300 0 100 L 40 40 1 1 B X SDI1/U1RX/RF2 34 1300 200 100 L 40 40 1 1 B X SDO1/U1TX/RF3 33 1300 100 100 L 40 40 1 1 B X T5CK/CN11/SS2/RG9 8 1300 -1100 100 L 40 40 1 1 B X VDD 10 500 1700 100 D 40 40 1 1 W X VDD@1 26 600 1700 100 D 40 40 1 1 W X VDD@2 38 700 1700 100 D 40 40 1 1 W X VDD@3 57 800 1700 100 D 40 40 1 1 W X VDDC 56 400 1700 100 D 40 40 1 1 W X VSS 9 -100 -1700 100 U 40 40 1 1 W X VSS@1 25 0 -1700 100 U 40 40 1 1 W X VSS@2 41 100 -1700 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: PIC24HJ128GP506/PT # Package Name: TQFP64-10X10 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF PIC24HJ128GP506/PT IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: PIC24XJXXXGP506 F0 "IC" -1200 1700 50 H V L B F1 "PIC24HJ128GP506/PT" 400 -1800 50 H V L B F2 "microchip-dspic-TQFP64-10X10" 0 150 50 H I C C DRAW P 2 1 0 0 -1200 1600 1200 1600 P 2 1 0 0 1200 1600 1200 -1600 P 2 1 0 0 1200 -1600 -1200 -1600 P 2 1 0 0 -1200 -1600 -1200 1600 T 0 655 1485 70 0 1 0 VDD T 0 5 -1515 70 0 1 0 VSS X AN16/T2CK/T7CK/RC1 2 1300 900 100 L 40 40 1 1 B X AN17/T3CK/T6CK/RC2 3 1300 800 100 L 40 40 1 1 B X AVDD 19 300 1700 100 D 40 40 1 1 W X AVSS 20 -300 -1700 100 U 40 40 1 1 W X C1RX/RF0 58 1300 400 100 L 40 40 1 1 B X C1TX/RF1 59 1300 300 100 L 40 40 1 1 B X CN8/SCK2/RG6 4 1300 -800 100 L 40 40 1 1 B X CN9/SDI2/RG7 5 1300 -900 100 L 40 40 1 1 B X CN10/SDO2/RG8 6 1300 -1000 100 L 40 40 1 1 B X INT0/U1RTS/SCK1/RF6 35 1300 -200 100 L 40 40 1 1 B X MCLR 7 1300 1400 100 L 40 40 1 1 I X PGC2/SOSCO/T1CK/EMUC2/CN0/RC14 48 1300 600 100 L 40 40 1 1 B X PGD2/SOSCI/T4CK/EMUD2/CN1/RC13 47 1300 700 100 L 40 40 1 1 B X RB0/AN0/CN2/VR+/PGD3/EMUD3 16 -1300 1500 100 R 40 40 1 1 B X RB1/AN1/CN3/VR-/PGC3/EMUC3 15 -1300 1400 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 14 -1300 1300 100 R 40 40 1 1 B X RB3/AN3/CN5 13 -1300 1200 100 R 40 40 1 1 B X RB4/AN4/CN6/IC7 12 -1300 1100 100 R 40 40 1 1 B X RB5/AN5/CN7/IC8 11 -1300 1000 100 R 40 40 1 1 B X RB6/AN6/OCFA/EMUC1/PGC1 17 -1300 900 100 R 40 40 1 1 B X RB7/AN7/EMUD1/PGD1 18 -1300 800 100 R 40 40 1 1 B X RB8/AN8/U2CTS 21 -1300 700 100 R 40 40 1 1 B X RB9/AN9 22 -1300 600 100 R 40 40 1 1 B X RB10/AN10/TMS 23 -1300 500 100 R 40 40 1 1 B X RB11/AN11/TDO 24 -1300 400 100 R 40 40 1 1 B X RB12/AN12/TCK 27 -1300 300 100 R 40 40 1 1 B X RB13/AN13/TDI 28 -1300 200 100 R 40 40 1 1 B X RB14/AN14/U2RTS 29 -1300 100 100 R 40 40 1 1 B X RB15/AN15/CN12/OCFB 30 -1300 0 100 R 40 40 1 1 B X RC12/CLKI/OSC1 39 1300 1200 100 L 40 40 1 1 B X RC15/CLKO/OSC2 40 1300 1100 100 L 40 40 1 1 B X RD0/OC1 46 -1300 -200 100 R 40 40 1 1 B X RD1/OC2 49 -1300 -300 100 R 40 40 1 1 B X RD2/OC3 50 -1300 -400 100 R 40 40 1 1 B X RD3/OC4 51 -1300 -500 100 R 40 40 1 1 B X RD4/OC5/IC5/CN13 52 -1300 -600 100 R 40 40 1 1 B X RD5/OC6/IC6/CN14 53 -1300 -700 100 R 40 40 1 1 B X RD6/OC7/CN15 54 -1300 -800 100 R 40 40 1 1 B X RD7/OC8/CN16 55 -1300 -900 100 R 40 40 1 1 B X RD8/IC1/INT1 42 -1300 -1000 100 R 40 40 1 1 B X RD9/IC2/INT2/U1CTS 43 -1300 -1100 100 R 40 40 1 1 B X RD10/IC3/INT3 44 -1300 -1200 100 R 40 40 1 1 B X RD11/IC4/INT4 45 -1300 -1300 100 R 40 40 1 1 B X RG0 61 1300 -400 100 L 40 40 1 1 B X RG1 60 1300 -500 100 L 40 40 1 1 B X RG12 63 1300 -1200 100 L 40 40 1 1 B X RG13 64 1300 -1300 100 L 40 40 1 1 B X RG14 62 1300 -1400 100 L 40 40 1 1 B X RG15 1 1300 -1500 100 L 40 40 1 1 B X SCL1/RG2 37 1300 -600 100 L 40 40 1 1 B X SCL2/CN18/U2TX/RF5 32 1300 -100 100 L 40 40 1 1 B X SDA1/RG3 36 1300 -700 100 L 40 40 1 1 B X SDA2/CN17/U2RX/RF4 31 1300 0 100 L 40 40 1 1 B X SDI1/U1RX/RF2 34 1300 200 100 L 40 40 1 1 B X SDO1/U1TX/RF3 33 1300 100 100 L 40 40 1 1 B X T5CK/CN11/SS2/RG9 8 1300 -1100 100 L 40 40 1 1 B X VDD 10 500 1700 100 D 40 40 1 1 W X VDD@1 26 600 1700 100 D 40 40 1 1 W X VDD@2 38 700 1700 100 D 40 40 1 1 W X VDD@3 57 800 1700 100 D 40 40 1 1 W X VDDC 56 400 1700 100 D 40 40 1 1 W X VSS 9 -100 -1700 100 U 40 40 1 1 W X VSS@1 25 0 -1700 100 U 40 40 1 1 W X VSS@2 41 100 -1700 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: PIC24HJ256GP206/PT # Package Name: TQFP64-10X10 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF PIC24HJ256GP206/PT IC 0 40 Y Y 1 L N # Gate Name: X # Symbol Name: PIC24XJXXXGP206 F0 "IC" -1200 1700 50 H V L B F1 "PIC24HJ256GP206/PT" 400 -1800 50 H V L B F2 "microchip-dspic-TQFP64-10X10" 0 150 50 H I C C DRAW P 2 1 0 0 -1200 1600 1200 1600 P 2 1 0 0 1200 1600 1200 -1600 P 2 1 0 0 1200 -1600 -1200 -1600 P 2 1 0 0 -1200 -1600 -1200 1600 T 0 655 1485 70 0 1 0 VDD T 0 5 -1515 70 0 1 0 VSS X AN16/T2CK/T7CK/RC1 2 1300 900 100 L 40 40 1 1 B X AN17/T3CK/T6CK/RC2 3 1300 800 100 L 40 40 1 1 B X AVDD 19 300 1700 100 D 40 40 1 1 W X AVSS 20 -300 -1700 100 U 40 40 1 1 W X CN8/SCK2/RG6 4 1300 -800 100 L 40 40 1 1 B X CN9/SDI2/RG7 5 1300 -900 100 L 40 40 1 1 B X CN10/SDO2/RG8 6 1300 -1000 100 L 40 40 1 1 B X CN17/U2RX/RF4 31 1300 0 100 L 40 40 1 1 B X CN18/U2TX/RF5 32 1300 -100 100 L 40 40 1 1 B X INT0/U1RTS/SCK1/RF6 35 1300 -200 100 L 40 40 1 1 B X MCLR 7 1300 1400 100 L 40 40 1 1 I X PGC2/SOSCO/T1CK/EMUC2/CN0/RC14 48 1300 600 100 L 40 40 1 1 B X PGD2/SOSCI/T4CK/EMUD2/CN1/RC13 47 1300 700 100 L 40 40 1 1 B X RB0/AN0/CN2/VR+/PGD3/EMUD3 16 -1300 1500 100 R 40 40 1 1 B X RB1/AN1/CN3/VR-/PGC3/EMUC3 15 -1300 1400 100 R 40 40 1 1 B X RB2/AN2/CN4/SS1/LVDIN 14 -1300 1300 100 R 40 40 1 1 B X RB3/AN3/CN5 13 -1300 1200 100 R 40 40 1 1 B X RB4/AN4/CN6/IC7 12 -1300 1100 100 R 40 40 1 1 B X RB5/AN5/CN7/IC8 11 -1300 1000 100 R 40 40 1 1 B X RB6/AN6/OCFA/EMUC1/PGC1 17 -1300 900 100 R 40 40 1 1 B X RB7/AN7/EMUD1/PGD1 18 -1300 800 100 R 40 40 1 1 B X RB8/AN8/U2CTS 21 -1300 700 100 R 40 40 1 1 B X RB9/AN9 22 -1300 600 100 R 40 40 1 1 B X RB10/AN10/TMS 23 -1300 500 100 R 40 40 1 1 B X RB11/AN11/TDO 24 -1300 400 100 R 40 40 1 1 B X RB12/AN12/TCK 27 -1300 300 100 R 40 40 1 1 B X RB13/AN13/TDI 28 -1300 200 100 R 40 40 1 1 B X RB14/AN14/U2RTS 29 -1300 100 100 R 40 40 1 1 B X RB15/AN15/CN12/OCFB 30 -1300 0 100 R 40 40 1 1 B X RC12/CLKI/OSC1 39 1300 1200 100 L 40 40 1 1 B X RC15/CLKO/OSC2 40 1300 1100 100 L 40 40 1 1 B X RD0/OC1 46 -1300 -200 100 R 40 40 1 1 B X RD1/OC2 49 -1300 -300 100 R 40 40 1 1 B X RD2/OC3 50 -1300 -400 100 R 40 40 1 1 B X RD3/OC4 51 -1300 -500 100 R 40 40 1 1 B X RD4/OC5/IC5/CN13 52 -1300 -600 100 R 40 40 1 1 B X RD5/OC6/IC6/CN14 53 -1300 -700 100 R 40 40 1 1 B X RD6/OC7/CN15 54 -1300 -800 100 R 40 40 1 1 B X RD7/OC8/CN16 55 -1300 -900 100 R 40 40 1 1 B X RD8/IC1/INT1 42 -1300 -1000 100 R 40 40 1 1 B X RD9/IC2/INT2/U1CTS 43 -1300 -1100 100 R 40 40 1 1 B X RD10/IC3/INT3 44 -1300 -1200 100 R 40 40 1 1 B X RD11/IC4/INT4 45 -1300 -1300 100 R 40 40 1 1 B X RF0 58 1300 400 100 L 40 40 1 1 B X RF1 59 1300 300 100 L 40 40 1 1 B X RG0 61 1300 -400 100 L 40 40 1 1 B X RG1 60 1300 -500 100 L 40 40 1 1 B X RG12 63 1300 -1200 100 L 40 40 1 1 B X RG13 64 1300 -1300 100 L 40 40 1 1 B X RG14 62 1300 -1400 100 L 40 40 1 1 B X RG15 1 1300 -1500 100 L 40 40 1 1 B X SCL1/RG2 37 1300 -600 100 L 40 40 1 1 B X SDA1/RG3 36 1300 -700 100 L 40 40 1 1 B X SDI1/U1RX/RF2 34 1300 200 100 L 40 40 1 1 B X SDO1/U1TX/RF3 33 1300 100 100 L 40 40 1 1 B X T5CK/CN11/SS2/RG9 8 1300 -1100 100 L 40 40 1 1 B X VDD 10 500 1700 100 D 40 40 1 1 W X VDD@1 26 600 1700 100 D 40 40 1 1 W X VDD@2 38 700 1700 100 D 40 40 1 1 W X VDD@3 57 800 1700 100 D 40 40 1 1 W X VDDC 56 400 1700 100 D 40 40 1 1 W X VSS 9 -100 -1700 100 U 40 40 1 1 W X VSS@1 25 0 -1700 100 U 40 40 1 1 W X VSS@2 41 100 -1700 100 U 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: TC1276 # Package Name: SOT23B-3 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF TC1276 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: RESETS23 F0 "IC" 100 250 50 H V L B F1 "TC1276" 100 -300 50 H V L B F2 "microchip-dspic-SOT23B-3" 0 150 50 H I C C DRAW P 2 1 0 0 -300 200 300 200 P 2 1 0 0 300 200 300 -200 P 2 1 0 0 300 -200 -300 -200 P 2 1 0 0 -300 -200 -300 200 T 0 10 130 60 0 1 0 VCC T 0 10 -130 60 0 1 0 GND X GND 3 0 -300 100 U 40 40 1 1 W X RESET# 1 400 0 100 L 40 40 1 1 O X VCC 2 0 300 100 D 40 40 1 1 W ENDDRAW ENDDEF #End Library