EESchema-LIBRARY Version 2.3 29/04/2008-12:23:15 # Converted with eagle2kicad.ulp Version 0.9 # Device count = 2 # # Dev Name: 68HC908GP32-PDIP40 # Package Name: PDIP-32 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF 68HC908GP32-PDIP40 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 68HC908GP32P F0 "IC" -400 1500 50 H V L B F1 "68HC908GP32-PDIP40" -400 1400 50 H V L B F2 "nitron-PDIP-32" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1400 700 1400 P 2 1 0 0 700 1400 700 -1500 P 2 1 0 0 700 -1500 -600 -1500 P 2 1 0 0 -600 -1500 -600 1400 X AD0/PTB0 23 900 -400 200 L 40 40 1 1 B X AD1/PTB1 24 900 -300 200 L 40 40 1 1 B X AD2/PTB2 25 900 -200 200 L 40 40 1 1 B X AD3/PTB3 26 900 -100 200 L 40 40 1 1 B X AD4/PTB4 27 900 0 200 L 40 40 1 1 B X AD5/PTB5 28 900 100 200 L 40 40 1 1 B X AD6/PTB6 29 900 200 200 L 40 40 1 1 B X AD7/PTB7 30 900 300 200 L 40 40 1 1 B X GMXFC 3 -800 -100 200 R 40 40 1 1 B X IRQ 14 -800 -600 200 R 40 40 1 1 B X KBD0/PTA0 33 900 500 200 L 40 40 1 1 B X KBD1/PTA1 34 900 600 200 L 40 40 1 1 B X KBD2/PTA2 35 900 700 200 L 40 40 1 1 B X KBD3/PTA3 36 900 800 200 L 40 40 1 1 B X KBD4/PTA4 37 900 900 200 L 40 40 1 1 B X KBD5/PTA5 38 900 1000 200 L 40 40 1 1 B X KBD6/PTA6 39 900 1100 200 L 40 40 1 1 B X KBD7/PTA7 40 900 1200 200 L 40 40 1 1 B X OSC1 5 -800 400 200 R 40 40 1 1 B X OSC2 4 -800 100 200 R 40 40 1 1 B X PTC0 7 900 -1000 200 L 40 40 1 1 B X PTC1 8 900 -900 200 L 40 40 1 1 B X PTC2 9 900 -800 200 L 40 40 1 1 B X PTC3 10 900 -700 200 L 40 40 1 1 B X PTC4 11 900 -600 200 L 40 40 1 1 B X PTD0/SS 15 -800 -1300 200 R 40 40 1 1 B X PTD1/MISO 16 -800 -1200 200 R 40 40 1 1 B X PTD2/MOSI 17 -800 -1100 200 R 40 40 1 1 B X PTD3/SPSCK 18 -800 -1000 200 R 40 40 1 1 B X PTD4/T1CH0 21 -800 -900 200 R 40 40 1 1 B X PTD5/T1CH1 22 -800 -800 200 R 40 40 1 1 B X RST 6 -800 -400 200 R 40 40 1 1 B X RXD/PTE1 13 900 -1200 200 L 40 40 1 1 B X TXD/PTE0 12 900 -1300 200 L 40 40 1 1 B X VDD 20 -800 1300 200 R 40 40 1 1 W X VDDA 1 -800 1200 200 R 40 40 1 1 B X VDDAD/VREFH 31 -800 800 200 R 40 40 1 1 B X VSS 19 -800 1100 200 R 40 40 1 1 W X VSSA 2 -800 1000 200 R 40 40 1 1 B X VSSAD/VREFL 32 -800 700 200 R 40 40 1 1 B ENDDRAW ENDDEF # # Dev Name: 68HC908QTXXX # Package Name: PDIP-8 # Dev Tech: '' # Dev Prefix: # Gate count = 1 # DEF 68HC908QTXXX ?? 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: 68HC908QTXX DRAW P 2 1 0 0 -300 300 -300 -400 P 2 1 0 0 -300 -400 600 -400 P 2 1 0 0 600 -400 600 300 P 2 1 0 0 600 300 -300 300 X AD3/PTA5 2 800 -300 200 L 40 40 1 1 B X IRQ/PTA2 5 800 0 200 L 40 40 1 1 B X PTA0 7 800 200 200 L 40 40 1 1 B X PTA3 4 800 -100 200 L 40 40 1 1 B X PTA4 3 800 -200 200 L 40 40 1 1 B X TCH1/PTA1 6 800 100 200 L 40 40 1 1 B X VDD 1 -500 200 200 R 40 40 1 1 w X VSS 8 -500 -300 200 R 40 40 1 1 w ENDDRAW ENDDEF #End Library