EESchema-LIBRARY Version 2.3  29/04/2008-12:23:17
# Converted with eagle2kicad.ulp Version 0.9
# Device count = 8
#
# Dev Name: 16F627AP
# Package Name: DIL18
# Dev Tech: 7A
# Dev Prefix: IC
# Gate count = 1
#
DEF 16F627AP IC 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: PIC16F62X
F0 "IC" -700 1000 50 H V L B
F1 "16F627AP" 700 1000 50 H V L B
F2 "osman-pic16f62x-DIL18" 0 150 50 H I C C
DRAW
P 2 1 0 0 -800 900 1200 900
P 2 1 0 0 1200 900 1200 -1100
P 2 1 0 0 1200 -1100 -800 -1100
P 2 1 0 0 -800 -1100 -800 900
X RA0/AN0 17 1400 500 200 L 40 40 1 1 B 
X RA1/AN1 18 1400 700 200 L 40 40 1 1 B 
X RA2/AN2/VREF 1 -1000 700 200 R 40 40 1 1 B 
X RA3/AN3/CMP1 2 -1000 500 200 R 40 40 1 1 B 
X RA4/RA4/T0CKI/CMP2 3 -1000 300 200 R 40 40 1 1 B 
X RA5/MCLR/THV 4 -1000 100 200 R 40 40 1 1 I 
X RA6/OSC2/CLKOUT 15 1400 100 200 L 40 40 1 1 B 
X RA7/OSC1/CLKIN 16 1400 300 200 L 40 40 1 1 B 
X RB0/INT 6 -1000 -300 200 R 40 40 1 1 B 
X RB1/RX/DT 7 -1000 -500 200 R 40 40 1 1 B 
X RB2/TX/CK 8 -1000 -700 200 R 40 40 1 1 B 
X RB3/CCP1 9 -1000 -900 200 R 40 40 1 1 B 
X RB4/PGM 10 1400 -900 200 L 40 40 1 1 B 
X RB5 11 1400 -700 200 L 40 40 1 1 B 
X RB6/T1OSO/T1CKI 12 1400 -500 200 L 40 40 1 1 B 
X RB7/T1OSI 13 1400 -300 200 L 40 40 1 1 B 
X VDD 14 1400 -100 200 L 40 40 1 1 W 
X VSS 5 -1000 -100 200 R 40 40 1 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: 16F627ASO
# Package Name: SO-18W
# Dev Tech: 7A
# Dev Prefix: IC
# Gate count = 1
#
DEF 16F627ASO IC 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: PIC16F62X
F0 "IC" -700 1000 50 H V L B
F1 "16F627ASO" 700 1000 50 H V L B
F2 "osman-pic16f62x-SO-18W" 0 150 50 H I C C
DRAW
P 2 1 0 0 -800 900 1200 900
P 2 1 0 0 1200 900 1200 -1100
P 2 1 0 0 1200 -1100 -800 -1100
P 2 1 0 0 -800 -1100 -800 900
X RA0/AN0 17 1400 500 200 L 40 40 1 1 B 
X RA1/AN1 18 1400 700 200 L 40 40 1 1 B 
X RA2/AN2/VREF 1 -1000 700 200 R 40 40 1 1 B 
X RA3/AN3/CMP1 2 -1000 500 200 R 40 40 1 1 B 
X RA4/RA4/T0CKI/CMP2 3 -1000 300 200 R 40 40 1 1 B 
X RA5/MCLR/THV 4 -1000 100 200 R 40 40 1 1 I 
X RA6/OSC2/CLKOUT 15 1400 100 200 L 40 40 1 1 B 
X RA7/OSC1/CLKIN 16 1400 300 200 L 40 40 1 1 B 
X RB0/INT 6 -1000 -300 200 R 40 40 1 1 B 
X RB1/RX/DT 7 -1000 -500 200 R 40 40 1 1 B 
X RB2/TX/CK 8 -1000 -700 200 R 40 40 1 1 B 
X RB3/CCP1 9 -1000 -900 200 R 40 40 1 1 B 
X RB4/PGM 10 1400 -900 200 L 40 40 1 1 B 
X RB5 11 1400 -700 200 L 40 40 1 1 B 
X RB6/T1OSO/T1CKI 12 1400 -500 200 L 40 40 1 1 B 
X RB7/T1OSI 13 1400 -300 200 L 40 40 1 1 B 
X VDD 14 1400 -100 200 L 40 40 1 1 W 
X VSS 5 -1000 -100 200 R 40 40 1 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: 16F627P
# Package Name: DIL18
# Dev Tech: 7
# Dev Prefix: IC
# Gate count = 1
#
DEF 16F627P IC 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: PIC16F62X
F0 "IC" -700 1000 50 H V L B
F1 "16F627P" 700 1000 50 H V L B
F2 "osman-pic16f62x-DIL18" 0 150 50 H I C C
DRAW
P 2 1 0 0 -800 900 1200 900
P 2 1 0 0 1200 900 1200 -1100
P 2 1 0 0 1200 -1100 -800 -1100
P 2 1 0 0 -800 -1100 -800 900
X RA0/AN0 17 1400 500 200 L 40 40 1 1 B 
X RA1/AN1 18 1400 700 200 L 40 40 1 1 B 
X RA2/AN2/VREF 1 -1000 700 200 R 40 40 1 1 B 
X RA3/AN3/CMP1 2 -1000 500 200 R 40 40 1 1 B 
X RA4/RA4/T0CKI/CMP2 3 -1000 300 200 R 40 40 1 1 B 
X RA5/MCLR/THV 4 -1000 100 200 R 40 40 1 1 I 
X RA6/OSC2/CLKOUT 15 1400 100 200 L 40 40 1 1 B 
X RA7/OSC1/CLKIN 16 1400 300 200 L 40 40 1 1 B 
X RB0/INT 6 -1000 -300 200 R 40 40 1 1 B 
X RB1/RX/DT 7 -1000 -500 200 R 40 40 1 1 B 
X RB2/TX/CK 8 -1000 -700 200 R 40 40 1 1 B 
X RB3/CCP1 9 -1000 -900 200 R 40 40 1 1 B 
X RB4/PGM 10 1400 -900 200 L 40 40 1 1 B 
X RB5 11 1400 -700 200 L 40 40 1 1 B 
X RB6/T1OSO/T1CKI 12 1400 -500 200 L 40 40 1 1 B 
X RB7/T1OSI 13 1400 -300 200 L 40 40 1 1 B 
X VDD 14 1400 -100 200 L 40 40 1 1 W 
X VSS 5 -1000 -100 200 R 40 40 1 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: 16F627SO
# Package Name: SO-18W
# Dev Tech: 7
# Dev Prefix: IC
# Gate count = 1
#
DEF 16F627SO IC 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: PIC16F62X
F0 "IC" -700 1000 50 H V L B
F1 "16F627SO" 700 1000 50 H V L B
F2 "osman-pic16f62x-SO-18W" 0 150 50 H I C C
DRAW
P 2 1 0 0 -800 900 1200 900
P 2 1 0 0 1200 900 1200 -1100
P 2 1 0 0 1200 -1100 -800 -1100
P 2 1 0 0 -800 -1100 -800 900
X RA0/AN0 17 1400 500 200 L 40 40 1 1 B 
X RA1/AN1 18 1400 700 200 L 40 40 1 1 B 
X RA2/AN2/VREF 1 -1000 700 200 R 40 40 1 1 B 
X RA3/AN3/CMP1 2 -1000 500 200 R 40 40 1 1 B 
X RA4/RA4/T0CKI/CMP2 3 -1000 300 200 R 40 40 1 1 B 
X RA5/MCLR/THV 4 -1000 100 200 R 40 40 1 1 I 
X RA6/OSC2/CLKOUT 15 1400 100 200 L 40 40 1 1 B 
X RA7/OSC1/CLKIN 16 1400 300 200 L 40 40 1 1 B 
X RB0/INT 6 -1000 -300 200 R 40 40 1 1 B 
X RB1/RX/DT 7 -1000 -500 200 R 40 40 1 1 B 
X RB2/TX/CK 8 -1000 -700 200 R 40 40 1 1 B 
X RB3/CCP1 9 -1000 -900 200 R 40 40 1 1 B 
X RB4/PGM 10 1400 -900 200 L 40 40 1 1 B 
X RB5 11 1400 -700 200 L 40 40 1 1 B 
X RB6/T1OSO/T1CKI 12 1400 -500 200 L 40 40 1 1 B 
X RB7/T1OSI 13 1400 -300 200 L 40 40 1 1 B 
X VDD 14 1400 -100 200 L 40 40 1 1 W 
X VSS 5 -1000 -100 200 R 40 40 1 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: 16F628AP
# Package Name: DIL18
# Dev Tech: 8A
# Dev Prefix: IC
# Gate count = 1
#
DEF 16F628AP IC 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: PIC16F62X
F0 "IC" -700 1000 50 H V L B
F1 "16F628AP" 700 1000 50 H V L B
F2 "osman-pic16f62x-DIL18" 0 150 50 H I C C
DRAW
P 2 1 0 0 -800 900 1200 900
P 2 1 0 0 1200 900 1200 -1100
P 2 1 0 0 1200 -1100 -800 -1100
P 2 1 0 0 -800 -1100 -800 900
X RA0/AN0 17 1400 500 200 L 40 40 1 1 B 
X RA1/AN1 18 1400 700 200 L 40 40 1 1 B 
X RA2/AN2/VREF 1 -1000 700 200 R 40 40 1 1 B 
X RA3/AN3/CMP1 2 -1000 500 200 R 40 40 1 1 B 
X RA4/RA4/T0CKI/CMP2 3 -1000 300 200 R 40 40 1 1 B 
X RA5/MCLR/THV 4 -1000 100 200 R 40 40 1 1 I 
X RA6/OSC2/CLKOUT 15 1400 100 200 L 40 40 1 1 B 
X RA7/OSC1/CLKIN 16 1400 300 200 L 40 40 1 1 B 
X RB0/INT 6 -1000 -300 200 R 40 40 1 1 B 
X RB1/RX/DT 7 -1000 -500 200 R 40 40 1 1 B 
X RB2/TX/CK 8 -1000 -700 200 R 40 40 1 1 B 
X RB3/CCP1 9 -1000 -900 200 R 40 40 1 1 B 
X RB4/PGM 10 1400 -900 200 L 40 40 1 1 B 
X RB5 11 1400 -700 200 L 40 40 1 1 B 
X RB6/T1OSO/T1CKI 12 1400 -500 200 L 40 40 1 1 B 
X RB7/T1OSI 13 1400 -300 200 L 40 40 1 1 B 
X VDD 14 1400 -100 200 L 40 40 1 1 W 
X VSS 5 -1000 -100 200 R 40 40 1 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: 16F628ASO
# Package Name: SO-18W
# Dev Tech: 8A
# Dev Prefix: IC
# Gate count = 1
#
DEF 16F628ASO IC 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: PIC16F62X
F0 "IC" -700 1000 50 H V L B
F1 "16F628ASO" 700 1000 50 H V L B
F2 "osman-pic16f62x-SO-18W" 0 150 50 H I C C
DRAW
P 2 1 0 0 -800 900 1200 900
P 2 1 0 0 1200 900 1200 -1100
P 2 1 0 0 1200 -1100 -800 -1100
P 2 1 0 0 -800 -1100 -800 900
X RA0/AN0 17 1400 500 200 L 40 40 1 1 B 
X RA1/AN1 18 1400 700 200 L 40 40 1 1 B 
X RA2/AN2/VREF 1 -1000 700 200 R 40 40 1 1 B 
X RA3/AN3/CMP1 2 -1000 500 200 R 40 40 1 1 B 
X RA4/RA4/T0CKI/CMP2 3 -1000 300 200 R 40 40 1 1 B 
X RA5/MCLR/THV 4 -1000 100 200 R 40 40 1 1 I 
X RA6/OSC2/CLKOUT 15 1400 100 200 L 40 40 1 1 B 
X RA7/OSC1/CLKIN 16 1400 300 200 L 40 40 1 1 B 
X RB0/INT 6 -1000 -300 200 R 40 40 1 1 B 
X RB1/RX/DT 7 -1000 -500 200 R 40 40 1 1 B 
X RB2/TX/CK 8 -1000 -700 200 R 40 40 1 1 B 
X RB3/CCP1 9 -1000 -900 200 R 40 40 1 1 B 
X RB4/PGM 10 1400 -900 200 L 40 40 1 1 B 
X RB5 11 1400 -700 200 L 40 40 1 1 B 
X RB6/T1OSO/T1CKI 12 1400 -500 200 L 40 40 1 1 B 
X RB7/T1OSI 13 1400 -300 200 L 40 40 1 1 B 
X VDD 14 1400 -100 200 L 40 40 1 1 W 
X VSS 5 -1000 -100 200 R 40 40 1 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: 16F628P
# Package Name: DIL18
# Dev Tech: 8
# Dev Prefix: IC
# Gate count = 1
#
DEF 16F628P IC 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: PIC16F62X
F0 "IC" -700 1000 50 H V L B
F1 "16F628P" 700 1000 50 H V L B
F2 "osman-pic16f62x-DIL18" 0 150 50 H I C C
DRAW
P 2 1 0 0 -800 900 1200 900
P 2 1 0 0 1200 900 1200 -1100
P 2 1 0 0 1200 -1100 -800 -1100
P 2 1 0 0 -800 -1100 -800 900
X RA0/AN0 17 1400 500 200 L 40 40 1 1 B 
X RA1/AN1 18 1400 700 200 L 40 40 1 1 B 
X RA2/AN2/VREF 1 -1000 700 200 R 40 40 1 1 B 
X RA3/AN3/CMP1 2 -1000 500 200 R 40 40 1 1 B 
X RA4/RA4/T0CKI/CMP2 3 -1000 300 200 R 40 40 1 1 B 
X RA5/MCLR/THV 4 -1000 100 200 R 40 40 1 1 I 
X RA6/OSC2/CLKOUT 15 1400 100 200 L 40 40 1 1 B 
X RA7/OSC1/CLKIN 16 1400 300 200 L 40 40 1 1 B 
X RB0/INT 6 -1000 -300 200 R 40 40 1 1 B 
X RB1/RX/DT 7 -1000 -500 200 R 40 40 1 1 B 
X RB2/TX/CK 8 -1000 -700 200 R 40 40 1 1 B 
X RB3/CCP1 9 -1000 -900 200 R 40 40 1 1 B 
X RB4/PGM 10 1400 -900 200 L 40 40 1 1 B 
X RB5 11 1400 -700 200 L 40 40 1 1 B 
X RB6/T1OSO/T1CKI 12 1400 -500 200 L 40 40 1 1 B 
X RB7/T1OSI 13 1400 -300 200 L 40 40 1 1 B 
X VDD 14 1400 -100 200 L 40 40 1 1 W 
X VSS 5 -1000 -100 200 R 40 40 1 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: 16F628SO
# Package Name: SO-18W
# Dev Tech: 8
# Dev Prefix: IC
# Gate count = 1
#
DEF 16F628SO IC 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: PIC16F62X
F0 "IC" -700 1000 50 H V L B
F1 "16F628SO" 700 1000 50 H V L B
F2 "osman-pic16f62x-SO-18W" 0 150 50 H I C C
DRAW
P 2 1 0 0 -800 900 1200 900
P 2 1 0 0 1200 900 1200 -1100
P 2 1 0 0 1200 -1100 -800 -1100
P 2 1 0 0 -800 -1100 -800 900
X RA0/AN0 17 1400 500 200 L 40 40 1 1 B 
X RA1/AN1 18 1400 700 200 L 40 40 1 1 B 
X RA2/AN2/VREF 1 -1000 700 200 R 40 40 1 1 B 
X RA3/AN3/CMP1 2 -1000 500 200 R 40 40 1 1 B 
X RA4/RA4/T0CKI/CMP2 3 -1000 300 200 R 40 40 1 1 B 
X RA5/MCLR/THV 4 -1000 100 200 R 40 40 1 1 I 
X RA6/OSC2/CLKOUT 15 1400 100 200 L 40 40 1 1 B 
X RA7/OSC1/CLKIN 16 1400 300 200 L 40 40 1 1 B 
X RB0/INT 6 -1000 -300 200 R 40 40 1 1 B 
X RB1/RX/DT 7 -1000 -500 200 R 40 40 1 1 B 
X RB2/TX/CK 8 -1000 -700 200 R 40 40 1 1 B 
X RB3/CCP1 9 -1000 -900 200 R 40 40 1 1 B 
X RB4/PGM 10 1400 -900 200 L 40 40 1 1 B 
X RB5 11 1400 -700 200 L 40 40 1 1 B 
X RB6/T1OSO/T1CKI 12 1400 -500 200 L 40 40 1 1 B 
X RB7/T1OSI 13 1400 -300 200 L 40 40 1 1 B 
X VDD 14 1400 -100 200 L 40 40 1 1 W 
X VSS 5 -1000 -100 200 R 40 40 1 1 W 
ENDDRAW
ENDDEF

#End Library