EESchema-LIBRARY Version 2.3  29/04/2008-12:23:21
# Converted with eagle2kicad.ulp Version 0.9
# Device count = 5
#
# Dev Name: PICAXE-08M
# Package Name: DIL8
# Dev Tech: ''
# Dev Prefix: 
# Gate count = 1
#
DEF PICAXE-08M ?? 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: PICAXE-08M
DRAW
P 2 1 0 0 400 200 -400 200
P 2 1 0 0 -400 200 -400 -300
P 2 1 0 0 -400 -300 400 -300
P 2 1 0 0 400 -300 400 200
X I3 4 -500 -200 100 R 40 40 1 1 I 
X IO1 6 500 -100 100 L 40 40 1 1 B 
X IO4 3 -500 -100 100 R 40 40 1 1 B 
X PWM/IO2 5 500 -200 100 L 40 40 1 1 B 
X RX 2 -500 0 100 R 40 40 1 1 I 
X TX/O0 7 500 0 100 L 40 40 1 1 O 
X VDD 1 -500 100 100 R 40 40 1 1 W 
X VSS 8 500 100 100 L 40 40 1 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: PICAXE-14M
# Package Name: DIL14
# Dev Tech: ''
# Dev Prefix: 
# Gate count = 1
#
DEF PICAXE-14M ?? 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: PICAXE-14M
DRAW
P 2 1 0 0 400 400 -400 400
P 2 1 0 0 -400 400 -400 -400
P 2 1 0 0 -400 -400 400 -400
P 2 1 0 0 400 -400 400 400
X C0/O3 10 500 -100 100 L 40 40 1 1 B 
X C1/O4 9 500 -200 100 L 40 40 1 1 B 
X C2/O5 8 500 -300 100 L 40 40 1 1 B 
X I0/C3 7 -500 -300 100 R 40 40 1 1 B 
X I1/C4 6 -500 -200 100 R 40 40 1 1 B 
X I2/C5 5 -500 -100 100 R 40 40 1 1 B 
X I3 4 -500 0 100 R 40 40 1 1 I 
X I4 3 -500 100 100 R 40 40 1 1 I 
X O1 12 500 100 100 L 40 40 1 1 O 
X O2 11 500 0 100 L 40 40 1 1 O 
X RX 2 -500 200 100 R 40 40 1 1 I 
X TX/O0 13 500 200 100 L 40 40 1 1 O 
X VDD 1 -500 300 100 R 40 40 1 1 W 
X VSS 14 500 300 100 L 40 40 1 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: PICAXE-18X
# Package Name: DIL18
# Dev Tech: ''
# Dev Prefix: 
# Gate count = 1
#
DEF PICAXE-18X ?? 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: PICAXE-18X
DRAW
P 2 1 0 0 400 500 -400 500
P 2 1 0 0 -400 500 -400 -500
P 2 1 0 0 -400 -500 400 -500
P 2 1 0 0 400 -500 400 500
X I0 17 -500 -400 100 R 40 40 1 1 I 
X I1 18 -500 -300 100 R 40 40 1 1 I 
X I2 1 -500 -200 100 R 40 40 1 1 I 
X I6 15 -500 -100 100 R 40 40 1 1 I 
X I7 16 -500 0 100 R 40 40 1 1 I 
X O0 6 500 -400 100 L 40 40 1 1 O 
X O2 8 500 -200 100 L 40 40 1 1 O 
X O5 11 500 100 100 L 40 40 1 1 O 
X O6 12 500 200 100 L 40 40 1 1 O 
X O7 13 500 300 100 L 40 40 1 1 O 
X PWM/O3 9 500 -100 100 L 40 40 1 1 O 
X RESET 4 -500 100 100 R 40 40 1 1 I 
X RX 3 -500 200 100 R 40 40 1 1 I 
X SCL/O4 10 500 0 100 L 40 40 1 1 O 
X SDA/O1 7 500 -300 100 L 40 40 1 1 O 
X TX 2 -500 300 100 R 40 40 1 1 O 
X VDD 14 -500 400 100 R 40 40 1 1 W 
X VSS 5 500 400 100 L 40 40 1 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: PICAXE-28X1
# Package Name: DIL28
# Dev Tech: ''
# Dev Prefix: 
# Gate count = 1
#
DEF PICAXE-28X1 ?? 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: PICAXE-28X1
DRAW
P 2 1 0 0 400 700 -400 700
P 2 1 0 0 -400 700 -400 -800
P 2 1 0 0 -400 -800 400 -800
P 2 1 0 0 400 -800 400 700
X ADC0 2 500 -700 100 L 40 40 1 1 I 
X ADC1 3 500 -600 100 L 40 40 1 1 I 
X ADC2 4 500 -500 100 L 40 40 1 1 I 
X ADC3 5 500 -400 100 L 40 40 1 1 I 
X IO0 11 -500 0 100 R 40 40 1 1 B 
X IO1/PWM 12 -500 -100 100 R 40 40 1 1 B 
X IO2/PWM 13 -500 -200 100 R 40 40 1 1 B 
X IO3/SCL 14 -500 -300 100 R 40 40 1 1 B 
X IO4/SDA 15 -500 -400 100 R 40 40 1 1 B 
X IO5 16 -500 -500 100 R 40 40 1 1 B 
X IO6 17 -500 -600 100 R 40 40 1 1 B 
X IO7 18 -500 -700 100 R 40 40 1 1 B 
X O0 21 500 -300 100 L 40 40 1 1 O 
X O1 22 500 -200 100 L 40 40 1 1 O 
X O2 23 500 -100 100 L 40 40 1 1 O 
X O3 24 500 0 100 L 40 40 1 1 O 
X O4 25 500 100 100 L 40 40 1 1 O 
X O5 26 500 200 100 L 40 40 1 1 O 
X O6 27 500 300 100 L 40 40 1 1 O 
X O7 28 500 400 100 L 40 40 1 1 O 
X RESET 1 -500 300 100 R 40 40 1 1 I 
X RX 6 -500 400 100 R 40 40 1 1 I 
X TX 7 -500 500 100 R 40 40 1 1 O 
X VDD 20 -500 600 100 R 40 40 1 1 W 
X VSS1 8 500 600 100 L 40 40 1 1 W 
X VSS2 19 500 500 100 L 40 40 1 1 W 
X XTAL1 9 -500 200 100 R 40 40 1 1 P 
X XTAL2 10 -500 100 100 R 40 40 1 1 P 
ENDDRAW
ENDDEF

#
# Dev Name: PICAXE-40X1
# Package Name: DIL40
# Dev Tech: ''
# Dev Prefix: 
# Gate count = 1
#
DEF PICAXE-40X1 ?? 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: PICAXE-40X1
DRAW
P 2 1 0 0 400 1100 -400 1100
P 2 1 0 0 -400 1100 -400 -1000
P 2 1 0 0 -400 -1000 400 -1000
P 2 1 0 0 400 -1000 400 1100
X ADC0 2 500 -600 100 L 40 40 1 1 I 
X ADC1 3 500 -500 100 L 40 40 1 1 I 
X ADC2 4 500 -400 100 L 40 40 1 1 I 
X ADC3 5 500 -300 100 L 40 40 1 1 I 
X ADC5 8 500 -200 100 L 40 40 1 1 I 
X ADC6 9 500 -100 100 L 40 40 1 1 I 
X ADC7 10 500 0 100 L 40 40 1 1 I 
X I0 19 -500 -500 100 R 40 40 1 1 B 
X I1 20 -500 -600 100 R 40 40 1 1 I 
X I2 21 -500 -700 100 R 40 40 1 1 I 
X I3 22 -500 -800 100 R 40 40 1 1 I 
X I4 27 -500 -900 100 R 40 40 1 1 I 
X I5 28 500 -900 100 L 40 40 1 1 I 
X I6 29 500 -800 100 L 40 40 1 1 I 
X I7 30 500 -700 100 L 40 40 1 1 I 
X IO0 15 -500 300 100 R 40 40 1 1 B 
X IO1/PWM 16 -500 200 100 R 40 40 1 1 B 
X IO2/PWM 17 -500 100 100 R 40 40 1 1 B 
X IO3/SCL 18 -500 0 100 R 40 40 1 1 B 
X IO4/SDA 23 -500 -100 100 R 40 40 1 1 B 
X IO5 24 -500 -200 100 R 40 40 1 1 B 
X IO6 25 -500 -300 100 R 40 40 1 1 B 
X IO7 26 -500 -400 100 R 40 40 1 1 B 
X O0 33 500 100 100 L 40 40 1 1 O 
X O1 34 500 200 100 L 40 40 1 1 O 
X O2 35 500 300 100 L 40 40 1 1 O 
X O3 36 500 400 100 L 40 40 1 1 O 
X O4 37 500 500 100 L 40 40 1 1 O 
X O5 38 500 600 100 L 40 40 1 1 O 
X O6 39 500 700 100 L 40 40 1 1 O 
X O7 40 500 800 100 L 40 40 1 1 O 
X RESET 1 -500 600 100 R 40 40 1 1 I 
X RX 6 -500 700 100 R 40 40 1 1 I 
X TX 7 -500 800 100 R 40 40 1 1 O 
X VDD1 11 -500 1000 100 R 40 40 1 1 W 
X VDD2 32 -500 900 100 R 40 40 1 1 W 
X VSS1 12 500 1000 100 L 40 40 1 1 W 
X VSS2 31 500 900 100 L 40 40 1 1 W 
X XTAL1 13 -500 500 100 R 40 40 1 1 P 
X XTAL2 14 -500 400 100 R 40 40 1 1 P 
ENDDRAW
ENDDEF

#End Library