EESchema-LIBRARY Version 2.3 29/04/2008-12:24:03 # Converted with eagle2kicad.ulp Version 0.9 # Device count = 54 # # Dev Name: DA108S1 # Package Name: SO08 # Dev Tech: '' # Dev Prefix: D # Gate count = 6 # DEF DA108S1 D 0 40 Y Y 6 L N # Gate Name: -1 # Symbol Name: D-1 F0 "D" 0 100 50 H V L B F1 "DA108S1" 0 0 50 H V L B F2 "st-microelectronics-SO08" 0 150 50 H I C C DRAW C -100 0 5 1 1 0 F X K 1 100 0 200 L 40 40 1 1 P # Gate Name: -2 # Symbol Name: D-1 C -100 0 5 2 1 0 F X K 2 100 0 200 L 40 40 2 1 P # Gate Name: -3 # Symbol Name: D-2-1 P 2 3 0 0 50 50 0 150 P 2 3 0 0 0 150 -50 50 P 2 3 0 0 -50 150 0 150 P 2 3 0 0 -50 50 50 50 P 2 3 0 0 0 150 50 150 P 2 3 0 0 50 -150 0 -50 P 2 3 0 0 0 -50 -50 -150 P 2 3 0 0 -50 -50 0 -50 P 2 3 0 0 0 150 0 -50 P 2 3 0 0 0 -165 0 -50 P 2 3 0 0 -50 -150 50 -150 P 2 3 0 0 0 -50 50 -50 P 2 3 0 0 0 150 0 165 C 0 0 5 3 1 0 F T 0 -25 -200 50 0 3 0 REF1 T 0 -50 200 50 0 3 0 REF2 X K 3 200 0 200 L 40 40 3 1 P # Gate Name: -4 # Symbol Name: D-2-1 P 2 4 0 0 50 50 0 150 P 2 4 0 0 0 150 -50 50 P 2 4 0 0 -50 150 0 150 P 2 4 0 0 -50 50 50 50 P 2 4 0 0 0 150 50 150 P 2 4 0 0 50 -150 0 -50 P 2 4 0 0 0 -50 -50 -150 P 2 4 0 0 -50 -50 0 -50 P 2 4 0 0 0 150 0 -50 P 2 4 0 0 0 -165 0 -50 P 2 4 0 0 -50 -150 50 -150 P 2 4 0 0 0 -50 50 -50 P 2 4 0 0 0 150 0 165 C 0 0 5 4 1 0 F T 0 -25 -200 50 0 4 0 REF1 T 0 -50 200 50 0 4 0 REF2 X K 4 200 0 200 L 40 40 4 1 P # Gate Name: _1 # Symbol Name: REF P 2 5 0 0 50 50 0 150 P 2 5 0 0 0 150 -50 50 P 2 5 0 0 -50 150 0 150 P 2 5 0 0 0 150 50 150 P 2 5 0 0 50 -150 0 -50 P 2 5 0 0 0 -50 -50 -150 P 2 5 0 0 -50 -150 50 -150 P 2 5 0 0 -50 50 50 50 P 2 5 0 0 0 100 0 -50 P 2 5 0 0 0 -50 0 -100 P 2 5 0 0 -50 -50 0 -50 P 2 5 0 0 0 -50 50 -50 T 0 -125 -175 50 0 5 0 REF1 T 0 -150 175 50 0 5 0 REF2 X REF1 8 0 -300 200 U 40 40 5 1 P X REF2 5 0 300 200 D 40 40 5 1 P # Gate Name: _2 # Symbol Name: REF P 2 6 0 0 50 50 0 150 P 2 6 0 0 0 150 -50 50 P 2 6 0 0 -50 150 0 150 P 2 6 0 0 0 150 50 150 P 2 6 0 0 50 -150 0 -50 P 2 6 0 0 0 -50 -50 -150 P 2 6 0 0 -50 -150 50 -150 P 2 6 0 0 -50 50 50 50 P 2 6 0 0 0 100 0 -50 P 2 6 0 0 0 -50 0 -100 P 2 6 0 0 -50 -50 0 -50 P 2 6 0 0 0 -50 50 -50 T 0 -125 -175 50 0 6 0 REF1 T 0 -150 175 50 0 6 0 REF2 X REF1 7 0 -300 200 U 40 40 6 1 P X REF2 6 0 300 200 D 40 40 6 1 P ENDDRAW ENDDEF # # Dev Name: DA112S1 # Package Name: SO08 # Dev Tech: '' # Dev Prefix: D # Gate count = 7 # DEF DA112S1 D 0 40 Y Y 7 L N # Gate Name: -1 # Symbol Name: D-1 F0 "D" 0 100 50 H V L B F1 "DA112S1" 0 0 50 H V L B F2 "st-microelectronics-SO08" 0 150 50 H I C C DRAW C -100 0 5 1 1 0 F X K 5 100 0 200 L 40 40 1 1 P # Gate Name: -2 # Symbol Name: D-2-1 P 2 2 0 0 50 50 0 150 P 2 2 0 0 0 150 -50 50 P 2 2 0 0 -50 150 0 150 P 2 2 0 0 -50 50 50 50 P 2 2 0 0 0 150 50 150 P 2 2 0 0 50 -150 0 -50 P 2 2 0 0 0 -50 -50 -150 P 2 2 0 0 -50 -50 0 -50 P 2 2 0 0 0 150 0 -50 P 2 2 0 0 0 -165 0 -50 P 2 2 0 0 -50 -150 50 -150 P 2 2 0 0 0 -50 50 -50 P 2 2 0 0 0 150 0 165 C 0 0 5 2 1 0 F T 0 -25 -200 50 0 2 0 REF1 T 0 -50 200 50 0 2 0 REF2 X K 4 200 0 200 L 40 40 2 1 P # Gate Name: -3 # Symbol Name: D-2-1 P 2 3 0 0 50 50 0 150 P 2 3 0 0 0 150 -50 50 P 2 3 0 0 -50 150 0 150 P 2 3 0 0 -50 50 50 50 P 2 3 0 0 0 150 50 150 P 2 3 0 0 50 -150 0 -50 P 2 3 0 0 0 -50 -50 -150 P 2 3 0 0 -50 -50 0 -50 P 2 3 0 0 0 150 0 -50 P 2 3 0 0 0 -165 0 -50 P 2 3 0 0 -50 -150 50 -150 P 2 3 0 0 0 -50 50 -50 P 2 3 0 0 0 150 0 165 C 0 0 5 3 1 0 F T 0 -25 -200 50 0 3 0 REF1 T 0 -50 200 50 0 3 0 REF2 X K 3 200 0 200 L 40 40 3 1 P # Gate Name: -4 # Symbol Name: D-2-1 P 2 4 0 0 50 50 0 150 P 2 4 0 0 0 150 -50 50 P 2 4 0 0 -50 150 0 150 P 2 4 0 0 -50 50 50 50 P 2 4 0 0 0 150 50 150 P 2 4 0 0 50 -150 0 -50 P 2 4 0 0 0 -50 -50 -150 P 2 4 0 0 -50 -50 0 -50 P 2 4 0 0 0 150 0 -50 P 2 4 0 0 0 -165 0 -50 P 2 4 0 0 -50 -150 50 -150 P 2 4 0 0 0 -50 50 -50 P 2 4 0 0 0 150 0 165 C 0 0 5 4 1 0 F T 0 -25 -200 50 0 4 0 REF1 T 0 -50 200 50 0 4 0 REF2 X K 2 200 0 200 L 40 40 4 1 P # Gate Name: -5 # Symbol Name: D-2-1 P 2 5 0 0 50 50 0 150 P 2 5 0 0 0 150 -50 50 P 2 5 0 0 -50 150 0 150 P 2 5 0 0 -50 50 50 50 P 2 5 0 0 0 150 50 150 P 2 5 0 0 50 -150 0 -50 P 2 5 0 0 0 -50 -50 -150 P 2 5 0 0 -50 -50 0 -50 P 2 5 0 0 0 150 0 -50 P 2 5 0 0 0 -165 0 -50 P 2 5 0 0 -50 -150 50 -150 P 2 5 0 0 0 -50 50 -50 P 2 5 0 0 0 150 0 165 C 0 0 5 5 1 0 F T 0 -25 -200 50 0 5 0 REF1 T 0 -50 200 50 0 5 0 REF2 X K 1 200 0 200 L 40 40 5 1 P # Gate Name: -6 # Symbol Name: D-2-1 P 2 6 0 0 50 50 0 150 P 2 6 0 0 0 150 -50 50 P 2 6 0 0 -50 150 0 150 P 2 6 0 0 -50 50 50 50 P 2 6 0 0 0 150 50 150 P 2 6 0 0 50 -150 0 -50 P 2 6 0 0 0 -50 -50 -150 P 2 6 0 0 -50 -50 0 -50 P 2 6 0 0 0 150 0 -50 P 2 6 0 0 0 -165 0 -50 P 2 6 0 0 -50 -150 50 -150 P 2 6 0 0 0 -50 50 -50 P 2 6 0 0 0 150 0 165 C 0 0 5 6 1 0 F T 0 -25 -200 50 0 6 0 REF1 T 0 -50 200 50 0 6 0 REF2 X K 7 200 0 200 L 40 40 6 1 P # Gate Name: _1 # Symbol Name: REF P 2 7 0 0 50 50 0 150 P 2 7 0 0 0 150 -50 50 P 2 7 0 0 -50 150 0 150 P 2 7 0 0 0 150 50 150 P 2 7 0 0 50 -150 0 -50 P 2 7 0 0 0 -50 -50 -150 P 2 7 0 0 -50 -150 50 -150 P 2 7 0 0 -50 50 50 50 P 2 7 0 0 0 100 0 -50 P 2 7 0 0 0 -50 0 -100 P 2 7 0 0 -50 -50 0 -50 P 2 7 0 0 0 -50 50 -50 T 0 -125 -175 50 0 7 0 REF1 T 0 -150 175 50 0 7 0 REF2 X REF1 8 0 -300 200 U 40 40 7 1 P X REF2 6 0 300 200 D 40 40 7 1 P ENDDRAW ENDDEF # # Dev Name: L293D # Package Name: DIL16 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF L293D IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: L293D F0 "IC" -400 840 50 H V L B F1 "L293D" -400 -900 50 H V L B F2 "st-microelectronics-DIL16" 0 150 50 H I C C DRAW P 2 1 0 0 -400 800 -400 -800 P 2 1 0 0 -400 -800 400 -800 P 2 1 0 0 400 -800 400 800 P 2 1 0 0 400 800 -400 800 X 1-2EN 1 -600 700 200 R 40 40 1 1 I X 1A 2 -600 500 200 R 40 40 1 1 I X 1Y 3 -600 300 200 R 40 40 1 1 O X 2A 7 -600 -500 200 R 40 40 1 1 I X 2Y 6 -600 -300 200 R 40 40 1 1 O X 3-4EN 9 600 -700 200 L 40 40 1 1 I X 3A 10 600 -500 200 L 40 40 1 1 I X 3Y 11 600 -300 200 L 40 40 1 1 O X 4A 15 600 500 200 L 40 40 1 1 I X 4Y 14 600 300 200 L 40 40 1 1 O X GND1 4 -600 100 200 R 40 40 1 1 W X GND2 5 -600 -100 200 R 40 40 1 1 W X GND3 13 600 100 200 L 40 40 1 1 W X GND4 12 600 -100 200 L 40 40 1 1 W X VCC1 16 600 700 200 L 40 40 1 1 W X VCC2 8 -600 -700 200 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: L297 # Package Name: DIL20 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF L297 IC 0 40 Y Y 1 L N # Gate Name: L297 # Symbol Name: L297 F0 "IC" -500 725 50 H V L B F1 "L297" -500 -1399 50 H V L B F2 "st-microelectronics-DIL20" 0 150 50 H I C C DRAW P 2 1 0 0 -500 -1300 500 -1300 P 2 1 0 0 500 -1300 500 700 P 2 1 0 0 500 700 -500 700 P 2 1 0 0 -500 700 -500 -1300 X A 4 -700 -500 200 R 40 40 1 1 O X B 6 -700 -600 200 R 40 40 1 1 O X C 7 -700 -700 200 R 40 40 1 1 O X CLOCK 18 -700 0 200 R 40 40 1 1 I X CNTL 11 700 -700 200 L 40 40 1 1 I X CW/CCW 17 -700 100 200 R 40 40 1 1 I X D 9 -700 -800 200 R 40 40 1 1 O X ENABLE 10 -700 -200 200 R 40 40 1 1 I X GND 2 -700 -1200 200 R 40 40 1 1 W X H/F 19 700 200 200 L 40 40 1 1 I X HOME 3 700 -1100 200 L 40 40 1 1 O X INH1 5 -700 -900 200 R 40 40 1 1 O X INH2 8 -700 -1000 200 R 40 40 1 1 O X OSC 16 -700 200 200 R 40 40 1 1 B X RESET 20 -700 400 200 R 40 40 1 1 I X SENS1 14 700 -300 200 L 40 40 1 1 O X SENS2 13 700 -500 200 L 40 40 1 1 O X SYNC 1 700 -900 200 L 40 40 1 1 O X VCC 12 -700 600 200 R 40 40 1 1 W X VREF 15 700 400 200 L 40 40 1 1 I ENDDRAW ENDDEF # # Dev Name: L298 # Package Name: MULTIWATT-15 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF L298 IC 0 40 Y Y 1 L N # Gate Name: L298 # Symbol Name: L298 F0 "IC" -500 750 50 H V L B F1 "L298" -500 -600 50 H V L B F2 "st-microelectronics-MULTIWATT-15" 0 150 50 H I C C DRAW P 2 1 0 0 -500 700 500 700 P 2 1 0 0 500 700 500 -500 P 2 1 0 0 500 -500 -500 -500 P 2 1 0 0 -500 -500 -500 700 X ENABLE_A 6 -600 400 100 R 40 40 1 1 I X ENABLE_B 11 -600 300 100 R 40 40 1 1 I X GND 8 -600 -400 100 R 40 40 1 1 W X INPUT1 5 -600 100 100 R 40 40 1 1 I X INPUT2 7 -600 0 100 R 40 40 1 1 I X INPUT3 10 -600 -100 100 R 40 40 1 1 I X INPUT4 12 -600 -200 100 R 40 40 1 1 I X OUT1 2 600 100 100 L 40 40 1 1 O X OUT2 3 600 0 100 L 40 40 1 1 O X OUT3 13 600 -100 100 L 40 40 1 1 O X OUT4 14 600 -200 100 L 40 40 1 1 O X SEN_A 1 600 400 100 L 40 40 1 1 I X SEN_B 15 600 300 100 L 40 40 1 1 I X VCC 9 -600 600 100 R 40 40 1 1 W X VS 4 600 600 100 L 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: L6201 # Package Name: SO20 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF L6201 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: L620X F0 "IC" -600 350 50 H V L B F1 "L6201" -600 -500 50 H V L B F2 "st-microelectronics-SO20" 0 150 50 H I C C DRAW P 2 1 0 0 -600 300 700 300 P 2 1 0 0 700 300 700 -400 P 2 1 0 0 700 -400 -600 -400 P 2 1 0 0 -600 -400 -600 300 T 0 410 240 60 0 1 0 VS T 0 420 -330 60 0 1 0 GND X CBOOT1 12 800 100 100 L 40 40 1 1 I X CBOOT2 19 800 -200 100 L 40 40 1 1 I X ENABLE 2 -700 100 100 R 40 40 1 1 I X GND 4 600 -500 100 U 40 40 1 1 W X GND@1 5 500 -500 100 U 40 40 1 1 W X GND@2 6 400 -500 100 U 40 40 1 1 W X GND@3 14 300 -500 100 U 40 40 1 1 W X GND@4 15 200 -500 100 U 40 40 1 1 W X GND@5 16 100 -500 100 U 40 40 1 1 W X IN1 13 -700 0 100 R 40 40 1 1 I X IN2 18 -700 -100 100 R 40 40 1 1 I X OUT1 11 800 0 100 L 40 40 1 1 O X OUT2 9 800 -100 100 L 40 40 1 1 O X SENSE 1 -700 -200 100 R 40 40 1 1 I X VREF 20 -700 200 100 R 40 40 1 1 I X VS 10 400 400 100 D 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: L6202 # Package Name: DIL18 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF L6202 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: L620X F0 "IC" -600 350 50 H V L B F1 "L6202" -600 -500 50 H V L B F2 "st-microelectronics-DIL18" 0 150 50 H I C C DRAW P 2 1 0 0 -600 300 700 300 P 2 1 0 0 700 300 700 -400 P 2 1 0 0 700 -400 -600 -400 P 2 1 0 0 -600 -400 -600 300 T 0 410 240 60 0 1 0 VS T 0 420 -330 60 0 1 0 GND X CBOOT1 11 800 100 100 L 40 40 1 1 I X CBOOT2 17 800 -200 100 L 40 40 1 1 I X ENABLE 2 -700 100 100 R 40 40 1 1 I X GND 4 600 -500 100 U 40 40 1 1 W X GND@1 5 500 -500 100 U 40 40 1 1 W X GND@2 6 400 -500 100 U 40 40 1 1 W X GND@3 13 300 -500 100 U 40 40 1 1 W X GND@4 14 200 -500 100 U 40 40 1 1 W X GND@5 15 100 -500 100 U 40 40 1 1 W X IN1 12 -700 0 100 R 40 40 1 1 I X IN2 16 -700 -100 100 R 40 40 1 1 I X OUT1 10 800 0 100 L 40 40 1 1 O X OUT2 8 800 -100 100 L 40 40 1 1 O X SENSE 1 -700 -200 100 R 40 40 1 1 I X VREF 18 -700 200 100 R 40 40 1 1 I X VS 9 400 400 100 D 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: L6114 # Package Name: DIL20 # Dev Tech: '' # Dev Prefix: IC # Gate count = 6 # DEF L6114 IC 0 40 Y Y 6 L N # Gate Name: G$1 # Symbol Name: L6115 F0 "IC" -400 750 50 H V L B F1 "L6114" -400 -800 50 H V L B F2 "st-microelectronics-DIL20" 0 150 50 H I C C DRAW P 2 1 0 0 -400 700 500 700 P 2 1 0 0 500 700 500 -700 P 2 1 0 0 500 -700 -400 -700 P 2 1 0 0 -400 -700 -400 700 T 0 240 640 60 0 1 0 VCC T 0 120 -630 60 0 1 0 GND X D1 5 600 500 100 L 40 40 1 1 P X D2 7 600 200 100 L 40 40 1 1 P X D3 14 600 -100 100 L 40 40 1 1 P X D4 16 600 -500 100 L 40 40 1 1 P X ENABLE 9 -500 600 100 R 40 40 1 1 I X GND 1 100 -800 100 U 40 40 1 1 W X IN1 10 -500 400 100 R 40 40 1 1 I X IN2 11 -500 100 100 R 40 40 1 1 I X IN3 12 -500 -200 100 R 40 40 1 1 I X IN4 13 -500 -600 100 R 40 40 1 1 I X S1 4 600 400 100 L 40 40 1 1 P X S2 6 600 100 100 L 40 40 1 1 P X S3 15 600 -200 100 L 40 40 1 1 P X S4 17 600 -600 100 L 40 40 1 1 P X VCC 8 200 800 100 D 40 40 1 1 W # Gate Name: P1 # Symbol Name: GND X GND 2 0 -100 100 U 40 40 2 1 W # Gate Name: P2 # Symbol Name: GND X GND 3 0 -100 100 U 40 40 3 1 W # Gate Name: P3 # Symbol Name: GND X GND 18 0 -100 100 U 40 40 4 1 W # Gate Name: P4 # Symbol Name: GND X GND 19 0 -100 100 U 40 40 5 1 W # Gate Name: P5 # Symbol Name: GND X GND 20 0 -100 100 U 40 40 6 1 W ENDDRAW ENDDEF # # Dev Name: L6115 # Package Name: MULTIWATT-15 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF L6115 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: L6115 F0 "IC" -400 750 50 H V L B F1 "L6115" -400 -800 50 H V L B F2 "st-microelectronics-MULTIWATT-15" 0 150 50 H I C C DRAW P 2 1 0 0 -400 700 500 700 P 2 1 0 0 500 700 500 -700 P 2 1 0 0 500 -700 -400 -700 P 2 1 0 0 -400 -700 -400 700 T 0 240 640 60 0 1 0 VCC T 0 120 -630 60 0 1 0 GND X D1 2 600 500 100 L 40 40 1 1 P X D2 4 600 200 100 L 40 40 1 1 P X D3 12 600 -100 100 L 40 40 1 1 P X D4 14 600 -500 100 L 40 40 1 1 P X ENABLE 6 -500 600 100 R 40 40 1 1 I X GND 8 100 -800 100 U 40 40 1 1 W X IN1 7 -500 400 100 R 40 40 1 1 I X IN2 9 -500 100 100 R 40 40 1 1 I X IN3 10 -500 -200 100 R 40 40 1 1 I X IN4 11 -500 -600 100 R 40 40 1 1 I X S1 1 600 400 100 L 40 40 1 1 P X S2 3 600 100 100 L 40 40 1 1 P X S3 13 600 -200 100 L 40 40 1 1 P X S4 15 600 -600 100 L 40 40 1 1 P X VCC 5 200 800 100 D 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: L6122 # Package Name: DIL20 # Dev Tech: '' # Dev Prefix: IC # Gate count = 6 # DEF L6122 IC 0 40 Y Y 6 L N # Gate Name: G$1 # Symbol Name: L6122 F0 "IC" -400 650 50 H V L B F1 "L6122" -400 -500 50 H V L B F2 "st-microelectronics-DIL20" 0 150 50 H I C C DRAW P 2 1 0 0 -400 600 500 600 P 2 1 0 0 500 600 500 -400 P 2 1 0 0 500 -400 -400 -400 P 2 1 0 0 -400 -400 -400 600 T 0 240 540 60 0 1 0 VCC T 0 120 -330 60 0 1 0 GND X D1 17 600 400 100 L 40 40 1 1 P X D2 16 600 100 100 L 40 40 1 1 P X D3 15 600 -200 100 L 40 40 1 1 P X ENABLE 9 -500 500 100 R 40 40 1 1 I X GND 1 100 -500 100 U 40 40 1 1 W X IN1 11 -500 300 100 R 40 40 1 1 I X IN2 12 -500 0 100 R 40 40 1 1 I X IN3 13 -500 -300 100 R 40 40 1 1 I X S1 4 600 300 100 L 40 40 1 1 P X S2 5 600 0 100 L 40 40 1 1 P X S3 6 600 -300 100 L 40 40 1 1 P X VCC 7 200 700 100 D 40 40 1 1 W # Gate Name: P1 # Symbol Name: GND X GND 2 0 -100 100 U 40 40 2 1 W # Gate Name: P2 # Symbol Name: GND X GND 3 0 -100 100 U 40 40 3 1 W # Gate Name: P3 # Symbol Name: GND X GND 18 0 -100 100 U 40 40 4 1 W # Gate Name: P4 # Symbol Name: GND X GND 19 0 -100 100 U 40 40 5 1 W # Gate Name: P5 # Symbol Name: GND X GND 20 0 -100 100 U 40 40 6 1 W ENDDRAW ENDDEF # # Dev Name: L6123 # Package Name: MULTIWATT-15 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF L6123 IC 0 40 Y Y 1 L N # Gate Name: P1 # Symbol Name: L6122 F0 "IC" -400 650 50 H V L B F1 "L6123" -400 -500 50 H V L B F2 "st-microelectronics-MULTIWATT-15" 0 150 50 H I C C DRAW P 2 1 0 0 -400 600 500 600 P 2 1 0 0 500 600 500 -400 P 2 1 0 0 500 -400 -400 -400 P 2 1 0 0 -400 -400 -400 600 T 0 240 540 60 0 1 0 VCC T 0 120 -330 60 0 1 0 GND X D1 15 600 400 100 L 40 40 1 1 P X D2 14 600 100 100 L 40 40 1 1 P X D3 12 600 -200 100 L 40 40 1 1 P X ENABLE 7 -500 500 100 R 40 40 1 1 I X GND 8 100 -500 100 U 40 40 1 1 W X IN1 9 -500 300 100 R 40 40 1 1 I X IN2 10 -500 0 100 R 40 40 1 1 I X IN3 11 -500 -300 100 R 40 40 1 1 I X S1 1 600 300 100 L 40 40 1 1 P X S2 3 600 0 100 L 40 40 1 1 P X S3 5 600 -300 100 L 40 40 1 1 P X VCC 6 200 700 100 D 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: L6201PS # Package Name: POWERSO-20 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF L6201PS IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: L6201 F0 "IC" -500 350 50 H V L B F1 "L6201PS" -500 -500 50 H V L B F2 "st-microelectronics-POWERSO-20" 0 150 50 H I C C DRAW P 2 1 0 0 -500 300 500 300 P 2 1 0 0 500 300 500 -400 P 2 1 0 0 500 -400 -500 -400 P 2 1 0 0 -500 -400 -500 300 T 0 210 240 60 0 1 0 VS T 0 220 -330 60 0 1 0 GND X CBOOT1 7 600 100 100 L 40 40 1 1 I X CBOOT2 14 600 -200 100 L 40 40 1 1 I X ENABLE 17 -600 100 100 R 40 40 1 1 I X GND 1 400 -500 100 U 40 40 1 1 W X GND@1 10 300 -500 100 U 40 40 1 1 W X GND@2 11 200 -500 100 U 40 40 1 1 W X GND@3 20 100 -500 100 U 40 40 1 1 W X IN1 8 -600 0 100 R 40 40 1 1 I X IN2 13 -600 -100 100 R 40 40 1 1 I X OUT1 6 600 0 100 L 40 40 1 1 O X OUT2 4 600 -100 100 L 40 40 1 1 O X SENSE 16 -600 -200 100 R 40 40 1 1 I X VREF 15 -600 200 100 R 40 40 1 1 I X VS 5 200 400 100 D 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: L6203 # Package Name: MULTIWATT-11 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF L6203 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: L6203 F0 "IC" -500 350 50 H V L B F1 "L6203" -500 -500 50 H V L B F2 "st-microelectronics-MULTIWATT-11" 0 150 50 H I C C DRAW P 2 1 0 0 -500 300 500 300 P 2 1 0 0 500 300 500 -400 P 2 1 0 0 500 -400 -500 -400 P 2 1 0 0 -500 -400 -500 300 T 0 210 240 60 0 1 0 VS T 0 220 -330 60 0 1 0 GND X CBOOT1 4 600 100 100 L 40 40 1 1 I X CBOOT2 8 600 -200 100 L 40 40 1 1 I X ENABLE 11 -600 100 100 R 40 40 1 1 I X GND 6 200 -500 100 U 40 40 1 1 W X IN1 5 -600 0 100 R 40 40 1 1 I X IN2 7 -600 -100 100 R 40 40 1 1 I X OUT1 3 600 0 100 L 40 40 1 1 O X OUT2 1 600 -100 100 L 40 40 1 1 O X SENSE 10 -600 -200 100 R 40 40 1 1 I X VREF 9 -600 200 100 R 40 40 1 1 I X VS 2 200 400 100 D 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: L6204 # Package Name: DIL20 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF L6204 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: L6204 F0 "IC" -600 650 50 H V L B F1 "L6204" -600 -700 50 H V L B F2 "st-microelectronics-DIL20" 0 150 50 H I C C DRAW P 2 1 0 0 -600 600 700 600 P 2 1 0 0 700 600 700 -600 P 2 1 0 0 700 -600 -600 -600 P 2 1 0 0 -600 -600 -600 600 T 0 340 540 60 0 1 0 VS1 T 0 420 -530 60 0 1 0 GND T 0 540 540 60 0 1 0 VS2 X BOOTSTRAP 11 -700 -500 100 R 40 40 1 1 I X ENABLE1 3 -700 100 100 R 40 40 1 1 I X ENABLE2 8 -700 -300 100 R 40 40 1 1 I X GND 5 600 -700 100 U 40 40 1 1 W X GND@1 6 500 -700 100 U 40 40 1 1 W X GND@2 15 400 -700 100 U 40 40 1 1 W X GND@3 16 300 -700 100 U 40 40 1 1 W X IN1 2 -700 300 100 R 40 40 1 1 I X IN2 19 -700 200 100 R 40 40 1 1 I X IN3 9 -700 -100 100 R 40 40 1 1 I X IN4 12 -700 -200 100 R 40 40 1 1 I X OUT1 4 800 300 100 L 40 40 1 1 O X OUT2 18 800 200 100 L 40 40 1 1 O X OUT3 7 800 -100 100 L 40 40 1 1 O X OUT4 13 800 -200 100 L 40 40 1 1 O X SENSE1 1 800 100 100 L 40 40 1 1 I X SENSE2 10 800 -300 100 L 40 40 1 1 I X VBOOT 20 -700 500 100 R 40 40 1 1 I X VS1 17 300 700 100 D 40 40 1 1 W X VS2 14 500 700 100 D 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: L6204D # Package Name: SO28 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF L6204D IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: L6204 F0 "IC" -600 650 50 H V L B F1 "L6204D" -600 -700 50 H V L B F2 "st-microelectronics-SO28" 0 150 50 H I C C DRAW P 2 1 0 0 -600 600 700 600 P 2 1 0 0 700 600 700 -600 P 2 1 0 0 700 -600 -600 -600 P 2 1 0 0 -600 -600 -600 600 T 0 340 540 60 0 1 0 VS1 T 0 420 -530 60 0 1 0 GND T 0 540 540 60 0 1 0 VS2 X BOOTSTRAP 15 -700 -500 100 R 40 40 1 1 I X ENABLE1 3 -700 100 100 R 40 40 1 1 I X ENABLE2 12 -700 -300 100 R 40 40 1 1 I X GND 7 600 -700 100 U 40 40 1 1 W X GND@1 8 500 -700 100 U 40 40 1 1 W X GND@2 21 400 -700 100 U 40 40 1 1 W X GND@3 22 300 -700 100 U 40 40 1 1 W X IN1 2 -700 300 100 R 40 40 1 1 I X IN2 27 -700 200 100 R 40 40 1 1 I X IN3 13 -700 -100 100 R 40 40 1 1 I X IN4 16 -700 -200 100 R 40 40 1 1 I X OUT1 6 800 300 100 L 40 40 1 1 O X OUT2 26 800 200 100 L 40 40 1 1 O X OUT3 9 800 -100 100 L 40 40 1 1 O X OUT4 17 800 -200 100 L 40 40 1 1 O X SENSE1 1 800 100 100 L 40 40 1 1 I X SENSE2 14 800 -300 100 L 40 40 1 1 I X VBOOT 28 -700 500 100 R 40 40 1 1 I X VS1 23 300 700 100 D 40 40 1 1 W X VS2 20 500 700 100 D 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: L6205D # Package Name: SO20 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF L6205D IC 0 40 Y Y 1 L N # Gate Name: P1 # Symbol Name: L6205 F0 "IC" -600 550 50 V V L B F1 "L6205D" -35 -200 50 V V L B F2 "st-microelectronics-SO20" 0 150 50 H I C C DRAW P 2 1 0 0 -600 500 600 500 P 2 1 0 0 600 500 600 -600 P 2 1 0 0 600 -600 -600 -600 P 2 1 0 0 -600 -600 -600 500 T 0 -80 -530 60 0 1 0 GND X EN_A 20 -700 -100 100 R 40 40 1 1 I X EN_B 11 -700 -500 100 R 40 40 1 1 I X GND 5 100 -700 100 U 40 40 1 1 W X GND@1 6 0 -700 100 U 40 40 1 1 W X GND@2 15 -100 -700 100 U 40 40 1 1 W X GND@3 16 -200 -700 100 U 40 40 1 1 W X IN1_A 1 -700 100 100 R 40 40 1 1 I X IN1_B 9 -700 -300 100 R 40 40 1 1 I X IN2_A 2 -700 0 100 R 40 40 1 1 I X IN2_B 10 -700 -400 100 R 40 40 1 1 I X OUT1A 4 700 200 100 L 40 40 1 1 O X OUT1B 7 700 -300 100 L 40 40 1 1 O X OUT2A 18 700 100 100 L 40 40 1 1 O X OUT2B 13 700 -400 100 L 40 40 1 1 O X SENSE_A 3 700 0 100 L 40 40 1 1 I X SENSE_B 8 700 -500 100 L 40 40 1 1 I X VBOOT 12 -700 400 100 R 40 40 1 1 W X VCP 19 -700 300 100 R 40 40 1 1 W X VS_A 17 700 300 100 L 40 40 1 1 W X VS_B 14 700 -200 100 L 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: L6205N # Package Name: DIL20 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF L6205N IC 0 40 Y Y 1 L N # Gate Name: P1 # Symbol Name: L6205 F0 "IC" -600 550 50 V V L B F1 "L6205N" -35 -200 50 V V L B F2 "st-microelectronics-DIL20" 0 150 50 H I C C DRAW P 2 1 0 0 -600 500 600 500 P 2 1 0 0 600 500 600 -600 P 2 1 0 0 600 -600 -600 -600 P 2 1 0 0 -600 -600 -600 500 T 0 -80 -530 60 0 1 0 GND X EN_A 20 -700 -100 100 R 40 40 1 1 I X EN_B 11 -700 -500 100 R 40 40 1 1 I X GND 5 100 -700 100 U 40 40 1 1 W X GND@1 6 0 -700 100 U 40 40 1 1 W X GND@2 15 -100 -700 100 U 40 40 1 1 W X GND@3 16 -200 -700 100 U 40 40 1 1 W X IN1_A 1 -700 100 100 R 40 40 1 1 I X IN1_B 9 -700 -300 100 R 40 40 1 1 I X IN2_A 2 -700 0 100 R 40 40 1 1 I X IN2_B 10 -700 -400 100 R 40 40 1 1 I X OUT1A 4 700 200 100 L 40 40 1 1 O X OUT1B 7 700 -300 100 L 40 40 1 1 O X OUT2A 18 700 100 100 L 40 40 1 1 O X OUT2B 13 700 -400 100 L 40 40 1 1 O X SENSE_A 3 700 0 100 L 40 40 1 1 I X SENSE_B 8 700 -500 100 L 40 40 1 1 I X VBOOT 12 -700 400 100 R 40 40 1 1 W X VCP 19 -700 300 100 R 40 40 1 1 W X VS_A 17 700 300 100 L 40 40 1 1 W X VS_B 14 700 -200 100 L 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: L6205PD # Package Name: POWERSO-20 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF L6205PD IC 0 40 Y Y 1 L N # Gate Name: P1 # Symbol Name: L6205 F0 "IC" -600 550 50 V V L B F1 "L6205PD" -35 -200 50 V V L B F2 "st-microelectronics-POWERSO-20" 0 150 50 H I C C DRAW P 2 1 0 0 -600 500 600 500 P 2 1 0 0 600 500 600 -600 P 2 1 0 0 600 -600 -600 -600 P 2 1 0 0 -600 -600 -600 500 T 0 -80 -530 60 0 1 0 GND X EN_A 5 -700 -100 100 R 40 40 1 1 I X EN_B 16 -700 -500 100 R 40 40 1 1 I X GND 1 100 -700 100 U 40 40 1 1 W X GND@1 10 0 -700 100 U 40 40 1 1 W X GND@2 11 -100 -700 100 U 40 40 1 1 W X GND@3 20 -200 -700 100 U 40 40 1 1 W X IN1_A 6 -700 100 100 R 40 40 1 1 I X IN1_B 14 -700 -300 100 R 40 40 1 1 I X IN2_A 7 -700 0 100 R 40 40 1 1 I X IN2_B 15 -700 -400 100 R 40 40 1 1 I X OUT1A 9 700 200 100 L 40 40 1 1 O X OUT1B 12 700 -300 100 L 40 40 1 1 O X OUT2A 3 700 100 100 L 40 40 1 1 O X OUT2B 18 700 -400 100 L 40 40 1 1 O X SENSE_A 8 700 0 100 L 40 40 1 1 I X SENSE_B 13 700 -500 100 L 40 40 1 1 I X VBOOT 17 -700 400 100 R 40 40 1 1 W X VCP 4 -700 300 100 R 40 40 1 1 W X VS_A 2 700 300 100 L 40 40 1 1 W X VS_B 19 700 -200 100 L 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: L6207D # Package Name: SO24W # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF L6207D IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: L6207 F0 "IC" -500 850 50 H V L B F1 "L6207D" 0 -900 50 H V L B F2 "st-microelectronics-SO24W" 0 150 50 H I C C DRAW P 2 1 0 0 -500 800 500 800 P 2 1 0 0 500 800 500 -800 P 2 1 0 0 500 -800 -500 -800 P 2 1 0 0 -500 -800 -500 800 T 0 -280 -730 60 0 1 0 GND X EN_A 23 -600 200 100 R 40 40 1 1 I X EN_B 14 -600 -500 100 R 40 40 1 1 I X GND 6 -100 -900 100 U 40 40 1 1 W X GND@1 7 -200 -900 100 U 40 40 1 1 W X GND@2 18 -300 -900 100 U 40 40 1 1 W X GND@3 19 -400 -900 100 U 40 40 1 1 W X IN1_A 1 -600 400 100 R 40 40 1 1 I X IN1_B 12 -600 -300 100 R 40 40 1 1 I X IN2_A 2 -600 300 100 R 40 40 1 1 I X IN2_B 11 -600 -400 100 R 40 40 1 1 I X OUT1A 5 600 200 100 L 40 40 1 1 O X OUT1B 8 600 -500 100 L 40 40 1 1 O X OUT2A 21 600 100 100 L 40 40 1 1 O X OUT2B 16 600 -600 100 L 40 40 1 1 O X RCA 4 600 300 100 L 40 40 1 1 I X RCB 9 600 -400 100 L 40 40 1 1 I X SENSE_A 3 600 400 100 L 40 40 1 1 I X SENSE_B 10 600 -300 100 L 40 40 1 1 I X VBOOT 15 -600 600 100 R 40 40 1 1 W X VCP 22 -600 700 100 R 40 40 1 1 W X VREF_A 24 600 0 100 L 40 40 1 1 I X VREF_B 13 600 -700 100 L 40 40 1 1 I X VS_A 20 600 500 100 L 40 40 1 1 W X VS_B 17 600 -200 100 L 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: L6207N # Package Name: DIL24S # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF L6207N IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: L6207 F0 "IC" -500 850 50 H V L B F1 "L6207N" 0 -900 50 H V L B F2 "st-microelectronics-DIL24S" 0 150 50 H I C C DRAW P 2 1 0 0 -500 800 500 800 P 2 1 0 0 500 800 500 -800 P 2 1 0 0 500 -800 -500 -800 P 2 1 0 0 -500 -800 -500 800 T 0 -280 -730 60 0 1 0 GND X EN_A 23 -600 200 100 R 40 40 1 1 I X EN_B 14 -600 -500 100 R 40 40 1 1 I X GND 6 -100 -900 100 U 40 40 1 1 W X GND@1 7 -200 -900 100 U 40 40 1 1 W X GND@2 18 -300 -900 100 U 40 40 1 1 W X GND@3 19 -400 -900 100 U 40 40 1 1 W X IN1_A 1 -600 400 100 R 40 40 1 1 I X IN1_B 12 -600 -300 100 R 40 40 1 1 I X IN2_A 2 -600 300 100 R 40 40 1 1 I X IN2_B 11 -600 -400 100 R 40 40 1 1 I X OUT1A 5 600 200 100 L 40 40 1 1 O X OUT1B 8 600 -500 100 L 40 40 1 1 O X OUT2A 21 600 100 100 L 40 40 1 1 O X OUT2B 16 600 -600 100 L 40 40 1 1 O X RCA 4 600 300 100 L 40 40 1 1 I X RCB 9 600 -400 100 L 40 40 1 1 I X SENSE_A 3 600 400 100 L 40 40 1 1 I X SENSE_B 10 600 -300 100 L 40 40 1 1 I X VBOOT 15 -600 600 100 R 40 40 1 1 W X VCP 22 -600 700 100 R 40 40 1 1 W X VREF_A 24 600 0 100 L 40 40 1 1 I X VREF_B 13 600 -700 100 L 40 40 1 1 I X VS_A 20 600 500 100 L 40 40 1 1 W X VS_B 17 600 -200 100 L 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: L6207PSO36 # Package Name: POWERSO-36 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF L6207PSO36 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: L6207 F0 "IC" -500 850 50 H V L B F1 "L6207PSO36" 0 -900 50 H V L B F2 "st-microelectronics-POWERSO-36" 0 150 50 H I C C DRAW P 2 1 0 0 -500 800 500 800 P 2 1 0 0 500 800 500 -800 P 2 1 0 0 500 -800 -500 -800 P 2 1 0 0 -500 -800 -500 800 T 0 -280 -730 60 0 1 0 GND X EN_A 8 -600 200 100 R 40 40 1 1 I X EN_B 29 -600 -500 100 R 40 40 1 1 I X GND 1 -100 -900 100 U 40 40 1 1 W X GND@1 18 -200 -900 100 U 40 40 1 1 W X GND@2 19 -300 -900 100 U 40 40 1 1 W X GND@3 36 -400 -900 100 U 40 40 1 1 W X IN1_A 10 -600 400 100 R 40 40 1 1 I X IN1_B 26 -600 -300 100 R 40 40 1 1 I X IN2_A 11 -600 300 100 R 40 40 1 1 I X IN2_B 27 -600 -400 100 R 40 40 1 1 I X OUT1A 15 600 200 100 L 40 40 1 1 O X OUT1B 22 600 -500 100 L 40 40 1 1 O X OUT2A 5 600 100 100 L 40 40 1 1 O X OUT2B 32 600 -600 100 L 40 40 1 1 O X RCA 13 600 300 100 L 40 40 1 1 I X RCB 24 600 -400 100 L 40 40 1 1 I X SENSE_A 12 600 400 100 L 40 40 1 1 I X SENSE_B 25 600 -300 100 L 40 40 1 1 I X VBOOT 30 -600 600 100 R 40 40 1 1 W X VCP 7 -600 700 100 R 40 40 1 1 W X VREF_A 9 600 0 100 L 40 40 1 1 I X VREF_B 28 600 -700 100 L 40 40 1 1 I X VS_A 4 600 500 100 L 40 40 1 1 W X VS_B 33 600 -200 100 L 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: L9637D # Package Name: SO08 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF L9637D IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: L9637D F0 "IC" -300 550 50 H V L B F1 "L9637D" -300 -500 50 H V L B F2 "st-microelectronics-SO08" 0 150 50 H I C C DRAW P 2 1 0 0 -300 500 300 500 P 2 1 0 0 300 500 300 -400 P 2 1 0 0 300 -400 -300 -400 P 2 1 0 0 -300 -400 -300 500 X GND 5 400 -300 100 L 40 40 1 1 W X K 6 -400 200 100 R 40 40 1 1 I X LI 8 -400 -100 100 R 40 40 1 1 I X LO 2 400 -100 100 L 40 40 1 1 O X RX 1 400 100 100 L 40 40 1 1 O X TX 4 400 200 100 L 40 40 1 1 I X VCC 3 400 400 100 L 40 40 1 1 W X VS 7 -400 400 100 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: M29F400M # Package Name: SO44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 5 # DEF M29F400M IC 0 40 Y Y 5 L N # Gate Name: G$1 # Symbol Name: M29F400 F0 "IC" -400 1325 50 H V L B F1 "M29F400M" -400 -1400 50 H V L B F2 "st-microelectronics-SO44" 0 150 50 H I C C DRAW P 2 1 0 0 -400 -1300 400 -1300 P 2 1 0 0 400 -1300 400 1300 P 2 1 0 0 400 1300 -400 1300 P 2 1 0 0 -400 1300 -400 -1300 X A-1/D15 31 500 -500 100 L 40 40 1 1 T X A0 11 -500 1000 100 R 40 40 1 1 I X A1 10 -500 900 100 R 40 40 1 1 I X A2 9 -500 800 100 R 40 40 1 1 I X A3 8 -500 700 100 R 40 40 1 1 I X A4 7 -500 600 100 R 40 40 1 1 I X A5 6 -500 500 100 R 40 40 1 1 I X A6 5 -500 400 100 R 40 40 1 1 I X A7 4 -500 300 100 R 40 40 1 1 I X A8 42 -500 200 100 R 40 40 1 1 I X A9 41 -500 100 100 R 40 40 1 1 I X A10 40 -500 0 100 R 40 40 1 1 I X A11 39 -500 -100 100 R 40 40 1 1 I X A12 38 -500 -200 100 R 40 40 1 1 I X A13 37 -500 -300 100 R 40 40 1 1 I X A14 36 -500 -400 100 R 40 40 1 1 I X A15 35 -500 -500 100 R 40 40 1 1 I X A16 34 -500 -600 100 R 40 40 1 1 I X A17 3 -500 -700 100 R 40 40 1 1 I X BYTE\ 33 -500 -900 100 R 40 40 1 1 I X CE\ 12 -500 -1000 100 R 40 40 1 1 I X D0 15 500 1000 100 L 40 40 1 1 T X D1 17 500 900 100 L 40 40 1 1 T X D2 19 500 800 100 L 40 40 1 1 T X D3 21 500 700 100 L 40 40 1 1 T X D4 24 500 600 100 L 40 40 1 1 T X D5 26 500 500 100 L 40 40 1 1 T X D6 28 500 400 100 L 40 40 1 1 T X D7 30 500 300 100 L 40 40 1 1 T X D8 16 500 200 100 L 40 40 1 1 T X D9 18 500 100 100 L 40 40 1 1 T X D10 20 500 0 100 L 40 40 1 1 T X D11 22 500 -100 100 L 40 40 1 1 T X D12 25 500 -200 100 L 40 40 1 1 T X D13 27 500 -300 100 L 40 40 1 1 T X D14 29 500 -400 100 L 40 40 1 1 T X OE\ 14 -500 -1100 100 R 40 40 1 1 I X RB\ 2 500 -800 100 L 40 40 1 1 O X RESET\ 44 -500 1200 100 R 40 40 1 1 I X WE\ 43 -500 -1200 100 R 40 40 1 1 I # Gate Name: GND1 # Symbol Name: GND X GND 13 0 -100 100 U 40 40 2 1 W # Gate Name: GND2 # Symbol Name: GND X GND 32 0 -100 100 U 40 40 3 1 W # Gate Name: NC1 # Symbol Name: NC X NC 1 100 0 100 L 40 40 4 1 U # Gate Name: VCC # Symbol Name: VCC X VCC 23 0 100 100 D 40 40 5 1 W ENDDRAW ENDDEF # # Dev Name: M29F400T # Package Name: TSOP48 # Dev Tech: '' # Dev Prefix: IC # Gate count = 9 # DEF M29F400T IC 0 40 Y Y 9 L N # Gate Name: G$1 # Symbol Name: M29F400 F0 "IC" -400 1325 50 H V L B F1 "M29F400T" -400 -1400 50 H V L B F2 "st-microelectronics-TSOP48" 0 150 50 H I C C DRAW P 2 1 0 0 -400 -1300 400 -1300 P 2 1 0 0 400 -1300 400 1300 P 2 1 0 0 400 1300 -400 1300 P 2 1 0 0 -400 1300 -400 -1300 X A-1/D15 1 500 -500 100 L 40 40 1 1 T X A0 25 -500 1000 100 R 40 40 1 1 I X A1 24 -500 900 100 R 40 40 1 1 I X A2 23 -500 800 100 R 40 40 1 1 I X A3 22 -500 700 100 R 40 40 1 1 I X A4 21 -500 600 100 R 40 40 1 1 I X A5 20 -500 500 100 R 40 40 1 1 I X A6 19 -500 400 100 R 40 40 1 1 I X A7 18 -500 300 100 R 40 40 1 1 I X A8 8 -500 200 100 R 40 40 1 1 I X A9 7 -500 100 100 R 40 40 1 1 I X A10 6 -500 0 100 R 40 40 1 1 I X A11 5 -500 -100 100 R 40 40 1 1 I X A12 4 -500 -200 100 R 40 40 1 1 I X A13 3 -500 -300 100 R 40 40 1 1 I X A14 2 -500 -400 100 R 40 40 1 1 I X A15 45 -500 -500 100 R 40 40 1 1 I X A16 48 -500 -600 100 R 40 40 1 1 I X A17 17 -500 -700 100 R 40 40 1 1 I X BYTE\ 47 -500 -900 100 R 40 40 1 1 I X CE\ 26 -500 -1000 100 R 40 40 1 1 I X D0 29 500 1000 100 L 40 40 1 1 T X D1 31 500 900 100 L 40 40 1 1 T X D2 33 500 800 100 L 40 40 1 1 T X D3 35 500 700 100 L 40 40 1 1 T X D4 38 500 600 100 L 40 40 1 1 T X D5 40 500 500 100 L 40 40 1 1 T X D6 42 500 400 100 L 40 40 1 1 T X D7 44 500 300 100 L 40 40 1 1 T X D8 30 500 200 100 L 40 40 1 1 T X D9 32 500 100 100 L 40 40 1 1 T X D10 34 500 0 100 L 40 40 1 1 T X D11 36 500 -100 100 L 40 40 1 1 T X D12 39 500 -200 100 L 40 40 1 1 T X D13 41 500 -300 100 L 40 40 1 1 T X D14 43 500 -400 100 L 40 40 1 1 T X OE\ 28 -500 -1100 100 R 40 40 1 1 I X RB\ 15 500 -800 100 L 40 40 1 1 O X RESET\ 12 -500 1200 100 R 40 40 1 1 I X WE\ 11 -500 -1200 100 R 40 40 1 1 I # Gate Name: NC1 # Symbol Name: NC X NC 9 100 0 100 L 40 40 2 1 U # Gate Name: NC2 # Symbol Name: NC X NC 10 100 0 100 L 40 40 3 1 U # Gate Name: NC3 # Symbol Name: NC X NC 13 100 0 100 L 40 40 4 1 U # Gate Name: NC4 # Symbol Name: NC X NC 14 100 0 100 L 40 40 5 1 U # Gate Name: NC5 # Symbol Name: NC X NC 16 100 0 100 L 40 40 6 1 U # Gate Name: P1 # Symbol Name: VCC X VCC 37 0 100 100 D 40 40 7 1 W # Gate Name: P2 # Symbol Name: GND X GND 27 0 -100 100 U 40 40 8 1 W # Gate Name: P3 # Symbol Name: GND X GND 46 0 -100 100 U 40 40 9 1 W ENDDRAW ENDDEF # # Dev Name: M68AW128MND # Package Name: TSOP44-II # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF M68AW128MND IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: M68AW128M F0 "IC" -400 1175 50 H V L B F1 "M68AW128MND" -400 -1400 50 H V L B F2 "st-microelectronics-TSOP44-II" 0 150 50 H I C C DRAW P 2 1 0 0 -400 -1300 400 -1300 P 2 1 0 0 400 -1300 400 1100 P 2 1 0 0 400 1100 -400 1100 P 2 1 0 0 -400 1100 -400 -1300 X A0 5 -500 1000 100 R 40 40 1 1 I X A1 4 -500 900 100 R 40 40 1 1 I X A2 3 -500 800 100 R 40 40 1 1 I X A3 2 -500 700 100 R 40 40 1 1 I X A4 1 -500 600 100 R 40 40 1 1 I X A5 44 -500 500 100 R 40 40 1 1 I X A6 43 -500 400 100 R 40 40 1 1 I X A7 42 -500 300 100 R 40 40 1 1 I X A8 27 -500 200 100 R 40 40 1 1 I X A9 26 -500 100 100 R 40 40 1 1 I X A10 25 -500 0 100 R 40 40 1 1 I X A11 24 -500 -100 100 R 40 40 1 1 I X A12 22 -500 -200 100 R 40 40 1 1 I X A13 21 -500 -300 100 R 40 40 1 1 I X A14 20 -500 -400 100 R 40 40 1 1 I X A15 19 -500 -500 100 R 40 40 1 1 I X A16 18 -500 -600 100 R 40 40 1 1 I X D0 7 500 1000 100 L 40 40 1 1 T X D1 8 500 900 100 L 40 40 1 1 T X D2 9 500 800 100 L 40 40 1 1 T X D3 10 500 700 100 L 40 40 1 1 T X D4 13 500 600 100 L 40 40 1 1 T X D5 14 500 500 100 L 40 40 1 1 T X D6 15 500 400 100 L 40 40 1 1 T X D7 16 500 300 100 L 40 40 1 1 T X D8 29 500 200 100 L 40 40 1 1 T X D9 30 500 100 100 L 40 40 1 1 T X D10 31 500 0 100 L 40 40 1 1 T X D11 32 500 -100 100 L 40 40 1 1 T X D12 35 500 -200 100 L 40 40 1 1 T X D13 36 500 -300 100 L 40 40 1 1 T X D14 37 500 -400 100 L 40 40 1 1 T X D15 38 500 -500 100 L 40 40 1 1 T X E\ 6 -500 -900 100 R 40 40 1 1 I X G\ 41 -500 -1000 100 R 40 40 1 1 I X LB\ 39 -500 -1200 100 R 40 40 1 1 I X UB\ 40 -500 -1100 100 R 40 40 1 1 I X W\ 17 -500 -800 100 R 40 40 1 1 I # Gate Name: P # Symbol Name: VCC2-VSS2 T 0 5 -95 70 0 2 0 VSS T 0 5 105 70 0 2 0 VCC X VCC@1 11 -100 300 100 D 40 40 2 1 W X VCC@2 33 100 300 100 D 40 40 2 1 W X VSS@1 12 -100 -300 100 U 40 40 2 1 W X VSS@2 34 100 -300 100 U 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: M68AW128MZB # Package Name: TFBGA48 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF M68AW128MZB IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: M68AW128M F0 "IC" -400 1175 50 H V L B F1 "M68AW128MZB" -400 -1400 50 H V L B F2 "st-microelectronics-TFBGA48" 0 150 50 H I C C DRAW P 2 1 0 0 -400 -1300 400 -1300 P 2 1 0 0 400 -1300 400 1100 P 2 1 0 0 400 1100 -400 1100 P 2 1 0 0 -400 1100 -400 -1300 X A0 A3 -500 1000 100 R 40 40 1 1 I X A1 A4 -500 900 100 R 40 40 1 1 I X A2 A5 -500 800 100 R 40 40 1 1 I X A3 B3 -500 700 100 R 40 40 1 1 I X A4 B4 -500 600 100 R 40 40 1 1 I X A5 C3 -500 500 100 R 40 40 1 1 I X A6 C4 -500 400 100 R 40 40 1 1 I X A7 D4 -500 300 100 R 40 40 1 1 I X A8 H2 -500 200 100 R 40 40 1 1 I X A9 H3 -500 100 100 R 40 40 1 1 I X A10 H4 -500 0 100 R 40 40 1 1 I X A11 H5 -500 -100 100 R 40 40 1 1 I X A12 G3 -500 -200 100 R 40 40 1 1 I X A13 G4 -500 -300 100 R 40 40 1 1 I X A14 F3 -500 -400 100 R 40 40 1 1 I X A15 F4 -500 -500 100 R 40 40 1 1 I X A16 E4 -500 -600 100 R 40 40 1 1 I X D0 B6 500 1000 100 L 40 40 1 1 T X D1 C5 500 900 100 L 40 40 1 1 T X D2 C6 500 800 100 L 40 40 1 1 T X D3 D5 500 700 100 L 40 40 1 1 T X D4 E5 500 600 100 L 40 40 1 1 T X D5 F5 500 500 100 L 40 40 1 1 T X D6 F6 500 400 100 L 40 40 1 1 T X D7 G6 500 300 100 L 40 40 1 1 T X D8 B1 500 200 100 L 40 40 1 1 T X D9 C1 500 100 100 L 40 40 1 1 T X D10 C2 500 0 100 L 40 40 1 1 T X D11 D2 500 -100 100 L 40 40 1 1 T X D12 E2 500 -200 100 L 40 40 1 1 T X D13 F2 500 -300 100 L 40 40 1 1 T X D14 F1 500 -400 100 L 40 40 1 1 T X D15 G1 500 -500 100 L 40 40 1 1 T X E\ B5 -500 -900 100 R 40 40 1 1 I X G\ A2 -500 -1000 100 R 40 40 1 1 I X LB\ A1 -500 -1200 100 R 40 40 1 1 I X UB\ B2 -500 -1100 100 R 40 40 1 1 I X W\ G5 -500 -800 100 R 40 40 1 1 I # Gate Name: P # Symbol Name: VCC2-VSS2 T 0 5 -95 70 0 2 0 VSS T 0 5 105 70 0 2 0 VCC X VCC@1 D6 -100 300 100 D 40 40 2 1 W X VCC@2 E1 100 300 100 D 40 40 2 1 W X VSS@1 D1 -100 -300 100 U 40 40 2 1 W X VSS@2 E6 100 -300 100 U 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: NE555 # Package Name: DIL-08 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF NE555 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: NE555 F0 "IC" -300 450 50 H V L B F1 "NE555" -300 -500 50 H V L B F2 "st-microelectronics-DIL-08" 0 150 50 H I C C DRAW P 2 1 0 0 -300 400 -300 -400 P 2 1 0 0 -300 -400 300 -400 P 2 1 0 0 300 -400 300 400 P 2 1 0 0 300 400 -300 400 X /RES 4 400 200 100 L 40 40 1 1 I X CON 5 400 -200 100 L 40 40 1 1 I X DIS 7 -400 0 100 R 40 40 1 1 I X GND 1 400 -300 100 L 40 40 1 1 W X OUT 3 400 0 100 L 40 40 1 1 O X TRE 6 -400 300 100 R 40 40 1 1 I X TRI 2 -400 -300 100 R 40 40 1 1 I X VCC+ 8 400 300 100 L 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: NE556 # Package Name: DIL14 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF NE556 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: NE556 F0 "IC" -400 350 50 H V L B F1 "NE556" -400 -900 50 H V L B F2 "st-microelectronics-DIL14" 0 150 50 H I C C DRAW P 2 1 0 0 -400 300 400 300 P 2 1 0 0 400 300 400 -100 P 2 1 0 0 400 -100 400 -400 P 2 1 0 0 400 -400 -400 -400 P 2 1 0 0 -400 300 -400 -100 P 2 1 0 0 -400 -100 -400 -400 P 2 1 0 0 -400 -400 -400 -800 P 2 1 0 0 -400 -800 400 -800 P 2 1 0 0 400 -800 400 -400 P 2 1 0 0 -400 -100 400 -100 X CONT1 3 500 200 100 L 40 40 1 1 I X CONT2 11 500 -500 100 L 40 40 1 1 I X DIS1 1 -500 0 100 R 40 40 1 1 I X DIS2 13 -500 -700 100 R 40 40 1 1 I X GND 7 500 -300 100 L 40 40 1 1 W X OUT1 5 500 0 100 L 40 40 1 1 O X OUT2 9 500 -700 100 L 40 40 1 1 O X RESET1 4 500 100 100 L 40 40 1 1 I X RESET2 10 500 -600 100 L 40 40 1 1 I X TRES1 2 -500 200 100 R 40 40 1 1 I X TRES2 12 -500 -500 100 R 40 40 1 1 I X TRIG1 6 -500 100 100 R 40 40 1 1 I X TRIG2 8 -500 -600 100 R 40 40 1 1 I X VCC 14 500 -200 100 L 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: ST10F168 # Package Name: PQFP144-28X28 # Dev Tech: '' # Dev Prefix: IC # Gate count = 30 # DEF ST10F168 IC 0 40 Y Y 30 L N # Gate Name: P0 # Symbol Name: F168_P0 F0 "IC" -200 825 50 H V L B F1 "ST10F168" -200 -1000 50 H V L B F2 "st-microelectronics-PQFP144-28X28" 0 150 50 H I C C DRAW P 2 1 0 0 400 800 -200 800 P 2 1 0 0 -200 800 -200 -900 P 2 1 0 0 -200 -900 400 -900 P 2 1 0 0 400 -900 400 800 X P0H0/AD8 108 -400 -100 200 R 40 40 1 1 B X P0H1/AD9 111 -400 -200 200 R 40 40 1 1 B X P0H2/AD10 112 -400 -300 200 R 40 40 1 1 B X P0H3/AD11 113 -400 -400 200 R 40 40 1 1 B X P0H4/AD12 114 -400 -500 200 R 40 40 1 1 B X P0H5/AD13 115 -400 -600 200 R 40 40 1 1 B X P0H6/AD14 116 -400 -700 200 R 40 40 1 1 B X P0H7/AD15 117 -400 -800 200 R 40 40 1 1 B X P0L0/AD0 100 -400 700 200 R 40 40 1 1 B X P0L1/AD1 101 -400 600 200 R 40 40 1 1 B X P0L2/AD2 102 -400 500 200 R 40 40 1 1 B X P0L3/AD3 103 -400 400 200 R 40 40 1 1 B X P0L4/AD4 104 -400 300 200 R 40 40 1 1 B X P0L5/AD5 105 -400 200 200 R 40 40 1 1 B X P0L6/AD6 106 -400 100 200 R 40 40 1 1 B X P0L7/AD7 107 -400 0 200 R 40 40 1 1 B # Gate Name: P1 # Symbol Name: F168_P1 P 2 2 0 0 300 800 -300 800 P 2 2 0 0 -300 800 -300 -900 P 2 2 0 0 -300 -900 300 -900 P 2 2 0 0 300 -900 300 800 X P1H0/A8 128 -500 -100 200 R 40 40 2 1 B X P1H1/A9 129 -500 -200 200 R 40 40 2 1 B X P1H2/A10 130 -500 -300 200 R 40 40 2 1 B X P1H3/A11 131 -500 -400 200 R 40 40 2 1 B X P1H4/A12 132 -500 -500 200 R 40 40 2 1 B X P1H5/13 133 -500 -600 200 R 40 40 2 1 B X P1H6/A14 134 -500 -700 200 R 40 40 2 1 B X P1H7/A15 135 -500 -800 200 R 40 40 2 1 B X P1L0/A0 118 -500 700 200 R 40 40 2 1 B X P1L1/A1 119 -500 600 200 R 40 40 2 1 B X P1L2/A2 120 -500 500 200 R 40 40 2 1 B X P1L3/A3 121 -500 400 200 R 40 40 2 1 B X P1L4/A4 122 -500 300 200 R 40 40 2 1 B X P1L5/A5 123 -500 200 200 R 40 40 2 1 B X P1L6/A6 124 -500 100 200 R 40 40 2 1 B X P1L7/A7 125 -500 0 200 R 40 40 2 1 B # Gate Name: P2 # Symbol Name: F168_P2 P 2 3 0 0 -300 800 400 800 P 2 3 0 0 400 800 400 -900 P 2 3 0 0 400 -900 -300 -900 P 2 3 0 0 -300 -900 -300 800 X P2-0/CC0 47 -500 700 200 R 40 40 3 1 B X P2-1/CC1 48 -500 600 200 R 40 40 3 1 B X P2-2/CC2 49 -500 500 200 R 40 40 3 1 B X P2-3/CC3 50 -500 400 200 R 40 40 3 1 B X P2-4/CC4 51 -500 300 200 R 40 40 3 1 B X P2-5/CC5 52 -500 200 200 R 40 40 3 1 B X P2-6/CC6 53 -500 100 200 R 40 40 3 1 B X P2-7/CC7 54 -500 0 200 R 40 40 3 1 B X P2-8/CC8 57 -500 -100 200 R 40 40 3 1 B X P2-9/CC9 58 -500 -200 200 R 40 40 3 1 B X P2-10/CC10 59 -500 -300 200 R 40 40 3 1 B X P2-11/CC11 60 -500 -400 200 R 40 40 3 1 B X P2-12/CC12 61 -500 -500 200 R 40 40 3 1 B X P2-13/CC13 62 -500 -600 200 R 40 40 3 1 B X P2-14/CC14 63 -500 -700 200 R 40 40 3 1 B X P2-15/CC15 64 -500 -800 200 R 40 40 3 1 B # Gate Name: P3 # Symbol Name: F168_P3 P 2 4 0 0 400 700 -300 700 P 2 4 0 0 -300 700 -300 -1000 P 2 4 0 0 -300 -1000 400 -1000 P 2 4 0 0 400 -1000 400 700 X P3-0/TOIN 65 -500 600 200 R 40 40 4 1 B X P3-1/T6OUT 66 -500 500 200 R 40 40 4 1 B X P3-2/CAPIN 67 -500 400 200 R 40 40 4 1 B X P3-3/T3OUT 68 -500 300 200 R 40 40 4 1 B X P3-4/T3EUD 69 -500 200 200 R 40 40 4 1 B X P3-5/T4IN 70 -500 100 200 R 40 40 4 1 B X P3-6/T3IN 73 -500 0 200 R 40 40 4 1 B X P3-7/T2IN 74 -500 -100 200 R 40 40 4 1 B X P3-8/MRST 75 -500 -200 200 R 40 40 4 1 B X P3-9/MTSR 76 -500 -300 200 R 40 40 4 1 B X P3-10/TXD0 77 -500 -400 200 R 40 40 4 1 B X P3-11/RXD0 78 -500 -500 200 R 40 40 4 1 B X P3-12/BHE\ 79 -500 -600 200 R 40 40 4 1 B X P3-13/SCLK 80 -500 -700 200 R 40 40 4 1 B X P3-15/CLKO 81 -500 -900 200 R 40 40 4 1 B # Gate Name: P4 # Symbol Name: F168_P4 P 2 5 0 0 400 400 -200 400 P 2 5 0 0 -200 400 -200 -500 P 2 5 0 0 -200 -500 400 -500 P 2 5 0 0 400 -500 400 400 X P4-0/A16 85 -400 300 200 R 40 40 5 1 B X P4-1/A17 86 -400 200 200 R 40 40 5 1 B X P4-2/A18 87 -400 100 200 R 40 40 5 1 B X P4-3/A19 88 -400 0 200 R 40 40 5 1 B X P4-4/A20 89 -400 -100 200 R 40 40 5 1 B X P4-5/A21 90 -400 -200 200 R 40 40 5 1 B X P4-6/A22 91 -400 -300 200 R 40 40 5 1 B X P4-7/A23 92 -400 -400 200 R 40 40 5 1 B # Gate Name: P5 # Symbol Name: F168_P5 P 2 6 0 0 400 800 -300 800 P 2 6 0 0 -300 800 -300 -900 P 2 6 0 0 -300 -900 400 -900 P 2 6 0 0 400 -900 400 800 X P5-0/AN0 27 -500 700 200 R 40 40 6 1 I X P5-1/AN1 28 -500 600 200 R 40 40 6 1 I X P5-2/AN2 29 -500 500 200 R 40 40 6 1 I X P5-3/AN3 30 -500 400 200 R 40 40 6 1 I X P5-4/AN4 31 -500 300 200 R 40 40 6 1 I X P5-5/AN5 32 -500 200 200 R 40 40 6 1 I X P5-6/AN6 33 -500 100 200 R 40 40 6 1 I X P5-7/AN7 34 -500 0 200 R 40 40 6 1 I X P5-8/AN8 35 -500 -100 200 R 40 40 6 1 I X P5-9/AN9 36 -500 -200 200 R 40 40 6 1 I X P5-10/AN10 39 -500 -300 200 R 40 40 6 1 I X P5-11/AN11 40 -500 -400 200 R 40 40 6 1 I X P5-12/AN12 41 -500 -500 200 R 40 40 6 1 I X P5-13/AN13 42 -500 -600 200 R 40 40 6 1 I X P5-14/AN14 43 -500 -700 200 R 40 40 6 1 I X P5-15/AN15 44 -500 -800 200 R 40 40 6 1 I # Gate Name: P6 # Symbol Name: F168_P6 P 2 7 0 0 500 400 -200 400 P 2 7 0 0 -200 400 -200 -500 P 2 7 0 0 -200 -500 500 -500 P 2 7 0 0 500 -500 500 400 X P6-0/SC0\ 1 -400 300 200 R 40 40 7 1 B X P6-1/CS1\ 2 -400 200 200 R 40 40 7 1 B X P6-2/CS2\ 3 -400 100 200 R 40 40 7 1 B X P6-3/CS3\ 4 -400 0 200 R 40 40 7 1 B X P6-4/CS4\ 5 -400 -100 200 R 40 40 7 1 B X P6-5/HOLD\ 6 -400 -200 200 R 40 40 7 1 B X P6-6\HLDA\ 7 -400 -300 200 R 40 40 7 1 B X P6-7/BREQ\ 8 -400 -400 200 R 40 40 7 1 B # Gate Name: P7 # Symbol Name: F168_P7 P 2 8 0 0 500 400 -200 400 P 2 8 0 0 -200 400 -200 -500 P 2 8 0 0 -200 -500 500 -500 P 2 8 0 0 500 -500 500 400 X P7-0\POUT0 19 -400 300 200 R 40 40 8 1 B X P7-1/POUT1 20 -400 200 200 R 40 40 8 1 B X P7-2/POUT2 21 -400 100 200 R 40 40 8 1 B X P7-3/POUT3 22 -400 0 200 R 40 40 8 1 B X P7-4/CC28 23 -400 -100 200 R 40 40 8 1 B X P7-5/CC29 24 -400 -200 200 R 40 40 8 1 B X P7-6/CC30 25 -400 -300 200 R 40 40 8 1 B X P7-7/CC31 26 -400 -400 200 R 40 40 8 1 B # Gate Name: P8 # Symbol Name: F168_P8 P 2 9 0 0 400 500 -200 500 P 2 9 0 0 -200 500 -200 -400 P 2 9 0 0 -200 -400 400 -400 P 2 9 0 0 400 -400 400 500 X P8-0/CC16 9 -400 400 200 R 40 40 9 1 B X P8-1/CC17 10 -400 300 200 R 40 40 9 1 B X P8-2/CC18 11 -400 200 200 R 40 40 9 1 B X P8-3/CC19 12 -400 100 200 R 40 40 9 1 B X P8-4/CC20 13 -400 0 200 R 40 40 9 1 B X P8-5/CC21 14 -400 -100 200 R 40 40 9 1 B X P8-6/CC22 15 -400 -200 200 R 40 40 9 1 B X P8-7/CC23 16 -400 -300 200 R 40 40 9 1 B # Gate Name: VDD1 # Symbol Name: VDD X VDD 17 0 100 100 D 40 40 10 1 W # Gate Name: VDD2 # Symbol Name: VDD X VDD 46 0 100 100 D 40 40 11 1 W # Gate Name: VDD3 # Symbol Name: VDD X VDD 56 0 100 100 D 40 40 12 1 W # Gate Name: VDD4 # Symbol Name: VDD X VDD 72 0 100 100 D 40 40 13 1 W # Gate Name: VDD5 # Symbol Name: VDD X VDD 82 0 100 100 D 40 40 14 1 W # Gate Name: VDD6 # Symbol Name: VDD X VDD 93 0 100 100 D 40 40 15 1 W # Gate Name: VDD7 # Symbol Name: VDD X VDD 109 0 100 100 D 40 40 16 1 W # Gate Name: VDD8 # Symbol Name: VDD X VDD 126 0 100 100 D 40 40 17 1 W # Gate Name: VDD9 # Symbol Name: VDD X VDD 136 0 100 100 D 40 40 18 1 W # Gate Name: VDD10 # Symbol Name: VDD X VDD 144 0 100 100 D 40 40 19 1 W # Gate Name: VSS1 # Symbol Name: VSS X VSS 18 0 -100 100 U 40 40 20 1 W # Gate Name: VSS2 # Symbol Name: VSS X VSS 45 0 -100 100 U 40 40 21 1 W # Gate Name: VSS3 # Symbol Name: VSS X VSS 55 0 -100 100 U 40 40 22 1 W # Gate Name: VSS4 # Symbol Name: VSS X VSS 71 0 -100 100 U 40 40 23 1 W # Gate Name: VSS5 # Symbol Name: VSS X VSS 83 0 -100 100 U 40 40 24 1 W # Gate Name: VSS6 # Symbol Name: VSS X VSS 94 0 -100 100 U 40 40 25 1 W # Gate Name: VSS7 # Symbol Name: VSS X VSS 110 0 -100 100 U 40 40 26 1 W # Gate Name: VSS8 # Symbol Name: VSS X VSS 127 0 -100 100 U 40 40 27 1 W # Gate Name: VSS9 # Symbol Name: VSS X VSS 139 0 -100 100 U 40 40 28 1 W # Gate Name: VSS10 # Symbol Name: VSS X VSS 143 0 -100 100 U 40 40 29 1 W # Gate Name: _C # Symbol Name: F168_C P 2 30 0 0 300 1000 -300 1000 P 2 30 0 0 -300 1000 -300 -1300 P 2 30 0 0 -300 -1300 300 -1300 P 2 30 0 0 300 -1300 300 1000 X ALE 98 -500 -1000 200 R 40 40 30 1 O X EA\ 99 -500 -700 200 R 40 40 30 1 I X NMI\ 142 -500 -600 200 R 40 40 30 1 I X RD\ 95 -500 -1100 200 R 40 40 30 1 O X READY\ 97 -500 -800 200 R 40 40 30 1 I X RSTIN\ 140 -500 200 200 R 40 40 30 1 I X RSTOUT\ 141 -500 0 200 R 40 40 30 1 O X VAGND 38 -500 -400 200 R 40 40 30 1 P X VAREF 37 -500 -200 200 R 40 40 30 1 P X VPP/RPD 84 -500 900 200 R 40 40 30 1 I X WR\_WRL\ 96 -500 -1200 200 R 40 40 30 1 O X XTAL1 138 -500 700 200 R 40 40 30 1 I X XTAL2 137 -500 400 200 R 40 40 30 1 O ENDDRAW ENDDEF # # Dev Name: ST95P08B # Package Name: DIL-08 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF ST95P08B IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: ST95P08 F0 "IC" -200 440 50 H V L B F1 "ST95P08B" -200 -500 50 H V L B F2 "st-microelectronics-DIL-08" 0 150 50 H I C C DRAW P 2 1 0 0 -200 400 -200 -400 P 2 1 0 0 -200 -400 200 -400 P 2 1 0 0 200 -400 200 400 P 2 1 0 0 200 400 -200 400 X C 6 -300 -100 100 R 40 40 1 1 I X D 5 -300 -300 100 R 40 40 1 1 I X HOLD\ 7 -300 300 100 R 40 40 1 1 I X Q 2 300 -300 100 L 40 40 1 1 T X S\ 1 -300 0 100 R 40 40 1 1 I X W\ 3 -300 100 100 R 40 40 1 1 I # Gate Name: P # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 4 0 -300 200 U 40 40 2 1 W X VCC 8 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: ST95P08M # Package Name: SO08 # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF ST95P08M IC 0 40 Y Y 2 L N # Gate Name: G$1 # Symbol Name: ST95P08 F0 "IC" -200 440 50 H V L B F1 "ST95P08M" -200 -500 50 H V L B F2 "st-microelectronics-SO08" 0 150 50 H I C C DRAW P 2 1 0 0 -200 400 -200 -400 P 2 1 0 0 -200 -400 200 -400 P 2 1 0 0 200 -400 200 400 P 2 1 0 0 200 400 -200 400 X C 6 -300 -100 100 R 40 40 1 1 I X D 5 -300 -300 100 R 40 40 1 1 I X HOLD\ 7 -300 300 100 R 40 40 1 1 I X Q 2 300 -300 100 L 40 40 1 1 T X S\ 1 -300 0 100 R 40 40 1 1 I X W\ 3 -300 100 100 R 40 40 1 1 I # Gate Name: P # Symbol Name: PWRN T 1 50 -155 50 0 2 0 GND T 1 50 175 50 0 2 0 VCC X GND 4 0 -300 200 U 40 40 2 1 W X VCC 8 0 300 200 D 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: STA013S # Package Name: SO28W # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF STA013S IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: STA013 F0 "IC" -900 750 50 H V L B F1 "STA013S" 0 500 50 H V L B F2 "st-microelectronics-SO28W" 0 150 50 H I C C DRAW P 2 1 0 0 -900 700 900 700 P 2 1 0 0 900 700 900 -700 P 2 1 0 0 900 -700 -900 -700 P 2 1 0 0 -900 -700 -900 700 X BIT_EN 7 -1000 0 100 R 40 40 1 1 I X FILT 19 800 -800 100 U 40 40 1 1 O X LRCKT 11 1000 0 100 L 40 40 1 1 O X OCLK 12 100 -800 100 U 40 40 1 1 B X OUT/DATA 28 -500 -800 100 U 40 40 1 1 O X RESET\ 26 -1000 600 100 R 40 40 1 1 I X SCANEN 25 600 -800 100 U 40 40 1 1 I X SCKR 6 -1000 100 100 R 40 40 1 1 I X SCKT 10 1000 100 100 L 40 40 1 1 O X SCL 4 -1000 400 100 R 40 40 1 1 I X SDA 3 -1000 500 100 R 40 40 1 1 B X SDI 5 -1000 200 100 R 40 40 1 1 I X SDO 9 1000 200 100 L 40 40 1 1 O X SRC_INT\ 8 -700 -800 100 U 40 40 1 1 I X TESTEN\ 24 400 -800 100 U 40 40 1 1 I X XTI 21 -300 -800 100 U 40 40 1 1 I X XTO 20 -100 -800 100 U 40 40 1 1 O # Gate Name: B # Symbol Name: STA013PW P 2 2 0 0 -400 800 400 800 P 2 2 0 0 400 800 400 -900 P 2 2 0 0 400 -900 -400 -900 P 2 2 0 0 -400 -900 -400 800 X PVDD 17 -500 200 100 R 40 40 2 1 W X PVSS 18 -500 -200 100 R 40 40 2 1 W X VDD_1 1 500 700 100 L 40 40 2 1 W X VDD_2 14 500 300 100 L 40 40 2 1 W X VDD_3 16 500 -100 100 L 40 40 2 1 W X VDD_4 23 500 -500 100 L 40 40 2 1 W X VSS_1 2 500 500 100 L 40 40 2 1 W X VSS_2 13 500 100 100 L 40 40 2 1 W X VSS_3 15 500 -300 100 L 40 40 2 1 W X VSS_4 22 500 -700 100 L 40 40 2 1 W X VSS_5 27 500 -800 100 L 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: STA013TS # Package Name: TQFP44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 18 # DEF STA013TS IC 0 40 Y Y 18 L N # Gate Name: A # Symbol Name: STA013 F0 "IC" -900 750 50 H V L B F1 "STA013TS" 0 500 50 H V L B F2 "st-microelectronics-TQFP44" 0 150 50 H I C C DRAW P 2 1 0 0 -900 700 900 700 P 2 1 0 0 900 700 900 -700 P 2 1 0 0 900 -700 -900 -700 P 2 1 0 0 -900 -700 -900 700 X BIT_EN 38 -1000 0 100 R 40 40 1 1 I X FILT 12 800 -800 100 U 40 40 1 1 O X LRCKT 2 1000 0 100 L 40 40 1 1 O X OCLK 3 100 -800 100 U 40 40 1 1 B X OUT/DATA 27 -500 -800 100 U 40 40 1 1 O X RESET\ 25 -1000 600 100 R 40 40 1 1 I X SCANEN 24 600 -800 100 U 40 40 1 1 I X SCKR 36 -1000 100 100 R 40 40 1 1 I X SCKT 44 1000 100 100 L 40 40 1 1 O X SCL 32 -1000 400 100 R 40 40 1 1 I X SDA 31 -1000 500 100 R 40 40 1 1 B X SDI 34 -1000 200 100 R 40 40 1 1 I X SDO 42 1000 200 100 L 40 40 1 1 O X SRC_INT\ 40 -700 -800 100 U 40 40 1 1 I X TESTEN\ 22 400 -800 100 U 40 40 1 1 I X XTI 15 -300 -800 100 U 40 40 1 1 I X XTO 13 -100 -800 100 U 40 40 1 1 O # Gate Name: B # Symbol Name: STA013PW P 2 2 0 0 -400 800 400 800 P 2 2 0 0 400 800 400 -900 P 2 2 0 0 400 -900 -400 -900 P 2 2 0 0 -400 -900 -400 800 X PVDD 10 -500 200 100 R 40 40 2 1 W X PVSS 11 -500 -200 100 R 40 40 2 1 W X VDD_1 29 500 700 100 L 40 40 2 1 W X VDD_2 6 500 300 100 L 40 40 2 1 W X VDD_3 8 500 -100 100 L 40 40 2 1 W X VDD_4 21 500 -500 100 L 40 40 2 1 W X VSS_1 30 500 500 100 L 40 40 2 1 W X VSS_2 5 500 100 100 L 40 40 2 1 W X VSS_3 7 500 -300 100 L 40 40 2 1 W X VSS_4 19 500 -700 100 L 40 40 2 1 W X VSS_5 26 500 -800 100 L 40 40 2 1 W # Gate Name: NC1 # Symbol Name: NC X NC 1 100 0 100 L 40 40 3 1 U # Gate Name: NC2 # Symbol Name: NC X NC 4 100 0 100 L 40 40 4 1 U # Gate Name: NC3 # Symbol Name: NC X NC 9 100 0 100 L 40 40 5 1 U # Gate Name: NC4 # Symbol Name: NC X NC 14 100 0 100 L 40 40 6 1 U # Gate Name: NC5 # Symbol Name: NC X NC 16 100 0 100 L 40 40 7 1 U # Gate Name: NC6 # Symbol Name: NC X NC 17 100 0 100 L 40 40 8 1 U # Gate Name: NC7 # Symbol Name: NC X NC 18 100 0 100 L 40 40 9 1 U # Gate Name: NC8 # Symbol Name: NC X NC 20 100 0 100 L 40 40 10 1 U # Gate Name: NC9 # Symbol Name: NC X NC 23 100 0 100 L 40 40 11 1 U # Gate Name: NC10 # Symbol Name: NC X NC 28 100 0 100 L 40 40 12 1 U # Gate Name: NC11 # Symbol Name: NC X NC 33 100 0 100 L 40 40 13 1 U # Gate Name: NC12 # Symbol Name: NC X NC 35 100 0 100 L 40 40 14 1 U # Gate Name: NC13 # Symbol Name: NC X NC 37 100 0 100 L 40 40 15 1 U # Gate Name: NC14 # Symbol Name: NC X NC 39 100 0 100 L 40 40 16 1 U # Gate Name: NC15 # Symbol Name: NC X NC 41 100 0 100 L 40 40 17 1 U # Gate Name: NC16 # Symbol Name: NC X NC 43 100 0 100 L 40 40 18 1 U ENDDRAW ENDDEF # # Dev Name: STA015 # Package Name: SO28W # Dev Tech: '' # Dev Prefix: IC # Gate count = 2 # DEF STA015 IC 0 40 Y Y 2 L N # Gate Name: A # Symbol Name: STA015S F0 "IC" -800 750 50 H V L B F1 "STA015" 0 500 50 H V L B F2 "st-microelectronics-SO28W" 0 150 50 H I C C DRAW P 2 1 0 0 -800 700 700 700 P 2 1 0 0 700 700 700 -800 P 2 1 0 0 700 -800 -800 -800 P 2 1 0 0 -800 -800 -800 700 X BIT_EN 7 -900 -100 100 R 40 40 1 1 I X CRCK_ADC 27 -900 -600 100 R 40 40 1 1 I X DATA-REQ 28 -900 -300 100 R 40 40 1 1 O X FILT 19 400 -900 100 U 40 40 1 1 O X LRCKT 11 800 -100 100 L 40 40 1 1 O X OCLK 12 800 -200 100 L 40 40 1 1 B X RESET\ 26 -900 500 100 R 40 40 1 1 I X SCKR 6 -900 0 100 R 40 40 1 1 I X SCKT 10 800 0 100 L 40 40 1 1 O X SCK_ADC 8 -900 -500 100 R 40 40 1 1 I X SCL 4 -900 300 100 R 40 40 1 1 I X SDA 3 -900 400 100 R 40 40 1 1 B X SDI 5 -900 100 100 R 40 40 1 1 I X SDI_ADC 25 -900 -700 100 R 40 40 1 1 I X SDO 9 800 100 100 L 40 40 1 1 O X TESTEN\ 24 -900 600 100 R 40 40 1 1 I X XTI 21 0 -900 100 U 40 40 1 1 I X XTO 20 200 -900 100 U 40 40 1 1 O # Gate Name: B # Symbol Name: STA015PW P 2 2 0 0 -400 800 400 800 P 2 2 0 0 400 800 400 -900 P 2 2 0 0 400 -900 -400 -900 P 2 2 0 0 -400 -900 -400 800 X PVDD 17 -500 200 100 R 40 40 2 1 W X PVSS 18 -500 -200 100 R 40 40 2 1 W X VDD_1 1 500 700 100 L 40 40 2 1 W X VDD_2 14 500 300 100 L 40 40 2 1 W X VDD_3 16 500 -100 100 L 40 40 2 1 W X VDD_4 23 500 -500 100 L 40 40 2 1 W X VSS_1 2 500 500 100 L 40 40 2 1 W X VSS_2 13 500 100 100 L 40 40 2 1 W X VSS_3 15 500 -300 100 L 40 40 2 1 W X VSS_4 22 500 -700 100 L 40 40 2 1 W ENDDRAW ENDDEF # # Dev Name: STA015TS # Package Name: TQFP44 # Dev Tech: '' # Dev Prefix: IC # Gate count = 6 # DEF STA015TS IC 0 40 Y Y 6 L N # Gate Name: A # Symbol Name: STA015TS F0 "IC" -1100 1050 50 H V L B F1 "STA015TS" -400 900 50 H V L B F2 "st-microelectronics-TQFP44" 0 150 50 H I C C DRAW P 2 1 0 0 -1100 1000 1000 1000 P 2 1 0 0 1000 1000 1000 -1100 P 2 1 0 0 1000 -1100 -1100 -1100 P 2 1 0 0 -1100 -1100 -1100 1000 X BIT_EN 38 -1200 -400 100 R 40 40 1 1 I X CRCK_ADC 26 -1200 -900 100 R 40 40 1 1 I X DATA-REQ 27 -1200 -600 100 R 40 40 1 1 O X FILT 12 200 -1200 100 U 40 40 1 1 O X GPIO_STRB 35 1100 0 100 L 40 40 1 1 B X GPSO_DATA 33 1100 -1000 100 L 40 40 1 1 O X GPSO_REQ 4 1100 -800 100 L 40 40 1 1 O X GPSO_SCKL 28 1100 -900 100 L 40 40 1 1 O X IODATA0 20 1100 900 100 L 40 40 1 1 B X IODATA1 18 1100 800 100 L 40 40 1 1 B X IODATA2 16 1100 700 100 L 40 40 1 1 B X IODATA3 14 1100 600 100 L 40 40 1 1 B X IODATA4 37 1100 500 100 L 40 40 1 1 B X IODATA5 39 1100 400 100 L 40 40 1 1 B X IODATA6 41 1100 300 100 L 40 40 1 1 B X IODATA7 43 1100 200 100 L 40 40 1 1 B X LRCKT 2 1100 -400 100 L 40 40 1 1 O X OCLK 3 1100 -500 100 L 40 40 1 1 B X RESET\ 25 -1200 700 100 R 40 40 1 1 I X SCKR 36 -1200 -300 100 R 40 40 1 1 I X SCKT 44 1100 -300 100 L 40 40 1 1 O X SCK_ADC 40 -1200 -800 100 R 40 40 1 1 I X SCL 32 -1200 400 100 R 40 40 1 1 I X SDA 31 -1200 500 100 R 40 40 1 1 B X SDI 34 -1200 -200 100 R 40 40 1 1 I X SDI_ADC 24 -1200 -1000 100 R 40 40 1 1 I X SDO 42 1100 -200 100 L 40 40 1 1 O X TESTEN\ 22 -1200 900 100 R 40 40 1 1 I X XTI 15 -300 -1200 100 U 40 40 1 1 I X XTO 13 -100 -1200 100 U 40 40 1 1 O # Gate Name: B # Symbol Name: STA015PW P 2 2 0 0 -400 800 400 800 P 2 2 0 0 400 800 400 -900 P 2 2 0 0 400 -900 -400 -900 P 2 2 0 0 -400 -900 -400 800 X PVDD 10 -500 200 100 R 40 40 2 1 W X PVSS 11 -500 -200 100 R 40 40 2 1 W X VDD_1 29 500 700 100 L 40 40 2 1 W X VDD_2 6 500 300 100 L 40 40 2 1 W X VDD_3 8 500 -100 100 L 40 40 2 1 W X VDD_4 21 500 -500 100 L 40 40 2 1 W X VSS_1 30 500 500 100 L 40 40 2 1 W X VSS_2 5 500 100 100 L 40 40 2 1 W X VSS_3 7 500 -300 100 L 40 40 2 1 W X VSS_4 19 500 -700 100 L 40 40 2 1 W # Gate Name: NC1 # Symbol Name: NC X NC 1 100 0 100 L 40 40 3 1 U # Gate Name: NC2 # Symbol Name: NC X NC 9 100 0 100 L 40 40 4 1 U # Gate Name: NC3 # Symbol Name: NC X NC 17 100 0 100 L 40 40 5 1 U # Gate Name: NC4 # Symbol Name: NC X NC 23 100 0 100 L 40 40 6 1 U ENDDRAW ENDDEF # # Dev Name: STPCC0166B # Package Name: PBGA-388 # Dev Tech: '' # Dev Prefix: IC # Gate count = 105 # DEF STPCC0166B IC 0 40 Y Y 105 L N # Gate Name: A # Symbol Name: C0166BAS F0 "IC" -100 750 50 H V L B F1 "STPCC0166B" -100 -800 50 H V L B F2 "st-microelectronics-PBGA-388" 0 150 50 H I C C DRAW P 2 1 0 0 -100 700 -100 -700 P 2 1 0 0 -100 -700 500 -700 P 2 1 0 0 500 -700 500 700 P 2 1 0 0 500 700 -100 700 X DCLK AF9 -200 -400 100 R 40 40 1 1 B X DEV_CLK F25 -200 -100 100 R 40 40 1 1 O X GCLK2X AF15 -200 -300 100 R 40 40 1 1 B X HCLK G23 -200 0 100 R 40 40 1 1 O X SCAN_EN B3 -200 -600 100 R 40 40 1 1 I X SYSRSTI AF3 -200 600 100 R 40 40 1 1 I X XTALI A3 -200 400 100 R 40 40 1 1 I X XTALO C4 -200 200 100 R 40 40 1 1 B # Gate Name: B # Symbol Name: C0166IDE P 2 2 0 0 -600 800 -600 -800 P 2 2 0 0 -600 -800 500 -800 P 2 2 0 0 500 -800 500 800 P 2 2 0 0 500 800 -600 800 X DACK_ENC0 C23 600 -100 100 L 40 40 2 1 O X DACK_ENC1 A23 600 -200 100 L 40 40 2 1 O X DACK_ENC2 B22 600 -300 100 L 40 40 2 1 O X DREA_MUX0 A24 600 200 100 L 40 40 2 1 I X DREA_MUX1 B23 600 100 100 L 40 40 2 1 I X IRQ_MUX0 E23 600 700 100 L 40 40 2 1 I X IRQ_MUX1 D26 600 600 100 L 40 40 2 1 I X IRQ_MUX2 E24 600 500 100 L 40 40 2 1 I X IRQ_MUX3 C25 600 400 100 L 40 40 2 1 I X PDACK# D3 -700 200 100 R 40 40 2 1 O X PDRQ C1 -700 500 100 R 40 40 2 1 I X PIOR# E2 -700 -100 100 R 40 40 2 1 B X PIOW# E4 -700 -200 100 R 40 40 2 1 O X PIRQ B1 -700 700 100 R 40 40 2 1 I X SDACK# D1 -700 100 100 R 40 40 2 1 O X SDRQ D2 -700 400 100 R 40 40 2 1 I X SIOR# E3 -700 -400 100 R 40 40 2 1 B X SIOW# E1 -700 -500 100 R 40 40 2 1 O X SIRQ C2 -700 600 100 R 40 40 2 1 I X SPKRD C5 600 -700 100 L 40 40 2 1 O X TC D22 600 -500 100 L 40 40 2 1 O # Gate Name: C # Symbol Name: C0166ISA P 2 3 0 0 -700 1800 -700 -2400 P 2 3 0 0 -700 -2400 600 -2400 P 2 3 0 0 600 -2400 600 1800 P 2 3 0 0 600 1800 -700 1800 X AEN AC3 700 -100 100 L 40 40 3 1 O X ALE W3 700 1200 100 L 40 40 3 1 O X BHE# AA2 700 1100 100 L 40 40 3 1 B X GPIOCS# AE3 700 -600 100 L 40 40 3 1 B X IOCHCK# AD1 700 -300 100 L 40 40 3 1 I X IOCHRDY Y1 700 1700 100 L 40 40 3 1 B X IOCS16# AB3 700 100 100 L 40 40 3 1 I X IOR# AA3 700 500 100 L 40 40 3 1 B X IOW# AC2 700 400 100 L 40 40 3 1 B X ISAOE# AF2 700 -400 100 L 40 40 3 1 O X ISA_CLK AD4 700 1500 100 L 40 40 3 1 O X ISA_CLK2X AE5 700 1400 100 L 40 40 3 1 O X KBCS#_DD14 N3 -800 -1700 100 R 40 40 3 1 B X LA17/DA0 F2 -800 1700 100 R 40 40 3 1 O X LA18/DA1 G4 -800 1600 100 R 40 40 3 1 O X LA19/DA2 F3 -800 1500 100 R 40 40 3 1 O X LA20/PCS#1 F1 -800 1400 100 R 40 40 3 1 B X LA21/PCS#3 G2 -800 1300 100 R 40 40 3 1 B X LA22/SCS#1 G3 -800 1200 100 R 40 40 3 1 B X LA23/SCS#3 H2 -800 1100 100 R 40 40 3 1 B X MASTER# AB4 700 300 100 L 40 40 3 1 I X MCS16# AC1 700 200 100 L 40 40 3 1 I X MEMR# Y4 700 1000 100 L 40 40 3 1 B X MEMW# AA1 700 900 100 L 40 40 3 1 B X OSC14M AF8 700 1300 100 L 40 40 3 1 O X REF# AD2 700 0 100 L 40 40 3 1 O X RMRTC#DD15 P1 -800 -1800 100 R 40 40 3 1 B X RTCAS# A4 700 -500 100 L 40 40 3 1 O X RTCDS#DD12 P3 -800 -1500 100 R 40 40 3 1 B X RTCRW#DD13 R2 -800 -1600 100 R 40 40 3 1 B X SA0 J4 -800 600 100 R 40 40 3 1 B X SA1 H1 -800 500 100 R 40 40 3 1 B X SA2 H3 -800 400 100 R 40 40 3 1 B X SA3 J2 -800 300 100 R 40 40 3 1 B X SA4 J1 -800 200 100 R 40 40 3 1 B X SA5 K2 -800 100 100 R 40 40 3 1 B X SA6 J3 -800 0 100 R 40 40 3 1 B X SA7 K1 -800 -100 100 R 40 40 3 1 B X SA8/DD0 K4 -800 -200 100 R 40 40 3 1 B X SA9/DD1 L2 -800 -300 100 R 40 40 3 1 B X SA10/DD2 K3 -800 -400 100 R 40 40 3 1 B X SA11/DD3 L1 -800 -500 100 R 40 40 3 1 B X SA12/DD4 M2 -800 -600 100 R 40 40 3 1 B X SA13/DD5 M1 -800 -700 100 R 40 40 3 1 B X SA14/DD6 L3 -800 -800 100 R 40 40 3 1 B X SA15/DD7 N2 -800 -900 100 R 40 40 3 1 B X SA16/DD8 M4 -800 -1000 100 R 40 40 3 1 B X SA17/DD9 N1 -800 -1100 100 R 40 40 3 1 B X SA18/DD10 M3 -800 -1200 100 R 40 40 3 1 B X SA19/DD11 P4 -800 -1300 100 R 40 40 3 1 B X SD0 R1 700 -800 100 L 40 40 3 1 B X SD1 T2 700 -900 100 L 40 40 3 1 B X SD2 R3 700 -1000 100 L 40 40 3 1 B X SD3 T1 700 -1100 100 L 40 40 3 1 B X SD4 R4 700 -1200 100 L 40 40 3 1 B X SD5 U2 700 -1300 100 L 40 40 3 1 B X SD6 T3 700 -1400 100 L 40 40 3 1 B X SD7 U1 700 -1500 100 L 40 40 3 1 B X SD8 U4 700 -1600 100 L 40 40 3 1 B X SD9 V2 700 -1700 100 L 40 40 3 1 B X SD10 U3 700 -1800 100 L 40 40 3 1 B X SD11 V1 700 -1900 100 L 40 40 3 1 B X SD12 W2 700 -2000 100 L 40 40 3 1 B X SD13 W1 700 -2100 100 L 40 40 3 1 B X SD14 V3 700 -2200 100 L 40 40 3 1 B X SD15 Y2 700 -2300 100 L 40 40 3 1 B X SMEMR# Y3 700 800 100 L 40 40 3 1 O X SMEMW# AB2 700 700 100 L 40 40 3 1 O X SYSRSTO# AE4 700 1600 100 L 40 40 3 1 O X ZWS# AC9 700 -200 100 L 40 40 3 1 I # Gate Name: D # Symbol Name: C0166MEM P 2 4 0 0 -400 2300 -400 -2500 P 2 4 0 0 -400 -2500 400 -2500 P 2 4 0 0 400 -2500 400 2300 P 2 4 0 0 400 2300 -400 2300 X CAS#0 AE21 500 1700 100 L 40 40 4 1 O X CAS#1 AC20 500 1600 100 L 40 40 4 1 O X CAS#2 AF21 500 1500 100 L 40 40 4 1 O X CAS#3 AD20 500 1400 100 L 40 40 4 1 O X CAS#4 AE22 500 1300 100 L 40 40 4 1 O X CAS#5 AF22 500 1200 100 L 40 40 4 1 O X CAS#6 AD21 500 1100 100 L 40 40 4 1 O X CAS#7 AE23 500 1000 100 L 40 40 4 1 O X MA0 AD15 -500 2200 100 R 40 40 4 1 B X MA1 AF16 -500 2100 100 R 40 40 4 1 B X MA2 AC15 -500 2000 100 R 40 40 4 1 B X MA3 AE17 -500 1900 100 R 40 40 4 1 B X MA4 AD16 -500 1800 100 R 40 40 4 1 B X MA5 AF17 -500 1700 100 R 40 40 4 1 B X MA6 AC17 -500 1600 100 R 40 40 4 1 B X MA7 AE18 -500 1500 100 R 40 40 4 1 B X MA8 AD17 -500 1400 100 R 40 40 4 1 B X MA9 AF18 -500 1300 100 R 40 40 4 1 B X MA10 AE19 -500 1200 100 R 40 40 4 1 B X MA11 AF19 -500 1100 100 R 40 40 4 1 B X MD0 AF23 -500 700 100 R 40 40 4 1 B X MD1 AE24 -500 600 100 R 40 40 4 1 B X MD2 AF24 -500 500 100 R 40 40 4 1 B X MD3 AD25 -500 400 100 R 40 40 4 1 B X MD4 AC25 -500 300 100 R 40 40 4 1 B X MD5 AC26 -500 200 100 R 40 40 4 1 B X MD6 AB24 -500 100 100 R 40 40 4 1 B X MD7 AA25 -500 0 100 R 40 40 4 1 B X MD8 AA24 -500 -100 100 R 40 40 4 1 B X MD9 Y25 -500 -200 100 R 40 40 4 1 B X MD10 Y24 -500 -300 100 R 40 40 4 1 B X MD11 V23 -500 -400 100 R 40 40 4 1 B X MD12 W24 -500 -500 100 R 40 40 4 1 B X MD13 V26 -500 -600 100 R 40 40 4 1 B X MD14 V24 -500 -700 100 R 40 40 4 1 B X MD15 U23 -500 -800 100 R 40 40 4 1 B X MD16 U24 -500 -900 100 R 40 40 4 1 B X MD17 R26 -500 -1000 100 R 40 40 4 1 B X MD18 P25 -500 -1100 100 R 40 40 4 1 B X MD19 P26 -500 -1200 100 R 40 40 4 1 B X MD20 N25 -500 -1300 100 R 40 40 4 1 B X MD21 N26 -500 -1400 100 R 40 40 4 1 B X MD22 M25 -500 -1500 100 R 40 40 4 1 B X MD23 M26 -500 -1600 100 R 40 40 4 1 B X MD24 M24 -500 -1700 100 R 40 40 4 1 B X MD25 M23 -500 -1800 100 R 40 40 4 1 B X MD26 L24 -500 -1900 100 R 40 40 4 1 B X MD27 J25 -500 -2000 100 R 40 40 4 1 B X MD28 J26 -500 -2100 100 R 40 40 4 1 B X MD29 H26 -500 -2200 100 R 40 40 4 1 B X MD30 G25 -500 -2300 100 R 40 40 4 1 B X MD31 G26 -500 -2400 100 R 40 40 4 1 B X MD32 AD22 500 700 100 L 40 40 4 1 B X MD33 AD23 500 600 100 L 40 40 4 1 B X MD34 AE26 500 500 100 L 40 40 4 1 B X MD35 AD26 500 400 100 L 40 40 4 1 B X MD36 AC24 500 300 100 L 40 40 4 1 B X MD37 AB25 500 200 100 L 40 40 4 1 B X MD38 AB26 500 100 100 L 40 40 4 1 B X MD39 Y23 500 0 100 L 40 40 4 1 B X MD40 AA26 500 -100 100 L 40 40 4 1 B X MD41 Y26 500 -200 100 L 40 40 4 1 B X MD42 W25 500 -300 100 L 40 40 4 1 B X MD43 W26 500 -400 100 L 40 40 4 1 B X MD44 V25 500 -500 100 L 40 40 4 1 B X MD45 U25 500 -600 100 L 40 40 4 1 B X MD46 U26 500 -700 100 L 40 40 4 1 B X MD47 T25 500 -800 100 L 40 40 4 1 B X MD48 R25 500 -900 100 L 40 40 4 1 B X MD49 T24 500 -1000 100 L 40 40 4 1 B X MD50 R23 500 -1100 100 L 40 40 4 1 B X MD51 R24 500 -1200 100 L 40 40 4 1 B X MD52 N23 500 -1300 100 L 40 40 4 1 B X MD53 P24 500 -1400 100 L 40 40 4 1 B X MD54 N24 500 -1500 100 L 40 40 4 1 B X MD55 L25 500 -1600 100 L 40 40 4 1 B X MD56 L26 500 -1700 100 L 40 40 4 1 B X MD57 K25 500 -1800 100 L 40 40 4 1 B X MD58 K26 500 -1900 100 L 40 40 4 1 B X MD59 K24 500 -2000 100 L 40 40 4 1 B X MD60 H25 500 -2100 100 L 40 40 4 1 B X MD61 J24 500 -2200 100 L 40 40 4 1 B X MD62 H23 500 -2300 100 L 40 40 4 1 B X MD63 H24 500 -2400 100 L 40 40 4 1 B X MWE# AC22 -500 900 100 R 40 40 4 1 B X RAS#0 AD18 500 2200 100 L 40 40 4 1 O X RAS#1 AE20 500 2100 100 L 40 40 4 1 O X RAS#2 AC19 500 2000 100 L 40 40 4 1 O X RAS#3 AF20 500 1900 100 L 40 40 4 1 O # Gate Name: E # Symbol Name: C0166PCI P 2 5 0 0 -500 1500 -500 -2000 P 2 5 0 0 -500 -2000 500 -2000 P 2 5 0 0 500 -2000 500 1500 P 2 5 0 0 500 1500 -500 1500 T 0 -290 1400 60 0 5 0 VDD5 T 0 -260 1300 60 0 5 0 VDD5~ T 0 -230 1200 60 0 5 0 VDD5~~ T 0 -200 1100 60 0 5 0 VDD5~~~ X AD0 A20 600 1400 100 L 40 40 5 1 B X AD1 C20 600 1300 100 L 40 40 5 1 B X AD2 B19 600 1200 100 L 40 40 5 1 B X AD3 A19 600 1100 100 L 40 40 5 1 B X AD4 C19 600 1000 100 L 40 40 5 1 B X AD5 B18 600 900 100 L 40 40 5 1 B X AD6 A18 600 800 100 L 40 40 5 1 B X AD7 B17 600 700 100 L 40 40 5 1 B X AD8 C18 600 600 100 L 40 40 5 1 B X AD9 A17 600 500 100 L 40 40 5 1 B X AD10 D17 600 400 100 L 40 40 5 1 B X AD11 B16 600 300 100 L 40 40 5 1 B X AD12 C17 600 200 100 L 40 40 5 1 B X AD13 B15 600 100 100 L 40 40 5 1 B X AD14 A15 600 0 100 L 40 40 5 1 B X AD15 C16 600 -100 100 L 40 40 5 1 B X AD16 D15 600 -200 100 L 40 40 5 1 B X AD17 A14 600 -300 100 L 40 40 5 1 B X AD18 C15 600 -400 100 L 40 40 5 1 B X AD19 B13 600 -500 100 L 40 40 5 1 B X AD20 D13 600 -600 100 L 40 40 5 1 B X AD21 A13 600 -700 100 L 40 40 5 1 B X AD22 C14 600 -800 100 L 40 40 5 1 B X AD23 C13 600 -900 100 L 40 40 5 1 B X AD24 A12 600 -1000 100 L 40 40 5 1 B X AD25 B11 600 -1100 100 L 40 40 5 1 B X AD26 C12 600 -1200 100 L 40 40 5 1 B X AD27 A11 600 -1300 100 L 40 40 5 1 B X AD28 D12 600 -1400 100 L 40 40 5 1 B X AD29 B10 600 -1500 100 L 40 40 5 1 B X AD30 C11 600 -1600 100 L 40 40 5 1 B X AD31 A10 600 -1700 100 L 40 40 5 1 B X CBE0 D10 -600 600 100 R 40 40 5 1 B X CBE1 C10 -600 500 100 R 40 40 5 1 B X CBE2 A9 -600 400 100 R 40 40 5 1 B X CBE3 B8 -600 300 100 R 40 40 5 1 B X DEVSEL# C8 -600 -300 100 R 40 40 5 1 B X FRAME# A8 -600 100 100 R 40 40 5 1 B X IRDY# D8 -600 -100 100 R 40 40 5 1 B X LOCK# A6 -600 -600 100 R 40 40 5 1 I X PAR B6 -600 -400 100 R 40 40 5 1 B X PCIGNT#0 C22 -600 -1200 100 R 40 40 5 1 O X PCIGNT#1 B21 -600 -1300 100 R 40 40 5 1 O X PCIGNT#2 D20 -600 -1400 100 R 40 40 5 1 O X PCIREQ#0 C21 -600 -800 100 R 40 40 5 1 I X PCIREQ#1 A21 -600 -900 100 R 40 40 5 1 I X PCIREQ#2 B20 -600 -1000 100 R 40 40 5 1 I X PCI_CLKI F24 -600 900 100 R 40 40 5 1 I X PCI_CLKO D25 -600 800 100 R 40 40 5 1 O X PCI_INT#0 A5 -600 -1600 100 R 40 40 5 1 I X PCI_INT#1 C6 -600 -1700 100 R 40 40 5 1 I X PCI_INT#2 B4 -600 -1800 100 R 40 40 5 1 I X PCI_INT#3 D5 -600 -1900 100 R 40 40 5 1 I X SERR# D7 -600 -500 100 R 40 40 5 1 O X STOP# A7 -600 -200 100 R 40 40 5 1 B X TRDY# B7 -600 0 100 R 40 40 5 1 B X VDD5@1 A16 -600 1400 100 R 40 40 5 1 W X VDD5@2 B12 -600 1300 100 R 40 40 5 1 W X VDD5@3 B9 -600 1200 100 R 40 40 5 1 W X VDD5@4 D18 -600 1100 100 R 40 40 5 1 W # Gate Name: F # Symbol Name: C0166MON P 2 6 0 0 -600 1300 -600 -1700 P 2 6 0 0 -600 -1700 600 -1700 P 2 6 0 0 600 -1700 600 1300 P 2 6 0 0 600 1300 -600 1300 X BLUE AF6 700 1000 100 L 40 40 6 1 O X BLUE_TV AF11 700 -1200 100 L 40 40 6 1 O X COMP AF5 -700 1000 100 R 40 40 6 1 I X CVBS AD11 700 -1500 100 L 40 40 6 1 O X GREEN AD6 700 1100 100 L 40 40 6 1 O X GREEN_TV AC10 700 -1100 100 L 40 40 6 1 O X HSYNC AC5 700 800 100 L 40 40 6 1 O X IREF1_TV AD8 -700 -1000 100 R 40 40 6 1 I X IREF2_TV AE11 -700 -1200 100 R 40 40 6 1 I X ODD_EVEN AD9 700 -1400 100 L 40 40 6 1 O X RED AE6 700 1200 100 L 40 40 6 1 O X RED_TV AF10 700 -1000 100 L 40 40 6 1 O X RSET AE8 -700 1100 100 R 40 40 6 1 I X SDA/DDC0 C7 -700 600 100 R 40 40 6 1 B X SLC/DDC1 B5 -700 700 100 R 40 40 6 1 B X VCLK AC12 700 500 100 L 40 40 6 1 I X VCS AE10 700 -1300 100 L 40 40 6 1 O X VDDA_TV AF12 -700 -1500 100 R 40 40 6 1 I X VDDDCKPLL AF13 -700 -600 100 R 40 40 6 1 I X VDDDEVPLL G24 -700 -800 100 R 40 40 6 1 I X VDDGCKPLL AD19 -700 -500 100 R 40 40 6 1 I X VDDHCKPLL F26 -700 -700 100 R 40 40 6 1 I X VDD_DAC1 AC7 -700 400 100 R 40 40 6 1 I X VDD_DAC2 AF4 -700 300 100 R 40 40 6 1 I X VIN0 AE13 700 400 100 L 40 40 6 1 I X VIN1 AD14 700 300 100 L 40 40 6 1 I X VIN2 AD12 700 200 100 L 40 40 6 1 I X VIN3 AE14 700 100 100 L 40 40 6 1 I X VIN4 AC14 700 0 100 L 40 40 6 1 I X VIN5 AF14 700 -100 100 L 40 40 6 1 I X VIN6 AD13 700 -200 100 L 40 40 6 1 I X VIN7 AE15 700 -300 100 L 40 40 6 1 I X VREF1_TV AE9 -700 -1100 100 R 40 40 6 1 I X VREF2_TV AD10 -700 -1300 100 R 40 40 6 1 I X VREF_DAC AD7 -700 1200 100 R 40 40 6 1 I X VSSA_TV AE12 -700 -1600 100 R 40 40 6 1 I X VSS_DAC1 AE7 -700 100 100 R 40 40 6 1 I X VSS_DAC2 AF7 -700 0 100 R 40 40 6 1 I X VSS_DLL1 E25 -700 -200 100 R 40 40 6 1 I X VSS_DLL2 E26 -700 -300 100 R 40 40 6 1 I X VSYNC AD5 700 900 100 L 40 40 6 1 O # Gate Name: RESERV1 # Symbol Name: RESERVED X RESERVED C26 100 0 100 L 40 40 7 1 U # Gate Name: RESERV2 # Symbol Name: RESERVED X RESERVED D24 100 0 100 L 40 40 8 1 U # Gate Name: RESERV3 # Symbol Name: RESERVED X RESERVED B24 100 0 100 L 40 40 9 1 U # Gate Name: RESERV4 # Symbol Name: RESERVED X RESERVED A25 100 0 100 L 40 40 10 1 U # Gate Name: VDD1 # Symbol Name: VDD X VDD A22 0 100 100 D 40 40 11 1 W # Gate Name: VDD2 # Symbol Name: VDD X VDD B14 0 100 100 D 40 40 12 1 W # Gate Name: VDD3 # Symbol Name: VDD X VDD C9 0 100 100 D 40 40 13 1 W # Gate Name: VDD4 # Symbol Name: VDD X VDD D6 0 100 100 D 40 40 14 1 W # Gate Name: VDD5 # Symbol Name: VDD X VDD D11 0 100 100 D 40 40 15 1 W # Gate Name: VDD6 # Symbol Name: VDD X VDD D16 0 100 100 D 40 40 16 1 W # Gate Name: VDD7 # Symbol Name: VDD X VDD D21 0 100 100 D 40 40 17 1 W # Gate Name: VDD8 # Symbol Name: VDD X VDD F4 0 100 100 D 40 40 18 1 W # Gate Name: VDD9 # Symbol Name: VDD X VDD F23 0 100 100 D 40 40 19 1 W # Gate Name: VDD10 # Symbol Name: VDD X VDD G1 0 100 100 D 40 40 20 1 W # Gate Name: VDD11 # Symbol Name: VDD X VDD K23 0 100 100 D 40 40 21 1 W # Gate Name: VDD12 # Symbol Name: VDD X VDD L4 0 100 100 D 40 40 22 1 W # Gate Name: VDD13 # Symbol Name: VDD X VDD L23 0 100 100 D 40 40 23 1 W # Gate Name: VDD14 # Symbol Name: VDD X VDD P2 0 100 100 D 40 40 24 1 W # Gate Name: VDD15 # Symbol Name: VDD X VDD T4 0 100 100 D 40 40 25 1 W # Gate Name: VDD16 # Symbol Name: VDD X VDD T23 0 100 100 D 40 40 26 1 W # Gate Name: VDD17 # Symbol Name: VDD X VDD T26 0 100 100 D 40 40 27 1 W # Gate Name: VDD18 # Symbol Name: VDD X VDD W4 0 100 100 D 40 40 28 1 W # Gate Name: VDD19 # Symbol Name: VDD X VDD AA4 0 100 100 D 40 40 29 1 W # Gate Name: VDD20 # Symbol Name: VDD X VDD AA23 0 100 100 D 40 40 30 1 W # Gate Name: VDD21 # Symbol Name: VDD X VDD AB1 0 100 100 D 40 40 31 1 W # Gate Name: VDD22 # Symbol Name: VDD X VDD AB23 0 100 100 D 40 40 32 1 W # Gate Name: VDD23 # Symbol Name: VDD X VDD AC6 0 100 100 D 40 40 33 1 W # Gate Name: VDD24 # Symbol Name: VDD X VDD AC11 0 100 100 D 40 40 34 1 W # Gate Name: VDD25 # Symbol Name: VDD X VDD AC16 0 100 100 D 40 40 35 1 W # Gate Name: VDD26 # Symbol Name: VDD X VDD AC21 0 100 100 D 40 40 36 1 W # Gate Name: VSS1 # Symbol Name: VSS X VSS A1 0 -100 100 U 40 40 37 1 W # Gate Name: VSS2 # Symbol Name: VSS X VSS A26 0 -100 100 U 40 40 38 1 W # Gate Name: VSS3 # Symbol Name: VSS X VSS B2 0 -100 100 U 40 40 39 1 W # Gate Name: VSS4 # Symbol Name: VSS X VSS B25 0 -100 100 U 40 40 40 1 W # Gate Name: VSS5 # Symbol Name: VSS X VSS B26 0 -100 100 U 40 40 41 1 W # Gate Name: VSS6 # Symbol Name: VSS X VSS C3 0 -100 100 U 40 40 42 1 W # Gate Name: VSS7 # Symbol Name: VSS X VSS C24 0 -100 100 U 40 40 43 1 W # Gate Name: VSS8 # Symbol Name: VSS X VSS D4 0 -100 100 U 40 40 44 1 W # Gate Name: VSS9 # Symbol Name: VSS X VSS D9 0 -100 100 U 40 40 45 1 W # Gate Name: VSS10 # Symbol Name: VSS X VSS D14 0 -100 100 U 40 40 46 1 W # Gate Name: VSS11 # Symbol Name: VSS X VSS D19 0 -100 100 U 40 40 47 1 W # Gate Name: VSS12 # Symbol Name: VSS X VSS D23 0 -100 100 U 40 40 48 1 W # Gate Name: VSS13 # Symbol Name: VSS X VSS H4 0 -100 100 U 40 40 49 1 W # Gate Name: VSS14 # Symbol Name: VSS X VSS J23 0 -100 100 U 40 40 50 1 W # Gate Name: VSS15 # Symbol Name: VSS X VSS L11 0 -100 100 U 40 40 51 1 W # Gate Name: VSS16 # Symbol Name: VSS X VSS L12 0 -100 100 U 40 40 52 1 W # Gate Name: VSS17 # Symbol Name: VSS X VSS L13 0 -100 100 U 40 40 53 1 W # Gate Name: VSS18 # Symbol Name: VSS X VSS L14 0 -100 100 U 40 40 54 1 W # Gate Name: VSS19 # Symbol Name: VSS X VSS L15 0 -100 100 U 40 40 55 1 W # Gate Name: VSS20 # Symbol Name: VSS X VSS L16 0 -100 100 U 40 40 56 1 W # Gate Name: VSS21 # Symbol Name: VSS X VSS M11 0 -100 100 U 40 40 57 1 W # Gate Name: VSS22 # Symbol Name: VSS X VSS M12 0 -100 100 U 40 40 58 1 W # Gate Name: VSS23 # Symbol Name: VSS X VSS M13 0 -100 100 U 40 40 59 1 W # Gate Name: VSS24 # Symbol Name: VSS X VSS M14 0 -100 100 U 40 40 60 1 W # Gate Name: VSS25 # Symbol Name: VSS X VSS M15 0 -100 100 U 40 40 61 1 W # Gate Name: VSS26 # Symbol Name: VSS X VSS M16 0 -100 100 U 40 40 62 1 W # Gate Name: VSS27 # Symbol Name: VSS X VSS N4 0 -100 100 U 40 40 63 1 W # Gate Name: VSS28 # Symbol Name: VSS X VSS N11 0 -100 100 U 40 40 64 1 W # Gate Name: VSS29 # Symbol Name: VSS X VSS N12 0 -100 100 U 40 40 65 1 W # Gate Name: VSS30 # Symbol Name: VSS X VSS N13 0 -100 100 U 40 40 66 1 W # Gate Name: VSS31 # Symbol Name: VSS X VSS N14 0 -100 100 U 40 40 67 1 W # Gate Name: VSS32 # Symbol Name: VSS X VSS N15 0 -100 100 U 40 40 68 1 W # Gate Name: VSS33 # Symbol Name: VSS X VSS N16 0 -100 100 U 40 40 69 1 W # Gate Name: VSS34 # Symbol Name: VSS X VSS P11 0 -100 100 U 40 40 70 1 W # Gate Name: VSS35 # Symbol Name: VSS X VSS P12 0 -100 100 U 40 40 71 1 W # Gate Name: VSS36 # Symbol Name: VSS X VSS P13 0 -100 100 U 40 40 72 1 W # Gate Name: VSS37 # Symbol Name: VSS X VSS P14 0 -100 100 U 40 40 73 1 W # Gate Name: VSS38 # Symbol Name: VSS X VSS P15 0 -100 100 U 40 40 74 1 W # Gate Name: VSS39 # Symbol Name: VSS X VSS P16 0 -100 100 U 40 40 75 1 W # Gate Name: VSS40 # Symbol Name: VSS X VSS P23 0 -100 100 U 40 40 76 1 W # Gate Name: VSS41 # Symbol Name: VSS X VSS R11 0 -100 100 U 40 40 77 1 W # Gate Name: VSS42 # Symbol Name: VSS X VSS R12 0 -100 100 U 40 40 78 1 W # Gate Name: VSS43 # Symbol Name: VSS X VSS R13 0 -100 100 U 40 40 79 1 W # Gate Name: VSS44 # Symbol Name: VSS X VSS R14 0 -100 100 U 40 40 80 1 W # Gate Name: VSS45 # Symbol Name: VSS X VSS R15 0 -100 100 U 40 40 81 1 W # Gate Name: VSS46 # Symbol Name: VSS X VSS R16 0 -100 100 U 40 40 82 1 W # Gate Name: VSS47 # Symbol Name: VSS X VSS T11 0 -100 100 U 40 40 83 1 W # Gate Name: VSS48 # Symbol Name: VSS X VSS T12 0 -100 100 U 40 40 84 1 W # Gate Name: VSS49 # Symbol Name: VSS X VSS T13 0 -100 100 U 40 40 85 1 W # Gate Name: VSS50 # Symbol Name: VSS X VSS T14 0 -100 100 U 40 40 86 1 W # Gate Name: VSS51 # Symbol Name: VSS X VSS T15 0 -100 100 U 40 40 87 1 W # Gate Name: VSS52 # Symbol Name: VSS X VSS T16 0 -100 100 U 40 40 88 1 W # Gate Name: VSS53 # Symbol Name: VSS X VSS V4 0 -100 100 U 40 40 89 1 W # Gate Name: VSS54 # Symbol Name: VSS X VSS W23 0 -100 100 U 40 40 90 1 W # Gate Name: VSS55 # Symbol Name: VSS X VSS AC4 0 -100 100 U 40 40 91 1 W # Gate Name: VSS56 # Symbol Name: VSS X VSS AC8 0 -100 100 U 40 40 92 1 W # Gate Name: VSS57 # Symbol Name: VSS X VSS AC13 0 -100 100 U 40 40 93 1 W # Gate Name: VSS58 # Symbol Name: VSS X VSS AC18 0 -100 100 U 40 40 94 1 W # Gate Name: VSS59 # Symbol Name: VSS X VSS AC23 0 -100 100 U 40 40 95 1 W # Gate Name: VSS60 # Symbol Name: VSS X VSS AD3 0 -100 100 U 40 40 96 1 W # Gate Name: VSS61 # Symbol Name: VSS X VSS AD24 0 -100 100 U 40 40 97 1 W # Gate Name: VSS62 # Symbol Name: VSS X VSS AE1 0 -100 100 U 40 40 98 1 W # Gate Name: VSS63 # Symbol Name: VSS X VSS AE2 0 -100 100 U 40 40 99 1 W # Gate Name: VSS64 # Symbol Name: VSS X VSS AE16 0 -100 100 U 40 40 100 1 W # Gate Name: VSS65 # Symbol Name: VSS X VSS AE25 0 -100 100 U 40 40 101 1 W # Gate Name: VSS66 # Symbol Name: VSS X VSS AF1 0 -100 100 U 40 40 102 1 W # Gate Name: VSS67 # Symbol Name: VSS X VSS AF25 0 -100 100 U 40 40 103 1 W # Gate Name: VSS68 # Symbol Name: VSS X VSS AF26 0 -100 100 U 40 40 104 1 W # Gate Name: VSS69 # Symbol Name: VSS X VSS A2 0 -100 100 U 40 40 105 1 W ENDDRAW ENDDEF # # Dev Name: STV5348 # Package Name: DIL28-6 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF STV5348 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: STV5348 F0 "IC" -600 1250 50 H V L B F1 "STV5348" -600 -1300 50 H V L B F2 "st-microelectronics-DIL28-6" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1200 600 1200 P 2 1 0 0 600 1200 600 -1200 P 2 1 0 0 600 -1200 -600 -1200 P 2 1 0 0 -600 -1200 -600 1200 X B 10 800 -300 200 L 40 40 1 1 O X BLAN 12 800 400 200 L 40 40 1 1 O X CBLK 28 800 -600 200 L 40 40 1 1 B X COR 13 800 300 200 L 40 40 1 1 C X CVBS 1 -800 1100 200 R 40 40 1 1 I X DV 19 800 600 200 L 40 40 1 1 O X FFB 6 -800 1000 200 R 40 40 1 1 I X G 9 800 -200 200 L 40 40 1 1 O X L23 18 800 500 200 L 40 40 1 1 O X MA/SL 2 -800 500 200 R 40 40 1 1 I X ODD/EVEN 14 800 200 200 L 40 40 1 1 O X POL 4 -800 400 200 R 40 40 1 1 I X R 8 800 -100 200 L 40 40 1 1 O X RESERVED 20 -800 -200 200 R 40 40 1 1 P X RGBREF 11 -800 -500 200 R 40 40 1 1 W X SCL 16 -800 700 200 R 40 40 1 1 I X SDA 17 -800 800 200 R 40 40 1 1 B X STTV/LFB 5 800 -500 200 L 40 40 1 1 B X TEST 27 -800 -300 200 R 40 40 1 1 P X VCR/TV 21 -800 300 200 R 40 40 1 1 I X VDDA 3 -800 -600 200 R 40 40 1 1 W X VDDD 22 -800 -700 200 R 40 40 1 1 W X VSSA 26 -800 -1000 200 R 40 40 1 1 W X VSSD 7 -800 -1100 200 R 40 40 1 1 W X VSSO 25 -800 -900 200 R 40 40 1 1 W X XTI 24 -800 100 200 R 40 40 1 1 I X XTO 23 -800 0 200 R 40 40 1 1 O X Y 15 800 100 200 L 40 40 1 1 C ENDDRAW ENDDEF # # Dev Name: STV5348/H # Package Name: DIL28-6 # Dev Tech: /H # Dev Prefix: IC # Gate count = 1 # DEF STV5348/H IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: STV5348 F0 "IC" -600 1250 50 H V L B F1 "STV5348/H" -600 -1300 50 H V L B F2 "st-microelectronics-DIL28-6" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1200 600 1200 P 2 1 0 0 600 1200 600 -1200 P 2 1 0 0 600 -1200 -600 -1200 P 2 1 0 0 -600 -1200 -600 1200 X B 10 800 -300 200 L 40 40 1 1 O X BLAN 12 800 400 200 L 40 40 1 1 O X CBLK 28 800 -600 200 L 40 40 1 1 B X COR 13 800 300 200 L 40 40 1 1 C X CVBS 1 -800 1100 200 R 40 40 1 1 I X DV 19 800 600 200 L 40 40 1 1 O X FFB 6 -800 1000 200 R 40 40 1 1 I X G 9 800 -200 200 L 40 40 1 1 O X L23 18 800 500 200 L 40 40 1 1 O X MA/SL 2 -800 500 200 R 40 40 1 1 I X ODD/EVEN 14 800 200 200 L 40 40 1 1 O X POL 4 -800 400 200 R 40 40 1 1 I X R 8 800 -100 200 L 40 40 1 1 O X RESERVED 20 -800 -200 200 R 40 40 1 1 P X RGBREF 11 -800 -500 200 R 40 40 1 1 W X SCL 16 -800 700 200 R 40 40 1 1 I X SDA 17 -800 800 200 R 40 40 1 1 B X STTV/LFB 5 800 -500 200 L 40 40 1 1 B X TEST 27 -800 -300 200 R 40 40 1 1 P X VCR/TV 21 -800 300 200 R 40 40 1 1 I X VDDA 3 -800 -600 200 R 40 40 1 1 W X VDDD 22 -800 -700 200 R 40 40 1 1 W X VSSA 26 -800 -1000 200 R 40 40 1 1 W X VSSD 7 -800 -1100 200 R 40 40 1 1 W X VSSO 25 -800 -900 200 R 40 40 1 1 W X XTI 24 -800 100 200 R 40 40 1 1 I X XTO 23 -800 0 200 R 40 40 1 1 O X Y 15 800 100 200 L 40 40 1 1 C ENDDRAW ENDDEF # # Dev Name: STV5348/T # Package Name: DIL28-6 # Dev Tech: /T # Dev Prefix: IC # Gate count = 1 # DEF STV5348/T IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: STV5348 F0 "IC" -600 1250 50 H V L B F1 "STV5348/T" -600 -1300 50 H V L B F2 "st-microelectronics-DIL28-6" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1200 600 1200 P 2 1 0 0 600 1200 600 -1200 P 2 1 0 0 600 -1200 -600 -1200 P 2 1 0 0 -600 -1200 -600 1200 X B 10 800 -300 200 L 40 40 1 1 O X BLAN 12 800 400 200 L 40 40 1 1 O X CBLK 28 800 -600 200 L 40 40 1 1 B X COR 13 800 300 200 L 40 40 1 1 C X CVBS 1 -800 1100 200 R 40 40 1 1 I X DV 19 800 600 200 L 40 40 1 1 O X FFB 6 -800 1000 200 R 40 40 1 1 I X G 9 800 -200 200 L 40 40 1 1 O X L23 18 800 500 200 L 40 40 1 1 O X MA/SL 2 -800 500 200 R 40 40 1 1 I X ODD/EVEN 14 800 200 200 L 40 40 1 1 O X POL 4 -800 400 200 R 40 40 1 1 I X R 8 800 -100 200 L 40 40 1 1 O X RESERVED 20 -800 -200 200 R 40 40 1 1 P X RGBREF 11 -800 -500 200 R 40 40 1 1 W X SCL 16 -800 700 200 R 40 40 1 1 I X SDA 17 -800 800 200 R 40 40 1 1 B X STTV/LFB 5 800 -500 200 L 40 40 1 1 B X TEST 27 -800 -300 200 R 40 40 1 1 P X VCR/TV 21 -800 300 200 R 40 40 1 1 I X VDDA 3 -800 -600 200 R 40 40 1 1 W X VDDD 22 -800 -700 200 R 40 40 1 1 W X VSSA 26 -800 -1000 200 R 40 40 1 1 W X VSSD 7 -800 -1100 200 R 40 40 1 1 W X VSSO 25 -800 -900 200 R 40 40 1 1 W X XTI 24 -800 100 200 R 40 40 1 1 I X XTO 23 -800 0 200 R 40 40 1 1 O X Y 15 800 100 200 L 40 40 1 1 C ENDDRAW ENDDEF # # Dev Name: STV5348D # Package Name: SO28W # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF STV5348D IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: STV5348 F0 "IC" -600 1250 50 H V L B F1 "STV5348D" -600 -1300 50 H V L B F2 "st-microelectronics-SO28W" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1200 600 1200 P 2 1 0 0 600 1200 600 -1200 P 2 1 0 0 600 -1200 -600 -1200 P 2 1 0 0 -600 -1200 -600 1200 X B 10 800 -300 200 L 40 40 1 1 O X BLAN 12 800 400 200 L 40 40 1 1 O X CBLK 28 800 -600 200 L 40 40 1 1 B X COR 13 800 300 200 L 40 40 1 1 C X CVBS 1 -800 1100 200 R 40 40 1 1 I X DV 19 800 600 200 L 40 40 1 1 O X FFB 6 -800 1000 200 R 40 40 1 1 I X G 9 800 -200 200 L 40 40 1 1 O X L23 18 800 500 200 L 40 40 1 1 O X MA/SL 2 -800 500 200 R 40 40 1 1 I X ODD/EVEN 14 800 200 200 L 40 40 1 1 O X POL 4 -800 400 200 R 40 40 1 1 I X R 8 800 -100 200 L 40 40 1 1 O X RESERVED 20 -800 -200 200 R 40 40 1 1 P X RGBREF 11 -800 -500 200 R 40 40 1 1 W X SCL 16 -800 700 200 R 40 40 1 1 I X SDA 17 -800 800 200 R 40 40 1 1 B X STTV/LFB 5 800 -500 200 L 40 40 1 1 B X TEST 27 -800 -300 200 R 40 40 1 1 P X VCR/TV 21 -800 300 200 R 40 40 1 1 I X VDDA 3 -800 -600 200 R 40 40 1 1 W X VDDD 22 -800 -700 200 R 40 40 1 1 W X VSSA 26 -800 -1000 200 R 40 40 1 1 W X VSSD 7 -800 -1100 200 R 40 40 1 1 W X VSSO 25 -800 -900 200 R 40 40 1 1 W X XTI 24 -800 100 200 R 40 40 1 1 I X XTO 23 -800 0 200 R 40 40 1 1 O X Y 15 800 100 200 L 40 40 1 1 C ENDDRAW ENDDEF # # Dev Name: STV5348D/T # Package Name: SO28W # Dev Tech: /T # Dev Prefix: IC # Gate count = 1 # DEF STV5348D/T IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: STV5348 F0 "IC" -600 1250 50 H V L B F1 "STV5348D/T" -600 -1300 50 H V L B F2 "st-microelectronics-SO28W" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1200 600 1200 P 2 1 0 0 600 1200 600 -1200 P 2 1 0 0 600 -1200 -600 -1200 P 2 1 0 0 -600 -1200 -600 1200 X B 10 800 -300 200 L 40 40 1 1 O X BLAN 12 800 400 200 L 40 40 1 1 O X CBLK 28 800 -600 200 L 40 40 1 1 B X COR 13 800 300 200 L 40 40 1 1 C X CVBS 1 -800 1100 200 R 40 40 1 1 I X DV 19 800 600 200 L 40 40 1 1 O X FFB 6 -800 1000 200 R 40 40 1 1 I X G 9 800 -200 200 L 40 40 1 1 O X L23 18 800 500 200 L 40 40 1 1 O X MA/SL 2 -800 500 200 R 40 40 1 1 I X ODD/EVEN 14 800 200 200 L 40 40 1 1 O X POL 4 -800 400 200 R 40 40 1 1 I X R 8 800 -100 200 L 40 40 1 1 O X RESERVED 20 -800 -200 200 R 40 40 1 1 P X RGBREF 11 -800 -500 200 R 40 40 1 1 W X SCL 16 -800 700 200 R 40 40 1 1 I X SDA 17 -800 800 200 R 40 40 1 1 B X STTV/LFB 5 800 -500 200 L 40 40 1 1 B X TEST 27 -800 -300 200 R 40 40 1 1 P X VCR/TV 21 -800 300 200 R 40 40 1 1 I X VDDA 3 -800 -600 200 R 40 40 1 1 W X VDDD 22 -800 -700 200 R 40 40 1 1 W X VSSA 26 -800 -1000 200 R 40 40 1 1 W X VSSD 7 -800 -1100 200 R 40 40 1 1 W X VSSO 25 -800 -900 200 R 40 40 1 1 W X XTI 24 -800 100 200 R 40 40 1 1 I X XTO 23 -800 0 200 R 40 40 1 1 O X Y 15 800 100 200 L 40 40 1 1 C ENDDRAW ENDDEF # # Dev Name: STV5730A # Package Name: SO28W # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF STV5730A IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: STV5730A F0 "IC" -600 1450 50 H V L B F1 "STV5730A" -600 -1400 50 H V L B F2 "st-microelectronics-SO28W" 0 150 50 H I C C DRAW P 2 1 0 0 -600 1400 600 1400 P 2 1 0 0 600 1400 600 -1300 P 2 1 0 0 600 -1300 -600 -1300 P 2 1 0 0 -600 -1300 -600 1400 X AGND 21 -700 -1200 100 R 40 40 1 1 W X AVDD 5 -700 -1100 100 R 40 40 1 1 W X B 16 700 -100 100 L 40 40 1 1 O X BAR 19 -700 -400 100 R 40 40 1 1 I X CIN 25 -700 -100 100 R 40 40 1 1 I X CLK 12 -700 700 100 R 40 40 1 1 I X CO 18 700 -600 100 L 40 40 1 1 O X COUT 24 700 300 100 L 40 40 1 1 O X CSN 13 -700 500 100 R 40 40 1 1 I X CSYNC 7 -700 300 100 R 40 40 1 1 B X DATA 11 -700 600 100 R 40 40 1 1 I X DGND 20 700 -1200 100 L 40 40 1 1 W X DVDD 6 700 1300 100 L 40 40 1 1 W X FB 17 700 -500 100 L 40 40 1 1 O X FTR 4 -700 -600 100 R 40 40 1 1 I X G 15 700 0 100 L 40 40 1 1 O X LECHAR 22 -700 -800 100 R 40 40 1 1 I X LESCREEN 23 -700 -900 100 R 40 40 1 1 I X MUTE 10 700 -800 100 L 40 40 1 1 O X R 14 700 100 100 L 40 40 1 1 O X RES 3 -700 1300 100 R 40 40 1 1 I X VIDEOOUT1 27 700 700 100 L 40 40 1 1 O X VIDEOOUT2 26 700 500 100 L 40 40 1 1 O X VIDEO_IN 2 -700 100 100 R 40 40 1 1 I X XTAL_IN 8 -700 1100 100 R 40 40 1 1 I X XTAL_OUT 9 -700 900 100 R 40 40 1 1 O X YIN 28 -700 -200 100 R 40 40 1 1 I X YOUT 1 700 -300 100 L 40 40 1 1 O ENDDRAW ENDDEF # # Dev Name: TEA3718DP # Package Name: DIL16 # Dev Tech: '' # Dev Prefix: IC # Gate count = 4 # DEF TEA3718DP IC 0 40 Y Y 4 L N # Gate Name: G$1 # Symbol Name: TAE3718D F0 "IC" -500 525 50 H V L B F1 "TEA3718DP" -500 -699 50 H V L B F2 "st-microelectronics-DIL16" 0 150 50 H I C C DRAW P 2 1 0 0 -500 -600 600 -600 P 2 1 0 0 600 -600 600 500 P 2 1 0 0 600 500 -500 500 P 2 1 0 0 -500 500 -500 -600 X COMP-IN 10 -600 -100 100 R 40 40 1 1 I X GND 4 -600 -500 100 R 40 40 1 1 W X IN0 9 -600 100 100 R 40 40 1 1 I X IN1 7 -600 0 100 R 40 40 1 1 I X OUTA 15 700 100 100 L 40 40 1 1 O X OUTB 1 700 0 100 L 40 40 1 1 O X PHASE 8 700 400 100 L 40 40 1 1 I X PULSE-TIME 2 -600 -300 100 R 40 40 1 1 P X REFERENCE 11 -600 200 100 R 40 40 1 1 I X SENSE 16 700 -300 100 L 40 40 1 1 I X VSA 14 700 200 100 L 40 40 1 1 W X VSB 3 700 -100 100 L 40 40 1 1 W X VSS 6 -600 400 100 R 40 40 1 1 W # Gate Name: G1 # Symbol Name: GND X GND 5 0 -100 100 U 40 40 2 1 W # Gate Name: G2 # Symbol Name: GND X GND 12 0 -100 100 U 40 40 3 1 W # Gate Name: G3 # Symbol Name: GND X GND 13 0 -100 100 U 40 40 4 1 W ENDDRAW ENDDEF # # Dev Name: TEA3718SDP # Package Name: DIL16 # Dev Tech: S # Dev Prefix: IC # Gate count = 4 # DEF TEA3718SDP IC 0 40 Y Y 4 L N # Gate Name: G$1 # Symbol Name: TAE3718D F0 "IC" -500 525 50 H V L B F1 "TEA3718SDP" -500 -699 50 H V L B F2 "st-microelectronics-DIL16" 0 150 50 H I C C DRAW P 2 1 0 0 -500 -600 600 -600 P 2 1 0 0 600 -600 600 500 P 2 1 0 0 600 500 -500 500 P 2 1 0 0 -500 500 -500 -600 X COMP-IN 10 -600 -100 100 R 40 40 1 1 I X GND 4 -600 -500 100 R 40 40 1 1 W X IN0 9 -600 100 100 R 40 40 1 1 I X IN1 7 -600 0 100 R 40 40 1 1 I X OUTA 15 700 100 100 L 40 40 1 1 O X OUTB 1 700 0 100 L 40 40 1 1 O X PHASE 8 700 400 100 L 40 40 1 1 I X PULSE-TIME 2 -600 -300 100 R 40 40 1 1 P X REFERENCE 11 -600 200 100 R 40 40 1 1 I X SENSE 16 700 -300 100 L 40 40 1 1 I X VSA 14 700 200 100 L 40 40 1 1 W X VSB 3 700 -100 100 L 40 40 1 1 W X VSS 6 -600 400 100 R 40 40 1 1 W # Gate Name: G1 # Symbol Name: GND X GND 5 0 -100 100 U 40 40 2 1 W # Gate Name: G2 # Symbol Name: GND X GND 12 0 -100 100 U 40 40 3 1 W # Gate Name: G3 # Symbol Name: GND X GND 13 0 -100 100 U 40 40 4 1 W ENDDRAW ENDDEF # # Dev Name: TEA3718SFP # Package Name: SO20 # Dev Tech: '' # Dev Prefix: IC # Gate count = 4 # DEF TEA3718SFP IC 0 40 Y Y 4 L N # Gate Name: . # Symbol Name: TAE3718 F0 "IC" -500 525 50 H V L B F1 "TEA3718SFP" -500 -699 50 H V L B F2 "st-microelectronics-SO20" 0 150 50 H I C C DRAW P 2 1 0 0 -500 -600 600 -600 P 2 1 0 0 600 -600 600 500 P 2 1 0 0 600 500 -500 500 P 2 1 0 0 -500 500 -500 -600 X ALARM 14 700 -500 100 L 40 40 1 1 C X COMP-IN 12 -600 -100 100 R 40 40 1 1 I X GND 5 -600 -500 100 R 40 40 1 1 W X IN0 11 -600 100 100 R 40 40 1 1 I X IN1 9 -600 0 100 R 40 40 1 1 I X OUTA 19 700 100 100 L 40 40 1 1 O X OUTB 1 700 0 100 L 40 40 1 1 O X PHASE 10 700 400 100 L 40 40 1 1 I X PULSE-TIME 2 -600 -300 100 R 40 40 1 1 P X REFERENCE 13 -600 200 100 R 40 40 1 1 I X SENSE 20 700 -300 100 L 40 40 1 1 I X VSA 18 700 200 100 L 40 40 1 1 W X VSB 3 700 -100 100 L 40 40 1 1 W X VSS 8 -600 400 100 R 40 40 1 1 W # Gate Name: G1 # Symbol Name: GND X GND 6 0 -100 100 U 40 40 2 1 W # Gate Name: G2 # Symbol Name: GND X GND 15 0 -100 100 U 40 40 3 1 W # Gate Name: G3 # Symbol Name: GND X GND 16 0 -100 100 U 40 40 4 1 W ENDDRAW ENDDEF # # Dev Name: TEA3718SP # Package Name: MULTIWATT-15 # Dev Tech: S # Dev Prefix: IC # Gate count = 1 # DEF TEA3718SP IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: TAE3718 F0 "IC" -500 525 50 H V L B F1 "TEA3718SP" -500 -699 50 H V L B F2 "st-microelectronics-MULTIWATT-15" 0 150 50 H I C C DRAW P 2 1 0 0 -500 -600 600 -600 P 2 1 0 0 600 -600 600 500 P 2 1 0 0 600 500 -500 500 P 2 1 0 0 -500 500 -500 -600 X ALARM 7 700 -500 100 L 40 40 1 1 C X COMP-IN 5 -600 -100 100 R 40 40 1 1 I X GND 8 -600 -500 100 R 40 40 1 1 W X IN0 4 -600 100 100 R 40 40 1 1 I X IN1 2 -600 0 100 R 40 40 1 1 I X OUTA 12 700 100 100 L 40 40 1 1 O X OUTB 14 700 0 100 L 40 40 1 1 O X PHASE 3 700 400 100 L 40 40 1 1 I X PULSE-TIME 11 -600 -300 100 R 40 40 1 1 P X REFERENCE 6 -600 200 100 R 40 40 1 1 I X SENSE 13 700 -300 100 L 40 40 1 1 I X VSA 10 700 200 100 L 40 40 1 1 W X VSB 15 700 -100 100 L 40 40 1 1 W X VSS 1 -600 400 100 R 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: UPSD3253B-40T6 # Package Name: TQFP-10X10-52 # Dev Tech: 3B-40 # Dev Prefix: IC # Gate count = 1 # DEF UPSD3253B-40T6 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: UPSD325*-52 F0 "IC" -500 2050 50 H V L B F1 "UPSD3253B-40T6" -500 -2200 50 H V L B F2 "st-microelectronics-TQFP-10X10-52" 0 150 50 H I C C DRAW P 2 1 0 0 -500 2000 500 2000 P 2 1 0 0 500 2000 500 -2100 P 2 1 0 0 500 -2100 -500 -2100 P 2 1 0 0 -500 -2100 -500 2000 X GND@1 9 600 -1800 100 L 40 40 1 1 W X GND@2 19 600 -1900 100 L 40 40 1 1 W X GND@3 45 600 -2000 100 L 40 40 1 1 W X P1.0 34 -600 500 100 R 40 40 1 1 B X P1.1 35 -600 400 100 R 40 40 1 1 B X P1.2 36 -600 300 100 R 40 40 1 1 B X P1.3 37 -600 200 100 R 40 40 1 1 B X P1.4 38 -600 100 100 R 40 40 1 1 B X P1.5 39 -600 0 100 R 40 40 1 1 B X P1.6 40 -600 -100 100 R 40 40 1 1 B X P1.7 41 -600 -200 100 R 40 40 1 1 B X P3.0 23 -600 1400 100 R 40 40 1 1 B X P3.1 24 -600 1300 100 R 40 40 1 1 B X P3.2 25 -600 1200 100 R 40 40 1 1 B X P3.3 26 -600 1100 100 R 40 40 1 1 B X P3.4 27 -600 1000 100 R 40 40 1 1 B X P3.5 28 -600 900 100 R 40 40 1 1 B X P3.6 29 -600 800 100 R 40 40 1 1 B X P3.7 30 -600 700 100 R 40 40 1 1 B X P4.0 22 -600 -400 100 R 40 40 1 1 B X P4.1 21 -600 -500 100 R 40 40 1 1 B X P4.2 20 -600 -600 100 R 40 40 1 1 B X P4.3 18 -600 -700 100 R 40 40 1 1 B X P4.4 17 -600 -800 100 R 40 40 1 1 B X P4.5 16 -600 -900 100 R 40 40 1 1 B X P4.6 15 -600 -1000 100 R 40 40 1 1 B X P4.7 14 -600 -1100 100 R 40 40 1 1 B X PB0 52 600 500 100 L 40 40 1 1 B X PB1 51 600 400 100 L 40 40 1 1 B X PB2 50 600 300 100 L 40 40 1 1 B X PB3 49 600 200 100 L 40 40 1 1 B X PB4 48 600 100 100 L 40 40 1 1 B X PB5 47 600 0 100 L 40 40 1 1 B X PB6 43 600 -100 100 L 40 40 1 1 B X PB7 42 600 -200 100 L 40 40 1 1 B X PC2 11 600 -1100 100 L 40 40 1 1 B X PC3 10 600 -1200 100 L 40 40 1 1 B X PC4 6 600 -1300 100 L 40 40 1 1 B X PC7 2 600 -1600 100 L 40 40 1 1 B X PD1 1 600 -500 100 L 40 40 1 1 B X RESET\ 44 -600 1900 100 R 40 40 1 1 I X TCK 12 -600 -1900 100 R 40 40 1 1 I X TDI 4 -600 -1800 100 R 40 40 1 1 I X TDO 3 -600 -1700 100 R 40 40 1 1 O X TMS 13 -600 -2000 100 R 40 40 1 1 I X USB+ 7 -600 -1400 100 R 40 40 1 1 B X USB- 5 -600 -1500 100 R 40 40 1 1 B X VCC@1 8 600 1900 100 L 40 40 1 1 W X VCC@2 33 600 1800 100 L 40 40 1 1 W X VREF 46 -600 -1300 100 R 40 40 1 1 O X XTAL1 31 -600 1700 100 R 40 40 1 1 I X XTAL2 32 -600 1600 100 R 40 40 1 1 O ENDDRAW ENDDEF # # Dev Name: UPSD3253BV-24T6 # Package Name: TQFP-10X10-52 # Dev Tech: 3BV-24 # Dev Prefix: IC # Gate count = 1 # DEF UPSD3253BV-24T6 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: UPSD325*-52 F0 "IC" -500 2050 50 H V L B F1 "UPSD3253BV-24T6" -500 -2200 50 H V L B F2 "st-microelectronics-TQFP-10X10-52" 0 150 50 H I C C DRAW P 2 1 0 0 -500 2000 500 2000 P 2 1 0 0 500 2000 500 -2100 P 2 1 0 0 500 -2100 -500 -2100 P 2 1 0 0 -500 -2100 -500 2000 X GND@1 9 600 -1800 100 L 40 40 1 1 W X GND@2 19 600 -1900 100 L 40 40 1 1 W X GND@3 45 600 -2000 100 L 40 40 1 1 W X P1.0 34 -600 500 100 R 40 40 1 1 B X P1.1 35 -600 400 100 R 40 40 1 1 B X P1.2 36 -600 300 100 R 40 40 1 1 B X P1.3 37 -600 200 100 R 40 40 1 1 B X P1.4 38 -600 100 100 R 40 40 1 1 B X P1.5 39 -600 0 100 R 40 40 1 1 B X P1.6 40 -600 -100 100 R 40 40 1 1 B X P1.7 41 -600 -200 100 R 40 40 1 1 B X P3.0 23 -600 1400 100 R 40 40 1 1 B X P3.1 24 -600 1300 100 R 40 40 1 1 B X P3.2 25 -600 1200 100 R 40 40 1 1 B X P3.3 26 -600 1100 100 R 40 40 1 1 B X P3.4 27 -600 1000 100 R 40 40 1 1 B X P3.5 28 -600 900 100 R 40 40 1 1 B X P3.6 29 -600 800 100 R 40 40 1 1 B X P3.7 30 -600 700 100 R 40 40 1 1 B X P4.0 22 -600 -400 100 R 40 40 1 1 B X P4.1 21 -600 -500 100 R 40 40 1 1 B X P4.2 20 -600 -600 100 R 40 40 1 1 B X P4.3 18 -600 -700 100 R 40 40 1 1 B X P4.4 17 -600 -800 100 R 40 40 1 1 B X P4.5 16 -600 -900 100 R 40 40 1 1 B X P4.6 15 -600 -1000 100 R 40 40 1 1 B X P4.7 14 -600 -1100 100 R 40 40 1 1 B X PB0 52 600 500 100 L 40 40 1 1 B X PB1 51 600 400 100 L 40 40 1 1 B X PB2 50 600 300 100 L 40 40 1 1 B X PB3 49 600 200 100 L 40 40 1 1 B X PB4 48 600 100 100 L 40 40 1 1 B X PB5 47 600 0 100 L 40 40 1 1 B X PB6 43 600 -100 100 L 40 40 1 1 B X PB7 42 600 -200 100 L 40 40 1 1 B X PC2 11 600 -1100 100 L 40 40 1 1 B X PC3 10 600 -1200 100 L 40 40 1 1 B X PC4 6 600 -1300 100 L 40 40 1 1 B X PC7 2 600 -1600 100 L 40 40 1 1 B X PD1 1 600 -500 100 L 40 40 1 1 B X RESET\ 44 -600 1900 100 R 40 40 1 1 I X TCK 12 -600 -1900 100 R 40 40 1 1 I X TDI 4 -600 -1800 100 R 40 40 1 1 I X TDO 3 -600 -1700 100 R 40 40 1 1 O X TMS 13 -600 -2000 100 R 40 40 1 1 I X USB+ 7 -600 -1400 100 R 40 40 1 1 B X USB- 5 -600 -1500 100 R 40 40 1 1 B X VCC@1 8 600 1900 100 L 40 40 1 1 W X VCC@2 33 600 1800 100 L 40 40 1 1 W X VREF 46 -600 -1300 100 R 40 40 1 1 O X XTAL1 31 -600 1700 100 R 40 40 1 1 I X XTAL2 32 -600 1600 100 R 40 40 1 1 O ENDDRAW ENDDEF # # Dev Name: UPSD3254A-40T6 # Package Name: TQFP-10X10-52 # Dev Tech: 4A-40 # Dev Prefix: IC # Gate count = 1 # DEF UPSD3254A-40T6 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: UPSD325*-52 F0 "IC" -500 2050 50 H V L B F1 "UPSD3254A-40T6" -500 -2200 50 H V L B F2 "st-microelectronics-TQFP-10X10-52" 0 150 50 H I C C DRAW P 2 1 0 0 -500 2000 500 2000 P 2 1 0 0 500 2000 500 -2100 P 2 1 0 0 500 -2100 -500 -2100 P 2 1 0 0 -500 -2100 -500 2000 X GND@1 9 600 -1800 100 L 40 40 1 1 W X GND@2 19 600 -1900 100 L 40 40 1 1 W X GND@3 45 600 -2000 100 L 40 40 1 1 W X P1.0 34 -600 500 100 R 40 40 1 1 B X P1.1 35 -600 400 100 R 40 40 1 1 B X P1.2 36 -600 300 100 R 40 40 1 1 B X P1.3 37 -600 200 100 R 40 40 1 1 B X P1.4 38 -600 100 100 R 40 40 1 1 B X P1.5 39 -600 0 100 R 40 40 1 1 B X P1.6 40 -600 -100 100 R 40 40 1 1 B X P1.7 41 -600 -200 100 R 40 40 1 1 B X P3.0 23 -600 1400 100 R 40 40 1 1 B X P3.1 24 -600 1300 100 R 40 40 1 1 B X P3.2 25 -600 1200 100 R 40 40 1 1 B X P3.3 26 -600 1100 100 R 40 40 1 1 B X P3.4 27 -600 1000 100 R 40 40 1 1 B X P3.5 28 -600 900 100 R 40 40 1 1 B X P3.6 29 -600 800 100 R 40 40 1 1 B X P3.7 30 -600 700 100 R 40 40 1 1 B X P4.0 22 -600 -400 100 R 40 40 1 1 B X P4.1 21 -600 -500 100 R 40 40 1 1 B X P4.2 20 -600 -600 100 R 40 40 1 1 B X P4.3 18 -600 -700 100 R 40 40 1 1 B X P4.4 17 -600 -800 100 R 40 40 1 1 B X P4.5 16 -600 -900 100 R 40 40 1 1 B X P4.6 15 -600 -1000 100 R 40 40 1 1 B X P4.7 14 -600 -1100 100 R 40 40 1 1 B X PB0 52 600 500 100 L 40 40 1 1 B X PB1 51 600 400 100 L 40 40 1 1 B X PB2 50 600 300 100 L 40 40 1 1 B X PB3 49 600 200 100 L 40 40 1 1 B X PB4 48 600 100 100 L 40 40 1 1 B X PB5 47 600 0 100 L 40 40 1 1 B X PB6 43 600 -100 100 L 40 40 1 1 B X PB7 42 600 -200 100 L 40 40 1 1 B X PC2 11 600 -1100 100 L 40 40 1 1 B X PC3 10 600 -1200 100 L 40 40 1 1 B X PC4 6 600 -1300 100 L 40 40 1 1 B X PC7 2 600 -1600 100 L 40 40 1 1 B X PD1 1 600 -500 100 L 40 40 1 1 B X RESET\ 44 -600 1900 100 R 40 40 1 1 I X TCK 12 -600 -1900 100 R 40 40 1 1 I X TDI 4 -600 -1800 100 R 40 40 1 1 I X TDO 3 -600 -1700 100 R 40 40 1 1 O X TMS 13 -600 -2000 100 R 40 40 1 1 I X USB+ 7 -600 -1400 100 R 40 40 1 1 B X USB- 5 -600 -1500 100 R 40 40 1 1 B X VCC@1 8 600 1900 100 L 40 40 1 1 W X VCC@2 33 600 1800 100 L 40 40 1 1 W X VREF 46 -600 -1300 100 R 40 40 1 1 O X XTAL1 31 -600 1700 100 R 40 40 1 1 I X XTAL2 32 -600 1600 100 R 40 40 1 1 O ENDDRAW ENDDEF # # Dev Name: UPSD3254A-40U6 # Package Name: TQFP-12X12-80 # Dev Tech: A-40 # Dev Prefix: IC # Gate count = 1 # DEF UPSD3254A-40U6 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: UPSD325*-80 F0 "IC" -500 2450 50 H V L B F1 "UPSD3254A-40U6" -500 -2700 50 H V L B F2 "st-microelectronics-TQFP-12X12-80" 0 150 50 H I C C DRAW P 2 1 0 0 -500 2400 500 2400 P 2 1 0 0 500 2400 500 -2600 P 2 1 0 0 500 -2600 -500 -2600 P 2 1 0 0 -500 -2600 -500 2400 X A8 51 600 -1300 100 L 40 40 1 1 O X A9 53 600 -1400 100 L 40 40 1 1 O X A10 55 600 -1500 100 L 40 40 1 1 O X A11 57 600 -1600 100 L 40 40 1 1 O X AD0 36 600 -400 100 L 40 40 1 1 I X AD1 37 600 -500 100 L 40 40 1 1 I X AD2 38 600 -600 100 L 40 40 1 1 I X AD3 39 600 -700 100 L 40 40 1 1 I X AD4 41 600 -800 100 L 40 40 1 1 I X AD5 43 600 -900 100 L 40 40 1 1 I X AD6 45 600 -1000 100 L 40 40 1 1 I X AD7 47 600 -1100 100 L 40 40 1 1 I X ALE 4 600 -1800 100 L 40 40 1 1 O X GND@1 13 -600 -2300 100 R 40 40 1 1 W X GND@2 29 -600 -2400 100 R 40 40 1 1 W X GND@3 69 -600 -2500 100 R 40 40 1 1 W X P1.0 52 -600 500 100 R 40 40 1 1 B X P1.1 54 -600 400 100 R 40 40 1 1 B X P1.2 56 -600 300 100 R 40 40 1 1 B X P1.3 58 -600 200 100 R 40 40 1 1 B X P1.4 59 -600 100 100 R 40 40 1 1 B X P1.5 60 -600 0 100 R 40 40 1 1 B X P1.6 61 -600 -100 100 R 40 40 1 1 B X P1.7 64 -600 -200 100 R 40 40 1 1 B X P3.0 75 -600 1400 100 R 40 40 1 1 B X P3.1 77 -600 1300 100 R 40 40 1 1 B X P3.2 79 -600 1200 100 R 40 40 1 1 B X P3.3 2 -600 1100 100 R 40 40 1 1 B X P3.4 40 -600 1000 100 R 40 40 1 1 B X P3.5 42 -600 900 100 R 40 40 1 1 B X P3.6 44 -600 800 100 R 40 40 1 1 B X P3.7 46 -600 700 100 R 40 40 1 1 B X P4.0 33 -600 -400 100 R 40 40 1 1 B X P4.1 31 -600 -500 100 R 40 40 1 1 B X P4.2 30 -600 -600 100 R 40 40 1 1 B X P4.3 27 -600 -700 100 R 40 40 1 1 B X P4.4 25 -600 -800 100 R 40 40 1 1 B X P4.5 23 -600 -900 100 R 40 40 1 1 B X P4.6 19 -600 -1000 100 R 40 40 1 1 B X P4.7 18 -600 -1100 100 R 40 40 1 1 B X PA0 35 600 2300 100 L 40 40 1 1 B X PA1 34 600 2200 100 L 40 40 1 1 B X PA2 32 600 2100 100 L 40 40 1 1 B X PA3 28 600 2000 100 L 40 40 1 1 B X PA4 26 600 1900 100 L 40 40 1 1 B X PA5 24 600 1800 100 L 40 40 1 1 B X PA6 22 600 1700 100 L 40 40 1 1 B X PA7 21 600 1600 100 L 40 40 1 1 B X PB0 80 600 1400 100 L 40 40 1 1 B X PB1 78 600 1300 100 L 40 40 1 1 B X PB2 76 600 1200 100 L 40 40 1 1 B X PB3 74 600 1100 100 L 40 40 1 1 B X PB4 73 600 1000 100 L 40 40 1 1 B X PB5 72 600 900 100 L 40 40 1 1 B X PB6 67 600 800 100 L 40 40 1 1 B X PB7 66 600 700 100 L 40 40 1 1 B X PC2 15 600 100 100 L 40 40 1 1 B X PC3 14 600 0 100 L 40 40 1 1 B X PC4 9 600 -100 100 L 40 40 1 1 B X PC7 5 600 -200 100 L 40 40 1 1 B X PD1 3 600 500 100 L 40 40 1 1 B X PD2 1 600 400 100 L 40 40 1 1 B X PSEN\ 63 600 -2100 100 L 40 40 1 1 O X RD\ 65 600 -2000 100 L 40 40 1 1 O X RESET\ 68 -600 2000 100 R 40 40 1 1 I X TCK 16 -600 -2000 100 R 40 40 1 1 I X TDI 7 -600 -1900 100 R 40 40 1 1 I X TDO 6 -600 -1800 100 R 40 40 1 1 O X TMS 20 -600 -2100 100 R 40 40 1 1 I X USB+ 10 -600 -1500 100 R 40 40 1 1 B X USB- 8 -600 -1600 100 R 40 40 1 1 B X VCC@1 12 -600 2300 100 R 40 40 1 1 W X VCC@2 50 -600 2200 100 R 40 40 1 1 W X VREF 70 -600 -1300 100 R 40 40 1 1 O X WR\ 62 600 -1900 100 L 40 40 1 1 O X XTAL1 48 -600 1800 100 R 40 40 1 1 I X XTAL2 49 -600 1600 100 R 40 40 1 1 O ENDDRAW ENDDEF # # Dev Name: UPSD3254BV-24U6 # Package Name: TQFP-12X12-80 # Dev Tech: BV-24 # Dev Prefix: IC # Gate count = 1 # DEF UPSD3254BV-24U6 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: UPSD325*-80 F0 "IC" -500 2450 50 H V L B F1 "UPSD3254BV-24U6" -500 -2700 50 H V L B F2 "st-microelectronics-TQFP-12X12-80" 0 150 50 H I C C DRAW P 2 1 0 0 -500 2400 500 2400 P 2 1 0 0 500 2400 500 -2600 P 2 1 0 0 500 -2600 -500 -2600 P 2 1 0 0 -500 -2600 -500 2400 X A8 51 600 -1300 100 L 40 40 1 1 O X A9 53 600 -1400 100 L 40 40 1 1 O X A10 55 600 -1500 100 L 40 40 1 1 O X A11 57 600 -1600 100 L 40 40 1 1 O X AD0 36 600 -400 100 L 40 40 1 1 I X AD1 37 600 -500 100 L 40 40 1 1 I X AD2 38 600 -600 100 L 40 40 1 1 I X AD3 39 600 -700 100 L 40 40 1 1 I X AD4 41 600 -800 100 L 40 40 1 1 I X AD5 43 600 -900 100 L 40 40 1 1 I X AD6 45 600 -1000 100 L 40 40 1 1 I X AD7 47 600 -1100 100 L 40 40 1 1 I X ALE 4 600 -1800 100 L 40 40 1 1 O X GND@1 13 -600 -2300 100 R 40 40 1 1 W X GND@2 29 -600 -2400 100 R 40 40 1 1 W X GND@3 69 -600 -2500 100 R 40 40 1 1 W X P1.0 52 -600 500 100 R 40 40 1 1 B X P1.1 54 -600 400 100 R 40 40 1 1 B X P1.2 56 -600 300 100 R 40 40 1 1 B X P1.3 58 -600 200 100 R 40 40 1 1 B X P1.4 59 -600 100 100 R 40 40 1 1 B X P1.5 60 -600 0 100 R 40 40 1 1 B X P1.6 61 -600 -100 100 R 40 40 1 1 B X P1.7 64 -600 -200 100 R 40 40 1 1 B X P3.0 75 -600 1400 100 R 40 40 1 1 B X P3.1 77 -600 1300 100 R 40 40 1 1 B X P3.2 79 -600 1200 100 R 40 40 1 1 B X P3.3 2 -600 1100 100 R 40 40 1 1 B X P3.4 40 -600 1000 100 R 40 40 1 1 B X P3.5 42 -600 900 100 R 40 40 1 1 B X P3.6 44 -600 800 100 R 40 40 1 1 B X P3.7 46 -600 700 100 R 40 40 1 1 B X P4.0 33 -600 -400 100 R 40 40 1 1 B X P4.1 31 -600 -500 100 R 40 40 1 1 B X P4.2 30 -600 -600 100 R 40 40 1 1 B X P4.3 27 -600 -700 100 R 40 40 1 1 B X P4.4 25 -600 -800 100 R 40 40 1 1 B X P4.5 23 -600 -900 100 R 40 40 1 1 B X P4.6 19 -600 -1000 100 R 40 40 1 1 B X P4.7 18 -600 -1100 100 R 40 40 1 1 B X PA0 35 600 2300 100 L 40 40 1 1 B X PA1 34 600 2200 100 L 40 40 1 1 B X PA2 32 600 2100 100 L 40 40 1 1 B X PA3 28 600 2000 100 L 40 40 1 1 B X PA4 26 600 1900 100 L 40 40 1 1 B X PA5 24 600 1800 100 L 40 40 1 1 B X PA6 22 600 1700 100 L 40 40 1 1 B X PA7 21 600 1600 100 L 40 40 1 1 B X PB0 80 600 1400 100 L 40 40 1 1 B X PB1 78 600 1300 100 L 40 40 1 1 B X PB2 76 600 1200 100 L 40 40 1 1 B X PB3 74 600 1100 100 L 40 40 1 1 B X PB4 73 600 1000 100 L 40 40 1 1 B X PB5 72 600 900 100 L 40 40 1 1 B X PB6 67 600 800 100 L 40 40 1 1 B X PB7 66 600 700 100 L 40 40 1 1 B X PC2 15 600 100 100 L 40 40 1 1 B X PC3 14 600 0 100 L 40 40 1 1 B X PC4 9 600 -100 100 L 40 40 1 1 B X PC7 5 600 -200 100 L 40 40 1 1 B X PD1 3 600 500 100 L 40 40 1 1 B X PD2 1 600 400 100 L 40 40 1 1 B X PSEN\ 63 600 -2100 100 L 40 40 1 1 O X RD\ 65 600 -2000 100 L 40 40 1 1 O X RESET\ 68 -600 2000 100 R 40 40 1 1 I X TCK 16 -600 -2000 100 R 40 40 1 1 I X TDI 7 -600 -1900 100 R 40 40 1 1 I X TDO 6 -600 -1800 100 R 40 40 1 1 O X TMS 20 -600 -2100 100 R 40 40 1 1 I X USB+ 10 -600 -1500 100 R 40 40 1 1 B X USB- 8 -600 -1600 100 R 40 40 1 1 B X VCC@1 12 -600 2300 100 R 40 40 1 1 W X VCC@2 50 -600 2200 100 R 40 40 1 1 W X VREF 70 -600 -1300 100 R 40 40 1 1 O X WR\ 62 600 -1900 100 L 40 40 1 1 O X XTAL1 48 -600 1800 100 R 40 40 1 1 I X XTAL2 49 -600 1600 100 R 40 40 1 1 O ENDDRAW ENDDEF # # Dev Name: USB6B1 # Package Name: SO08 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF USB6B1 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: USB6B1 F0 "IC" -200 225 50 H V L B F1 "USB6B1" -200 -387 50 H V L B F2 "st-microelectronics-SO08" 0 150 50 H I C C DRAW P 2 1 0 0 -200 200 200 200 P 2 1 0 0 200 200 200 -300 P 2 1 0 0 200 -300 -200 -300 P 2 1 0 0 -200 -300 -200 -200 P 2 1 0 0 -200 -200 -200 -100 P 2 1 0 0 -200 -100 -200 0 P 2 1 0 0 -200 0 -200 100 P 2 1 0 0 -200 100 -200 200 P 2 1 0 0 -200 100 -150 100 P 2 1 0 0 -200 0 -150 0 P 2 1 0 0 -200 -100 -150 -100 P 2 1 0 0 -200 -200 -150 -200 P 2 1 0 0 200 -200 150 -200 P 2 1 0 0 200 -100 150 -100 P 2 1 0 0 200 0 150 0 P 2 1 0 0 200 100 150 100 X GND 4 -300 -200 100 R 40 40 1 1 W X GND@2 5 300 -200 100 L 40 40 1 1 W X IO1 2 -300 0 100 R 40 40 1 1 B X IO1@2 7 300 0 100 L 40 40 1 1 B X IO2 3 -300 -100 100 R 40 40 1 1 B X IO2@2 6 300 -100 100 L 40 40 1 1 B X VCC 1 -300 100 100 R 40 40 1 1 W X VCC@2 8 300 100 100 L 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: VN460SP # Package Name: POWER-SO10 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF VN460SP IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: VN460SP F0 "IC" -300 350 50 H V L B F1 "VN460SP" -400 -500 50 H V L B F2 "st-microelectronics-POWER-SO10" 0 150 50 H I C C DRAW P 2 1 0 0 -300 300 -300 -400 P 2 1 0 0 -300 -400 300 -400 P 2 1 0 0 300 -400 300 300 P 2 1 0 0 300 300 -300 300 T 0 110 240 60 0 1 0 VCC T 0 110 -340 60 0 1 0 GND X GND 6 100 -500 100 U 40 40 1 1 W X IN 7 -400 0 100 R 40 40 1 1 I X OUT1 1 400 100 100 L 40 40 1 1 O X OUT2 2 400 0 100 L 40 40 1 1 O X OUT3 4 400 -100 100 L 40 40 1 1 O X OUT4 5 400 -200 100 L 40 40 1 1 O X ST 8 -400 -300 100 R 40 40 1 1 I X VCC P 100 400 100 D 40 40 1 1 W ENDDRAW ENDDEF # # Dev Name: VNH3SP30 # Package Name: MULTIPOWERSO-30 # Dev Tech: '' # Dev Prefix: IC # Gate count = 1 # DEF VNH3SP30 IC 0 40 Y Y 1 L N # Gate Name: G$1 # Symbol Name: VNH3SP30 F0 "IC" -500 650 50 H V L B F1 "VNH3SP30" 300 -700 50 H V L B F2 "st-microelectronics-MULTIPOWERSO-30" 0 150 50 H I C C DRAW P 2 1 0 0 -500 600 500 600 P 2 1 0 0 500 600 500 -600 P 2 1 0 0 500 -600 -500 -600 P 2 1 0 0 -500 -600 -500 600 T 0 -300 -470 60 0 1 0 GNDA T 0 100 -470 60 0 1 0 GNDB T 1 400 310 60 0 1 0 OUTA T 1 410 -290 60 0 1 0 OUTB T 0 110 510 60 0 1 0 VCC X DIAGA 6 -600 100 100 R 40 40 1 1 C X DIAGB 10 -600 0 100 R 40 40 1 1 C X GNDA 28 -200 -700 100 U 40 40 1 1 W X GNDA@1 27 -300 -700 100 U 40 40 1 1 W X GNDA@2 26 -400 -700 100 U 40 40 1 1 W X GNDB 18 0 -700 100 U 40 40 1 1 W X GNDB@1 19 100 -700 100 U 40 40 1 1 W X GNDB@2 20 200 -700 100 U 40 40 1 1 W X INA 5 -600 400 100 R 40 40 1 1 I X INB 11 -600 300 100 R 40 40 1 1 I X OUTA 1 600 500 100 L 40 40 1 1 O X OUTA@1 30 600 400 100 L 40 40 1 1 P X OUTA@2 25 600 300 100 L 40 40 1 1 P X OUTA@3 OUTA 600 200 100 L 40 40 1 1 P X OUTA@4 OUTA@1 600 100 100 L 40 40 1 1 P X OUTB 15 600 -100 100 L 40 40 1 1 O X OUTB@1 16 600 -200 100 L 40 40 1 1 P X OUTB@2 21 600 -300 100 L 40 40 1 1 P X OUTB@3 OUTB 600 -400 100 L 40 40 1 1 P X OUTB@4 OUTB@1 600 -500 100 L 40 40 1 1 P X PWM 8 -600 -200 100 R 40 40 1 1 I X VCC 3 0 700 100 D 40 40 1 1 W X VCC@1 13 100 700 100 D 40 40 1 1 W X VCC@2 23 -100 700 100 D 40 40 1 1 W X VCC@3 VCC 200 700 100 D 40 40 1 1 W X VCC@4 VCC@1 300 700 100 D 40 40 1 1 W ENDDRAW ENDDEF #End Library