EESchema-LIBRARY Version 2.3  29/04/2008-12:24:05
# Converted with eagle2kicad.ulp Version 0.9
# Device count = 1
#
# Dev Name: A-TIGER_SER_I/O_AL_A
# Package Name: BASICTIGER-A
# Dev Tech: ''
# Dev Prefix: TIGER
# Gate count = 9
#
DEF A-TIGER_SER_I/O_AL_A TIGER 0 40 Y Y 9 L N
# Gate Name: ANALOG
# Symbol Name: ANALOG
F0 "TIGER" 0 0 50 H V C C
F1 "A-TIGER_SER_I/O_AL_A" 0 0 50 H V C C
F2 "tiger-BASICTIGER-A" 0 150 50 H I C C
DRAW
P 2 1 0 0 100 600 -500 600
P 2 1 0 0 -500 600 -500 -600
P 2 1 0 0 -500 -600 100 -600
P 2 1 0 0 100 -600 100 600
X AGND 44 300 -500 200 L 40 40 1 1 B 
X ANALOG0 39 300 300 200 L 40 40 1 1 I 
X ANALOG1 40 300 100 200 L 40 40 1 1 I 
X ANALOG2 41 300 -100 200 L 40 40 1 1 I 
X ANALOG3 42 300 -300 200 L 40 40 1 1 I 
X VREF_A/D 43 300 500 200 L 40 40 1 1 B 
# Gate Name: L3
# Symbol Name: PORT 5
P 2 2 0 0 -200 -500 100 -500
P 2 2 0 0 100 -500 100 500
P 2 2 0 0 100 500 -200 500
P 2 2 0 0 -200 500 -200 -500
X D3 30 300 400 200 L 40 40 2 1 B 
X D4 31 300 200 200 L 40 40 2 1 B 
X D5 32 300 0 200 L 40 40 2 1 B 
X D6 33 300 -200 200 L 40 40 2 1 B 
X D7 34 300 -400 200 L 40 40 2 1 B 
# Gate Name: L4
# Symbol Name: PORT 3
P 2 3 0 0 -100 -300 200 -300
P 2 3 0 0 200 -300 200 300
P 2 3 0 0 200 300 -100 300
P 2 3 0 0 -100 300 -100 -300
X D0 36 400 200 200 L 40 40 3 1 B 
X D1 37 400 0 200 L 40 40 3 1 B 
X D2 35 400 -200 200 L 40 40 3 1 B 
# Gate Name: L6
# Symbol Name: PORT D0..D7
P 2 4 0 0 -100 800 200 800
P 2 4 0 0 200 800 200 -800
P 2 4 0 0 200 -800 -100 -800
P 2 4 0 0 -100 -800 -100 800
X D0 2 -300 700 200 R 40 40 4 1 B 
X D1 3 -300 500 200 R 40 40 4 1 B 
X D2 4 -300 300 200 R 40 40 4 1 B 
X D3 5 -300 100 200 R 40 40 4 1 B 
X D4 6 -300 -100 200 R 40 40 4 1 B 
X D5 7 -300 -300 200 R 40 40 4 1 B 
X D6 8 -300 -500 200 R 40 40 4 1 B 
X D7 9 -300 -700 200 R 40 40 4 1 B 
# Gate Name: L7
# Symbol Name: PORT 4
P 2 5 0 0 -100 -400 200 -400
P 2 5 0 0 200 -400 200 400
P 2 5 0 0 200 400 -100 400
P 2 5 0 0 -100 400 -100 -400
X D0 10 -300 300 200 R 40 40 5 1 B 
X D1 11 -300 100 200 R 40 40 5 1 B 
X D2 12 -300 -100 200 R 40 40 5 1 B 
X D3 13 -300 -300 200 R 40 40 5 1 B 
# Gate Name: L8
# Symbol Name: PORT D0..D7
P 2 6 0 0 -100 800 200 800
P 2 6 0 0 200 800 200 -800
P 2 6 0 0 200 -800 -100 -800
P 2 6 0 0 -100 -800 -100 800
X D0 14 -300 700 200 R 40 40 6 1 B 
X D1 15 -300 500 200 R 40 40 6 1 B 
X D2 16 -300 300 200 R 40 40 6 1 B 
X D3 17 -300 100 200 R 40 40 6 1 B 
X D4 18 -300 -100 200 R 40 40 6 1 B 
X D5 19 -300 -300 200 R 40 40 6 1 B 
X D6 20 -300 -500 200 R 40 40 6 1 B 
X D7 21 -300 -700 200 R 40 40 6 1 B 
# Gate Name: PWR
# Symbol Name: PWR_RESET_ALARM
P 2 7 0 0 -100 -600 400 -600
P 2 7 0 0 400 -600 400 600
P 2 7 0 0 400 600 -100 600
P 2 7 0 0 -100 600 -100 -600
X AL 38 -300 -500 200 R 40 40 7 1 O 
X BATT 45 -300 -300 200 R 40 40 7 1 W 
X GND 23 -300 100 200 R 40 40 7 1 W 
X NC_(VCC) 1 -300 500 200 R 40 40 7 1 B 
X RESET 22 -300 300 200 R 40 40 7 1 I 
X VCC 46 -300 -100 200 R 40 40 7 1 W 
# Gate Name: SER0
# Symbol Name: SER0
P 2 8 0 0 200 -400 -200 -400
P 2 8 0 0 -200 -400 -200 400
P 2 8 0 0 -200 400 200 400
P 2 8 0 0 200 400 200 -400
X CTS0 26 400 -100 200 L 40 40 8 1 B 
X RTS0 29 400 -300 200 L 40 40 8 1 B 
X RXD0 25 400 100 200 L 40 40 8 1 B 
X TXD0 24 400 300 200 L 40 40 8 1 B 
# Gate Name: SER1
# Symbol Name: SER1
P 2 9 0 0 200 -200 -300 -200
P 2 9 0 0 -300 -200 -300 200
P 2 9 0 0 -300 200 200 200
P 2 9 0 0 200 200 200 -200
X RXD1 28 400 -100 200 L 40 40 9 1 B 
X TXD1 27 400 100 200 L 40 40 9 1 B 
ENDDRAW
ENDDEF

#End Library