EESchema-LIBRARY Version 2.3  29/04/2008-12:24:06
# Converted with eagle2kicad.ulp Version 0.9
# Device count = 8
#
# Dev Name: TPIC6A596DW
# Package Name: SO24W
# Dev Tech: ''
# Dev Prefix: IC
# Gate count = 2
#
DEF TPIC6A596DW IC 0 40 Y Y 2 L N
# Gate Name: G$1
# Symbol Name: 595-596
F0 "IC" -300 600 50 H V L B
F1 "TPIC6A596DW" -300 -600 50 H V L B
F2 "tpic-SO24W" 0 150 50 H I C C
DRAW
P 2 1 0 0 -300 -500 300 -500
P 2 1 0 0 300 -500 300 600
P 2 1 0 0 300 600 -300 600
P 2 1 0 0 -300 600 -300 -500
X DI 22 -500 500 200 R 40 40 1 1 I 
X DO 15 500 500 200 L 40 40 1 1 O 
X G 4 -500 -400 200 R 40 40 1 1 I 
X Q0 23 500 300 200 L 40 40 1 1 C 
X Q1 24 500 200 200 L 40 40 1 1 C 
X Q2 1 500 100 200 L 40 40 1 1 C 
X Q3 2 500 0 200 L 40 40 1 1 C 
X Q4 11 500 -100 200 L 40 40 1 1 C 
X Q5 12 500 -200 200 L 40 40 1 1 C 
X Q6 13 500 -300 200 L 40 40 1 1 C 
X Q7 14 500 -400 200 L 40 40 1 1 C 
X RCK 9 -500 -100 200 R 40 40 1 1 I C
X SCK 10 -500 200 200 R 40 40 1 1 I C
X SCLR 3 -500 300 200 R 40 40 1 1 I I
# Gate Name: P
# Symbol Name: VCC-GND-A
X GND 16 0 -500 200 U 40 40 2 1 W 
X PGND@1 5 -200 -500 200 U 40 40 2 1 W 
X PGND@2 6 -300 -500 200 U 40 40 2 1 W 
X PGND@3 7 -400 -500 200 U 40 40 2 1 W 
X PGND@4 8 -500 -500 200 U 40 40 2 1 W 
X PGND@5 17 -600 -500 200 U 40 40 2 1 W 
X PGND@6 18 -700 -500 200 U 40 40 2 1 W 
X PGND@7 19 -800 -500 200 U 40 40 2 1 W 
X PGND@8 20 -900 -500 200 U 40 40 2 1 W 
X VCC 21 0 600 200 D 40 40 2 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: TPIC6A596N
# Package Name: DIL20
# Dev Tech: ''
# Dev Prefix: IC
# Gate count = 2
#
DEF TPIC6A596N IC 0 40 Y Y 2 L N
# Gate Name: G$1
# Symbol Name: 595-596
F0 "IC" -300 600 50 H V L B
F1 "TPIC6A596N" -300 -600 50 H V L B
F2 "tpic-DIL20" 0 150 50 H I C C
DRAW
P 2 1 0 0 -300 -500 300 -500
P 2 1 0 0 300 -500 300 600
P 2 1 0 0 300 600 -300 600
P 2 1 0 0 -300 600 -300 -500
X DI 18 -500 500 200 R 40 40 1 1 I 
X DO 13 500 500 200 L 40 40 1 1 O 
X G 4 -500 -400 200 R 40 40 1 1 I 
X Q0 19 500 300 200 L 40 40 1 1 C 
X Q1 20 500 200 200 L 40 40 1 1 C 
X Q2 1 500 100 200 L 40 40 1 1 C 
X Q3 2 500 0 200 L 40 40 1 1 C 
X Q4 9 500 -100 200 L 40 40 1 1 C 
X Q5 10 500 -200 200 L 40 40 1 1 C 
X Q6 11 500 -300 200 L 40 40 1 1 C 
X Q7 12 500 -400 200 L 40 40 1 1 C 
X RCK 7 -500 -100 200 R 40 40 1 1 I C
X SCK 8 -500 200 200 R 40 40 1 1 I C
X SCLR 3 -500 300 200 R 40 40 1 1 I I
# Gate Name: P
# Symbol Name: VCC-GND-AN
X GND 14 0 -500 200 U 40 40 2 1 W 
X PGND@1 5 -200 -500 200 U 40 40 2 1 W 
X PGND@2 6 -300 -500 200 U 40 40 2 1 W 
X PGND@3 15 -400 -500 200 U 40 40 2 1 W 
X PGND@4 16 -500 -500 200 U 40 40 2 1 W 
X VCC 17 0 600 200 D 40 40 2 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: TPIC6B596DW
# Package Name: SO20W
# Dev Tech: ''
# Dev Prefix: IC
# Gate count = 2
#
DEF TPIC6B596DW IC 0 40 Y Y 2 L N
# Gate Name: G$1
# Symbol Name: 595-596
F0 "IC" -300 600 50 H V L B
F1 "TPIC6B596DW" -300 -600 50 H V L B
F2 "tpic-SO20W" 0 150 50 H I C C
DRAW
P 2 1 0 0 -300 -500 300 -500
P 2 1 0 0 300 -500 300 600
P 2 1 0 0 300 600 -300 600
P 2 1 0 0 -300 600 -300 -500
X DI 3 -500 500 200 R 40 40 1 1 I 
X DO 18 500 500 200 L 40 40 1 1 O 
X G 9 -500 -400 200 R 40 40 1 1 I 
X Q0 4 500 300 200 L 40 40 1 1 C 
X Q1 5 500 200 200 L 40 40 1 1 C 
X Q2 6 500 100 200 L 40 40 1 1 C 
X Q3 7 500 0 200 L 40 40 1 1 C 
X Q4 14 500 -100 200 L 40 40 1 1 C 
X Q5 15 500 -200 200 L 40 40 1 1 C 
X Q6 16 500 -300 200 L 40 40 1 1 C 
X Q7 17 500 -400 200 L 40 40 1 1 C 
X RCK 12 -500 -100 200 R 40 40 1 1 I C
X SCK 13 -500 200 200 R 40 40 1 1 I C
X SCLR 8 -500 300 200 R 40 40 1 1 I I
# Gate Name: P
# Symbol Name: VCC-GND-B
X GND@1 19 -200 -700 200 U 40 40 2 1 W 
X GND@2 10 0 -700 200 U 40 40 2 1 W 
X GND@3 11 200 -700 200 U 40 40 2 1 W 
X VCC 2 0 700 200 D 40 40 2 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: TPIC6B596N
# Package Name: DIL20
# Dev Tech: ''
# Dev Prefix: IC
# Gate count = 2
#
DEF TPIC6B596N IC 0 40 Y Y 2 L N
# Gate Name: G$1
# Symbol Name: 595-596
F0 "IC" -300 600 50 H V L B
F1 "TPIC6B596N" -300 -600 50 H V L B
F2 "tpic-DIL20" 0 150 50 H I C C
DRAW
P 2 1 0 0 -300 -500 300 -500
P 2 1 0 0 300 -500 300 600
P 2 1 0 0 300 600 -300 600
P 2 1 0 0 -300 600 -300 -500
X DI 3 -500 500 200 R 40 40 1 1 I 
X DO 18 500 500 200 L 40 40 1 1 O 
X G 9 -500 -400 200 R 40 40 1 1 I 
X Q0 4 500 300 200 L 40 40 1 1 C 
X Q1 5 500 200 200 L 40 40 1 1 C 
X Q2 6 500 100 200 L 40 40 1 1 C 
X Q3 7 500 0 200 L 40 40 1 1 C 
X Q4 14 500 -100 200 L 40 40 1 1 C 
X Q5 15 500 -200 200 L 40 40 1 1 C 
X Q6 16 500 -300 200 L 40 40 1 1 C 
X Q7 17 500 -400 200 L 40 40 1 1 C 
X RCK 12 -500 -100 200 R 40 40 1 1 I C
X SCK 13 -500 200 200 R 40 40 1 1 I C
X SCLR 8 -500 300 200 R 40 40 1 1 I I
# Gate Name: P
# Symbol Name: VCC-GND-B
X GND@1 19 -200 -700 200 U 40 40 2 1 W 
X GND@2 10 0 -700 200 U 40 40 2 1 W 
X GND@3 11 200 -700 200 U 40 40 2 1 W 
X VCC 2 0 700 200 D 40 40 2 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: TPIC6C596N
# Package Name: DIL16
# Dev Tech: ''
# Dev Prefix: IC
# Gate count = 2
#
DEF TPIC6C596N IC 0 40 Y Y 2 L N
# Gate Name: G$1
# Symbol Name: 595-596
F0 "IC" -300 600 50 H V L B
F1 "TPIC6C596N" -300 -600 50 H V L B
F2 "tpic-DIL16" 0 150 50 H I C C
DRAW
P 2 1 0 0 -300 -500 300 -500
P 2 1 0 0 300 -500 300 600
P 2 1 0 0 300 600 -300 600
P 2 1 0 0 -300 600 -300 -500
X DI 2 -500 500 200 R 40 40 1 1 I 
X DO 9 500 500 200 L 40 40 1 1 O 
X G 8 -500 -400 200 R 40 40 1 1 I 
X Q0 3 500 300 200 L 40 40 1 1 C 
X Q1 4 500 200 200 L 40 40 1 1 C 
X Q2 5 500 100 200 L 40 40 1 1 C 
X Q3 6 500 0 200 L 40 40 1 1 C 
X Q4 11 500 -100 200 L 40 40 1 1 C 
X Q5 12 500 -200 200 L 40 40 1 1 C 
X Q6 13 500 -300 200 L 40 40 1 1 C 
X Q7 14 500 -400 200 L 40 40 1 1 C 
X RCK 10 -500 -100 200 R 40 40 1 1 I C
X SCK 15 -500 200 200 R 40 40 1 1 I C
X SCLR 7 -500 300 200 R 40 40 1 1 I I
# Gate Name: P
# Symbol Name: VCC-GND-C
X GND 16 0 -600 200 U 40 40 2 1 W 
X VCC 1 0 600 200 D 40 40 2 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: TPIC6C596PW
# Package Name: SO16
# Dev Tech: ''
# Dev Prefix: IC
# Gate count = 2
#
DEF TPIC6C596PW IC 0 40 Y Y 2 L N
# Gate Name: G$1
# Symbol Name: 595-596
F0 "IC" -300 600 50 H V L B
F1 "TPIC6C596PW" -300 -600 50 H V L B
F2 "tpic-SO16" 0 150 50 H I C C
DRAW
P 2 1 0 0 -300 -500 300 -500
P 2 1 0 0 300 -500 300 600
P 2 1 0 0 300 600 -300 600
P 2 1 0 0 -300 600 -300 -500
X DI 2 -500 500 200 R 40 40 1 1 I 
X DO 9 500 500 200 L 40 40 1 1 O 
X G 8 -500 -400 200 R 40 40 1 1 I 
X Q0 3 500 300 200 L 40 40 1 1 C 
X Q1 4 500 200 200 L 40 40 1 1 C 
X Q2 5 500 100 200 L 40 40 1 1 C 
X Q3 6 500 0 200 L 40 40 1 1 C 
X Q4 11 500 -100 200 L 40 40 1 1 C 
X Q5 12 500 -200 200 L 40 40 1 1 C 
X Q6 13 500 -300 200 L 40 40 1 1 C 
X Q7 14 500 -400 200 L 40 40 1 1 C 
X RCK 10 -500 -100 200 R 40 40 1 1 I C
X SCK 15 -500 200 200 R 40 40 1 1 I C
X SCLR 7 -500 300 200 R 40 40 1 1 I I
# Gate Name: P
# Symbol Name: VCC-GND-C
X GND 16 0 -600 200 U 40 40 2 1 W 
X VCC 1 0 600 200 D 40 40 2 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: TPIC6596DW
# Package Name: SO20W
# Dev Tech: ''
# Dev Prefix: IC
# Gate count = 2
#
DEF TPIC6596DW IC 0 40 Y Y 2 L N
# Gate Name: G$1
# Symbol Name: 595-596
F0 "IC" -300 600 50 H V L B
F1 "TPIC6596DW" -300 -600 50 H V L B
F2 "tpic-SO20W" 0 150 50 H I C C
DRAW
P 2 1 0 0 -300 -500 300 -500
P 2 1 0 0 300 -500 300 600
P 2 1 0 0 300 600 -300 600
P 2 1 0 0 -300 600 -300 -500
X DI 3 -500 500 200 R 40 40 1 1 I 
X DO 18 500 500 200 L 40 40 1 1 O 
X G 9 -500 -400 200 R 40 40 1 1 I 
X Q0 4 500 300 200 L 40 40 1 1 C 
X Q1 5 500 200 200 L 40 40 1 1 C 
X Q2 6 500 100 200 L 40 40 1 1 C 
X Q3 7 500 0 200 L 40 40 1 1 C 
X Q4 14 500 -100 200 L 40 40 1 1 C 
X Q5 15 500 -200 200 L 40 40 1 1 C 
X Q6 16 500 -300 200 L 40 40 1 1 C 
X Q7 17 500 -400 200 L 40 40 1 1 C 
X RCK 12 -500 -100 200 R 40 40 1 1 I C
X SCK 13 -500 200 200 R 40 40 1 1 I C
X SCLR 8 -500 300 200 R 40 40 1 1 I I
# Gate Name: P
# Symbol Name: VCC-GND-AN
X GND 19 0 -500 200 U 40 40 2 1 W 
X PGND@1 1 -200 -500 200 U 40 40 2 1 W 
X PGND@2 20 -300 -500 200 U 40 40 2 1 W 
X PGND@3 10 -400 -500 200 U 40 40 2 1 W 
X PGND@4 11 -500 -500 200 U 40 40 2 1 W 
X VCC 2 0 600 200 D 40 40 2 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: TPIC6596N
# Package Name: DIL20
# Dev Tech: ''
# Dev Prefix: IC
# Gate count = 2
#
DEF TPIC6596N IC 0 40 Y Y 2 L N
# Gate Name: G$1
# Symbol Name: 595-596
F0 "IC" -300 600 50 H V L B
F1 "TPIC6596N" -300 -600 50 H V L B
F2 "tpic-DIL20" 0 150 50 H I C C
DRAW
P 2 1 0 0 -300 -500 300 -500
P 2 1 0 0 300 -500 300 600
P 2 1 0 0 300 600 -300 600
P 2 1 0 0 -300 600 -300 -500
X DI 3 -500 500 200 R 40 40 1 1 I 
X DO 18 500 500 200 L 40 40 1 1 O 
X G 9 -500 -400 200 R 40 40 1 1 I 
X Q0 4 500 300 200 L 40 40 1 1 C 
X Q1 5 500 200 200 L 40 40 1 1 C 
X Q2 6 500 100 200 L 40 40 1 1 C 
X Q3 7 500 0 200 L 40 40 1 1 C 
X Q4 14 500 -100 200 L 40 40 1 1 C 
X Q5 15 500 -200 200 L 40 40 1 1 C 
X Q6 16 500 -300 200 L 40 40 1 1 C 
X Q7 17 500 -400 200 L 40 40 1 1 C 
X RCK 12 -500 -100 200 R 40 40 1 1 I C
X SCK 13 -500 200 200 R 40 40 1 1 I C
X SCLR 8 -500 300 200 R 40 40 1 1 I I
# Gate Name: P
# Symbol Name: VCC-GND-AN
X GND 19 0 -500 200 U 40 40 2 1 W 
X PGND@1 1 -200 -500 200 U 40 40 2 1 W 
X PGND@2 20 -300 -500 200 U 40 40 2 1 W 
X PGND@3 10 -400 -500 200 U 40 40 2 1 W 
X PGND@4 11 -500 -500 200 U 40 40 2 1 W 
X VCC 2 0 600 200 D 40 40 2 1 W 
ENDDRAW
ENDDEF

#End Library